JP2001197479A - Method and device for processing differential image - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method and a configuration for reducing memory capacity required by a system in a differential image processing method and its device, by which the difference between a reference image 020 with previous recording and a real-time image 021 to be photographed in real-time is obtained to detect a subject which differs from the reference picture 020, such as a suspicious person who is infiltror a building, etc. SOLUTION: The total sum of signal levels at each row and at each column in the pixel of an image are calculated at both sides of the reference image and the real-time image. The difference between the corresponding total sum of the two images is obtained to specify a rectangular area comprising the row and the column, where the difference exists as the area where the subject is changed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a difference image processing method for detecting a difference between a reference image and a real-time image to detect a subject such as a suspicious person, which is performed by a difference camera device used for monitoring purposes and the like. The present invention relates to a difference image processing device.

[0002]

2. Description of the Related Art A conventional difference image processing method is to detect a difference image between a reference image in which only the background of a subject is photographed and recorded and a real-time image in which the subject and the background are photographed and recorded simultaneously and updated. Difference image processing method. " In addition, the conventional difference image processing device
The difference image processing apparatus detects a difference image between a reference image that captures and records only the background of a subject and a real-time image that captures and records the subject and the background simultaneously and is updated.

A conventional difference image processing method and difference image processing apparatus will be described with reference to FIGS. FIG. 1 is a configuration block diagram of a basic system that executes a conventional difference image processing method.

In FIG. 1, an imaging device (010) is a semiconductor imaging device known as a CCD or a CMOS imager, and an output video signal has a video signal format composed of a luminance signal and a color difference signal of Y / Cr / Cb. , RGB are generally used as video signal formats composed of luminance signals of three primary colors.

[0005] The video signal in the system of FIG.
A video signal of Cr / Cb format is output from the imaging device (010) to the FPGA (011) at a speed of 30 frames per second on a screen composed of 320 × 240 pixels (76800 pixels) per screen called QVGA. Shall be performed.

A video signal in the Y / Cr / Cb format is composed of a Y signal, a Cr signal and a Cb having a width of 8 bits.
Although there are three signals, the present invention will be described as a configuration that handles only the Y signal (luminance signal). It is also possible to adopt a configuration for handling the Cr signal and the Cb signal.

[0007] The video signal output from the imaging device (010) is input to an LSI called an FPGA (field programmable gate array) (011) in which a user can freely design internal logic. FPGA (0
11) is composed of two large blocks, and the video signal output from the imaging device (010) is connected to both blocks. One is a difference detection circuit (012) for performing difference image processing, and the other is a video signal interface (013).

The video signal interface (013) receives a video signal from the imaging device (010),
This block performs interface conversion with the G codec (014). The JPEG codec (014) is converted by the video signal interface (013).
By inputting the video signal output by the imaging device (010), all the pixel data of the real-time image (021) can be stored on a dedicated frame memory (015) every screen.

This frame memory (015) has a two-stage bank structure and stores the pixel data of the real-time image (021) by switching banks alternately. The previous screen is securely retained.

There are two commands to be set by the CPU (016) to the JPEG codec (014) via the CPU bus. The first is a freeze instruction, which stops updating of the screen stored in the frame memory (015) and prohibits a new screen from being stored in the frame memory (015), and is stored at that time. The second instruction is a compression instruction. When this instruction is set, the next screen is stored in the frame memory (015) or stored in the frame memory (015) by the freeze instruction. This is a command to apply image compression to the screen according to the JPEG format.

The difference detection circuit (012), which is another block in the FPGA (011) and operates in parallel with the video signal interface (013), is constituted by an algorithm for performing difference image processing, and is constituted by an imaging device. (010) is photographed and the difference detection circuit (01
Reference image (020) stored in the memory built in 2)
And a circuit for calculating and detecting the difference between the image and the image (021) captured in real time.

The detected information is sent to the CPU (016) via the CPU bus as coordinates of a rectangular area in one screen.

When the real-time image (021) changes from the reference image (020), the CPU (016) sends the real-time image (0) from the difference detection circuit (012).
21) Upon receiving the difference rectangular area information in
The frame memory (0) managed by the G codec (014)
A freeze command to the JPEG codec (015) is set in order to stop updating the pixel data of the real-time image (021) stored in 15) and hold the real-time image when the difference is detected.

Next, the CPU (016) sets a compression instruction designating a rectangular area in the pixel data of the real-time image (021) frozen and stored in the frame memory (015) in the JPEG codec (015), JPEG
The compressed data of only the difference rectangular area compressed in the format can be read.

The CPU (016) reads the compressed data of only the difference rectangular area which can be read by the above operation from the JPEG codec (014) and temporarily stores it in the memory (017).

Further, the CPU (016) connects the call with the host terminal (031) connected to the communication interface (018) via the communication path (030), and temporarily stores the call in the memory (018). The compressed data of only the difference rectangular area is transmitted to the host terminal (031).

Prior to this, the CPU (016) sends the JPE to the host terminal (031) by the same communication means as described above.
The reference image (02) obtained using the G codec (014)
Since the full screen compressed data of (0) has been transmitted, the host terminal (031) transmits the screen data of the reference image (020) obtained by decompressing the compressed image of the reference image (020) and the real-time image (021). By synthesizing and displaying a differential image obtained by decompressing the compressed data of the differential rectangular area of, a pseudo real-time image can be obtained. A portion that must be transmitted to a terminal can be completed with a small amount of communication data.

Next, the configuration of the difference detection circuit (012) in the configuration block diagram of FIG. 1 in the conventional system will be described with reference to the block diagram of FIG.

Generally, a difference detection circuit is required for the Y signal, the Cb signal, and the Cr signal to perform the difference processing from the Y / Cr / Cb format image signal in the difference detection. However, in the configuration of FIG. Y which is a luminance signal
The configuration is such that the difference detection processing is performed only for the signal.

FIG. 2 shows a block diagram of a circuit for performing a difference detection process by a conventional difference image processing method. A video signal received from the imaging device (010) in FIG. 1 to the luminance signal difference detection circuit includes luminance data (Y signal) having a width of 8 bits, a clock signal and a horizontal synchronization signal,
There are two types of timing signals composed of vertical synchronization signals.

The timing signal is input to a column counter (120). The column counter (120) counts the number of pixels “320” in the row direction (horizontal direction) representing the number of columns in one screen. When the column counter (120) finishes counting "320", it means that one row has been counted, and it becomes a count enable signal for the subsequent row counter (121).

The line counter (121) counts the number of lines "240" on one screen. When the row counter (121) finishes counting “240”, one screen is counted, and the column counter (120) and the row counter (12) are counted.
1) is preset to “1”.

The reference image storage memory cell (122)
In order to store a reference image (020) which is a set of luminance data (129) of 320 × 240 pixels in VGA,
A memory cell of 76,800 pixels is required.

A row address decoder (123) for supplying a row address by decoding the row counter (121);
A column address decoder (125) that supplies a column address by decoding a column counter (120) provides a reference image storage memory cell (12) having a matrix arrangement of rows and columns.
One cell in 2) is selected.

Data input / output control from the reference image storage memory cell (122) to the cell selected by the row address and the column address is performed by the data input / output control (124).

In operating the system, the reference image is an image in which only a still object such as a wall or a desk in the room is taken when the difference processing is applied to a surveillance camera for monitoring the entry of a suspicious person in the room. It is enough to take it in once a day.

When a reference image is fetched, the output of a row address decoder (123) and a column address decoder (125) for specifying a pixel position in one screen from a timing signal, from the first row to the first column to the 240th row and the 320th column. For one cell designated by the address change of the reference image storage memory cell (122), the data input / output control (124) switches the luminance data input as "input" to the reference image storage memory cell (122). I do.

When performing monitoring using a difference using the present system, the difference between the reference image and the real-time image is compared in pixel units.

For this reason, a reference image storage memory from the first row to the first column to the 240th row and the 320th column is output from the row address decoder (123) and the column address decoder (125) for specifying the pixel position in one screen from the timing signal. Cell (1
For one cell specified by the address change of 22), the data input / output control (124) is switched as "output" for outputting from the reference image storage memory cell (122) to the comparator (126). I do.

Thus, at the time of the difference processing, the timing signal (130) at the time of receiving the real time image is specified.
A comparator (126) compares the data value in the reference image storage memory cell (122) corresponding to the screen position from the first row to the 240th column with the value of the luminance data (129) of the real-time image. To obtain the absolute value of the difference.

After completing the above-described difference processing for one screen (76,800 pixels), the comparator (126) specifies a rectangular area on the screen including the pixel in which the difference has occurred.

Then, the row address and the column address of the upper left point of the rectangular area are recorded in the upper left coordinate register (127) of the rectangular area, and the row address and the column address of the lower right point of the rectangular area are stored in the lower right coordinate register (128) of the rectangular area. The coordinates are recorded and read by the CPU (016) of FIG. 1 to obtain the coordinates of the difference rectangular area having the difference between the reference image and the real-time image.

[0033]

The above-described conventional differential image processing method and differential image processing apparatus described with reference to FIGS. 1 and 2 have the following problems to be solved.

That is, the problem to be solved is that when executing the difference processing between the reference image and the real-time image,
Since the signal levels of all the pixels constituting each image are compared, the reference image storage memory cell (122), which is a large-capacity memory means for recording all the pixels of the reference image, is included in the system configuration. It is necessary to increase the complexity, cost and power consumption of the system.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and in a differential image processing method and a differential image processing apparatus for performing a difference between a reference image and a real-time image, a memory means required by a system for performing the differential image processing. In order to realize the simplification and cost reduction of the system configuration by limiting the capacity of the system, the reference image (020) in which only the background of the subject is photographed and recorded, and the subject and the background are photographed and recorded simultaneously; Updated real-time image (02
1) A differential image processing method for detecting an image having a difference from 1), wherein one reference image (020) and one real-time image (021) are obtained from a large number of pixels represented by a large number of rows and columns. And the reference image (0
20) a first step of adding all the pixel information corresponding to each row and each column, and a second step of adding all the pixel information corresponding to each row and each column of the real-time image (021). And a third step of detecting a difference between a result of the first step and a result of the second step, and detecting a row and a column including the pixel information of the difference generated by the real-time image (021). And a difference image processing method. And a difference image processing apparatus for detecting an image of a difference between a reference image (020) photographing and recording only the background of a subject and a real-time image (021) photographing and recording the subject and the background at the same time and being updated. Wherein one reference image (020) and one real-time image (0
21) is formed of a large number of pixels represented by a large number of rows and columns, and is a first image obtained by adding all pieces of pixel information corresponding to each row and each column of the reference image (020). A first adding unit (012) for calculating additional pixel information; and a second adding unit for calculating second additional pixel information obtained by adding all pixel information corresponding to each row and each column of the real-time image (021). Addition means of 2 (0
12) and a difference between the first added pixel information and the second added pixel information is detected, and the real-time image (0
21. A difference image processing apparatus, comprising: difference detection means (012) for detecting a row and a column including the pixel information of the difference generated by 21). It is an object of the invention to provide

[0036]

According to an aspect of the present invention, there is provided an image processing apparatus comprising: a reference image (020) in which only the background of an object is photographed and recorded; Are simultaneously photographed and recorded, and a difference image processing method for detecting a difference image from the updated real-time image (021), wherein one reference image (020) and one real-time image (021) are respectively It is formed from a large number of pixels represented by a large number of rows and columns,
A first step of adding all pieces of pixel information corresponding to each row and each column of the reference image (020); and a step of adding each pixel information corresponding to each row and each column of the real-time image (021). A second step of adding all, and detecting a difference between a result of the first step and a result of the second step, and obtaining the real-time image (021)
And a third step of detecting a row and a column including the pixel information of the difference generated by the method. "I will provide a.

In order to further solve the above-mentioned problem, the invention according to claim 2 of the present application is directed to a method in which a reference image (020) in which only the background of an object is photographed and recorded, and the object and the background are simultaneously photographed and recorded. And a difference image processing apparatus for detecting an image of a difference from the updated real-time image (021), wherein each of the reference image (020) and the real-time image (021) has a large number of rows and columns. And a first adding means for calculating first added pixel information obtained by adding all pixel information corresponding to each row and each column of the reference image (020). (012) and second addition means (01) for calculating second addition pixel information obtained by adding all pieces of pixel information corresponding to each row and each column of the real-time image (021). ) And a difference that detects a difference between the first added pixel information and the second added pixel information and detects a row and a column that include the pixel information of the difference generated by the real-time image (021). Detecting means (01
2) A differential image processing apparatus comprising: "
I will provide a.

[0038]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a system for performing difference image processing according to a first embodiment of the present invention will be described with reference to FIG.

In the present embodiment, “an image of a difference between a reference image (020) that captures and records only the background of a subject and a real-time image (021) that captures and records and updates the subject and the background simultaneously. Wherein the reference image (020) and the real-time image (021) are formed from a large number of pixels represented by a large number of rows and columns, respectively.
A first step of adding all pieces of pixel information corresponding to each row and each column of the reference image (020); and a step of adding each pixel information corresponding to each row and each column of the real-time image (021). A second step of adding all, and detecting a difference between a result of the first step and a result of the second step, and obtaining the real-time image (021)
And a third step of detecting a row and a column including the pixel information of the difference generated by the method. "And a reference image (020) that captures and records only the background of the subject, and a real-time image (0) that captures and records the subject and the background at the same time and is updated.
21) is a difference image processing apparatus for detecting an image having a difference from the reference image (21), wherein one reference image (020) and the real-time image (021) are obtained from a large number of pixels represented by a large number of rows and columns. A first adding means (012) which is formed and calculates first added pixel information obtained by adding all pieces of pixel information corresponding to each row and each column of the reference image (020); Image (0
21) second adding means (012) for calculating second added pixel information obtained by adding all pieces of pixel information corresponding to each row and each column, and the first added pixel information and the second added pixel information. Difference detecting means (012) for detecting a difference between the pixel information and the added pixel information and detecting a row and a column including the pixel information of the difference generated by the real-time image (021).
And a difference image processing device. ".

The overall configuration of the system for performing difference image processing in the present embodiment is the same as the configuration block diagram of FIG. 1 used in the description of the prior art.

In this embodiment, the difference detection circuit (012) in FIG. 1 has the configuration shown in the block diagram of FIG. In FIG. 3, the luminance data (001) input to the difference detection circuit (012) is a timing signal (00) including a bit clock, a horizontal synchronization signal, and a vertical synchronization signal.
Each pixel corresponds to one bit clock of 2).

In this embodiment, since the QVGA image is handled, the total number of pixels is 320 pixels per row,
There are 76 800 pixels in 240 rows per column, and the luminance data (001) is accompanied by a bit clock. This is repeated as a screen.

The timing signal (002) is input to the column counter (100) and counts the number of pixels "320" in the row direction representing the number of columns in one screen. When the column counter (100) finishes counting "320", it means that one row has been counted, and it becomes a count enable signal for the subsequent row counter (101).

The line counter (101) is used to count the number of lines in one screen 2
Count 40. When the row counter (101) finishes counting 240, it means that one entire screen has been counted, and the column counter (100) and the row counter (101) are each preset to “1”.

The assertion of the vertical synchronizing signal of the timing signal (002) is the start of the screen, and the column counter (100) and the row counter (101) are each preset to "1".

The operation of the system of the present embodiment having the above-described configuration will be described. First, the capture of row reference data and column reference data based on a reference image and a reference image serving as a comparison reference for difference processing will be described.

The luminance data (001) is applied to the row adder (10).
7), and has a capacity of 17 bits for each bit clock of the timing signal (002), and is added to the output of the row buffer (108) for temporarily storing the operation process. The result of the addition operation is recorded again in the row buffer (108) by using the inverted edge of the bit clock or a clock having a frequency twice the frequency synchronized with the bit clock.

The above operation is performed by using the third pixel from the first pixel in the m-th row.
Row buffer (108) by repeating addition up to 20 pixels
, The output of the row buffer (108) at the time of the 320th pixel is obtained as the sum of pixel data of one row of the mth row.

The row-based sum value memory cell (110) has 17 bits per cell and is composed of 240 cells, which is the total number of rows in one screen. The value output by the row counter (101) is stored in the row decoder (110). The result decoded by (109) is given as the address of the row-based total memory cell (110), so that one cell corresponding to the m-th row is selected from the 240 cells, and the luminance data (00
The output of the row buffer (108) at the time of the 320th pixel in the m-th row, which is the sum value of 1), is written.

By repeating the above write operation 240 times, which is the number of rows for one screen, the row-based total sum memory cell (1
The total value of each row is recorded in all the cells of 10) and becomes reference data.

The column decoder (103) decodes the count value of the column counter (100) which counts the number of pixels "320" in the row direction representing the number of columns of one screen, and outputs a column buffer (104) and a column-based total. An address designating a column address from the first column to the 320th column is supplied to the value memory cell (105).

The column buffer (104) for temporarily storing the operation process is composed of cells corresponding to the first to 320th columns, and one of the cells has a capacity of 16 bits.
The outputs are bus-connected.

The luminance data (001) in the n-th column and the m-th row is output from the cell output in the n-th column of the column buffer (104) addressed by the column decoder (103) in accordance with the bit clock timing of the timing signal (002). The addition operation is performed in the adder (102), and the output is recorded again in the same cell using the inverted edge of the bit clock.

The above operation and writing are performed in the first row of the m-th row.
From the column to the 320th column, the cell corresponding to the first column of the column buffer (104) corresponds to the 320th column while shifting the column by one every bit clock of the timing signal (002) for each row. The addition and update of the luminance data (001) of 320 pixels are repeated up to the cell.

The first to 32nd columns of the column buffer (104)
By repeating the addition update to the cell corresponding to column 0 240 times, which is the maximum value of the number of rows in one screen,
The data addition of 240 pixels dependent on the cells of all 320 columns of the column buffer (104) is completed.

The column-based sum value memory cell (105) is composed of 320 cells, which is 16 bits per cell, which is the total number of columns in one screen, as in the column buffer (104).

The reference data is taken in the column buffer (1
04), when the addition of all the cells is completed, that is, the output after the pixel at the 320th column and the 240th row which is the last pixel of one screen is recorded in the column buffer (104), the column-based total sum memory cell (105 ) To complete.

By executing the above operation, the fetching of the reference data of the row and the column is completed. Next, FIG.
The difference detection processing of the real-time image will be described with reference to FIG.

The luminance data (001) of the real-time image
Is input to the row adder (107) and the timing signal (00
An addition operation is performed with the output of the row buffer (108) having a capacity of 17 bits for each bit clock of 2).

The result of the addition operation is recorded again in the row buffer (108) using the inverted edge of the bit clock. The above calculation and recording are repeated by adding the first pixel to the 320th pixel in the m-th row, and the row buffer (1
08) is continuously obtained to obtain the pixel data total value for one row of the m-th row in the same manner as when the reference data is obtained.

Thereafter, the row decoder (109) compares the output of the row-based total sum memory cell (110) addressed to the m-th row and the output data of the row buffer (108) with a row comparator (111). To calculate the difference between the two outputs.

The above operation is performed in order from the first row. In the difference comparison operation of the row comparator (111), the value of the row decoder (109) at the time when the first difference occurs is calculated by the upper left of the difference rectangular area. The coordinates are recorded in the difference detection rectangular area register (112) as row coordinates.

When the result of the difference comparison between the reference sum value memory cell (110) and the output of the row buffer (108) becomes the same, when the continuity of the difference is interrupted, or when the difference is continued, the data is transferred to the 240th line. When the value reaches the value, the value of the row decoder (109) is recorded in the difference detection rectangular area register (112) as the row coordinate of the lower right coordinate of the difference rectangular area.

Next, the process for obtaining the sum of the columns will be described with reference to FIG.

The luminance data (00
1) is added by the column adder (102) to the output of the column buffer (104) addressed by the column decoder, and the column buffer (10) of all 320 cells is provided for each row.
4) is updated.

The above update is started from the first line, which is the first line of the screen, and is repeated.
In 40 rows, data addition of 240 pixels dependent on each of all 320 cells of the column buffer (104) is completed.

Now, the luminance data of the 240th row and the 1st column is added to the output of the 1st column cell of the column buffer (104), and
When the first column output of the same column buffer (104) has been updated with the inverted edge of the bit clock of the timing signal (002) or a clock having a frequency that is twice the frequency synchronized with the bit clock, the subordinate depends on the first column of the real-time image. 24
This means that the data addition of 0 pixel has been completed, and the first positive edge of the bit clock causes the first buffer of the column buffer (104).
The column output and the output of the first column cell of the column reference sum value memory cell (105) as the reference data are the column comparator (106).
Performs a comparison operation.

The above-described comparison operation is continuously performed on line 240, line 2
The column luminance data and the output of the second column of the column buffer (104) are compared by a column comparator (106),
Row 3 column ... and row 240, column 320.

As described above, while the comparison operation from the first column to the 320th column is repeated, the difference of the column decoder (103) when the first difference occurs in the result of the difference comparison operation by the column comparator (106). The value is recorded in the difference detection rectangular area register (112) as the column coordinates of the upper left coordinates of the difference rectangular area.

Then, as a result of the difference comparison operation by the column comparator (106), when the continuity of the different columns is interrupted or when the continuity of the difference reaches the 320th column, the column decoder (103) Is recorded in the difference detection rectangular area register (112) as the column coordinates of the lower right coordinate of the difference rectangular area.

By executing the above calculations, the CPU (016) of the system according to the present embodiment shown in FIG. 1 is newly shot from the screen captured by the imaging device (010) without being present on the reference screen. The coordinates of the rectangular area including the detected object on the screen can be obtained in real time.

In the present embodiment described above,
In the conventional system described with reference to FIG.
As shown in FIG. 3, the required memory capacity is changed to 14320 bits (3800 bits × 8 bits).
20 × 16 bits, 320 × 16 bits, 240 × 17
) To reduce the required memory capacity.

In the above-described embodiment, one cell of the row-based total value memory cell (110) is 17 bits, and one cell of the column buffer (104) and the column-based total value memory cell (105) is 16 bits. These bits have a bit length of 17 bits for addition of one row having 320 pixels because the luminance data of one pixel has an 8-bit width.
Bit, and one column also having 240 pixels is 1
This is because 6 bits are required.

Therefore, in implementing the present invention, the reference memory may be appropriately configured with an optimum bit length according to the image format to be used, the hardware configuration, the required accuracy, and the like. Of course, it is not limited.

Further, in the above-described embodiment, the configuration in which the screen size of the QVGA is handled and the width of 17 bits is required in the row direction and the width of 16 bits is required in the column direction has been described above. If the lower 8 bits are omitted, a comparison operation can be performed with the row addition result being 9 bits and the column addition result being 8 bits.

Using the above configuration, for example, a small change such as a change in sunlight illuminance for about 30 minutes during the daytime outdoors where the total added value of the rows or the total added value of the columns is less than the range of the lower 8 bits. It can be configured not to detect the difference.

In the above description, the number of bits to be omitted is set to the lower 8 bits. However, if the number of omitted bits is reduced, the accuracy of difference detection is improved, and if the number of bits is increased, noise resistance is improved. Judging from the target screen, each line,
By setting the number of bits to be omitted for each column, weighting can be given in the screen, and the configuration may be such that the difference detection accuracy can be customized.

Next, as a second embodiment of the present invention, a position for detecting an object to be detected newly appearing on the screen is specified to a number of points smaller than the total number of pixels, and a row-based total value memory is specified. Cell (111) and column-based sum value memory cell (10
The difference image processing method and the difference image processing apparatus in which the number of bits omitted from the cell 5) is optimized to reduce the necessary total logic amount will be described below with reference to FIGS.

FIG. 4A is a reference image (equivalent to 020 in FIG. 1) in which a new object is not shown.

The difference detection circuit (not shown) in this embodiment performs an addition operation by sampling once every 16 pixels for both rows and columns in order to reduce the size of the circuit.

The grid shown in FIG.
Pixels are divided by 16 pixels in the column direction, and intersections indicate sampling positions. The numbers around the screen in FIG. 4B represent weighting coefficients in the row and column directions, and the CPU (016) shown in the block diagram of FIG. 1 has the same in the memory (017) of FIG. Recorded in the table.

FIG. 4 (C) shows the result of addition on the lines of rows and columns when a new detection target male not included in the reference image appears on the screen. The difference detection status compared with is displayed.

On the other hand, FIG. 4 (D) shows a cloud on the roof, which is also a new object to be detected, on the screen. Is smaller than the range represented by the omitted 8 bits, so that the difference is not detected.

FIG. 5 is a hardware block diagram for performing the difference detection operation shown in FIG. 4, and the description of the second embodiment will be continued with reference to FIG.

The 320 × 240 pixels constituting one screen are
Assuming that 16 × 16 pixels are one block, the row direction is composed of 20 blocks and the column direction is composed of 15 blocks. In FIG. 5, only the difference detection circuit in the row direction in FIG. 3 is picked up and shown, and the difference detection circuit in the column direction having the same configuration is omitted.

In FIG. 5, the timing signal (002)
Includes a bit clock, a horizontal synchronizing signal, and a vertical synchronizing signal. The block counter (140) resets at the screen start position from the vertical synchronization signal, and resets the timing signal (0
02), 16 pixels are counted by the bit clock.

In the column counter (141), the output of the block counter (140) is used as an enable signal, and one row is counted by counting 20 blocks. The row counter (142) uses the output of the column counter (141) as an enable signal and counts 15 blocks, thereby obtaining 1
Count the screen.

The row decoder (143) includes a row counter (1).
Upon receiving the output of (42), the result of decoding the binary code is generated as an address signal, and is supplied to a row-based total value memory cell (148) composed of 13 bits per cell. The luminance data (001) is 8 bits, and the addition of 20 blocks requires a depth of 13 bits.

The luminance data (001) and the output of the row buffer (145) having a width of 13 bits are output from a timing signal (002).
Row adder (144) is added according to the bit clock of
This result is written into the row buffer (145) again with an inverted edge of the bit clock or a clock having a frequency double that synchronized with the bit clock.

The above addition is performed over the luminance data (001) of 20 blocks dependent on one row, and the addition of the 240th pixel which is the last pixel of the row is completed.
When the data is recorded in step 5), the cycle of one line ends.

The output of the row buffer (145) is shown in FIG.
In the row bit width adjuster (146) whose operation length is set to omit the lower 8 bits from the PU (016), the lower 8 bits are omitted from the 13-bit width, and the row decoder (143)
Is input to the row reference sum value memory cell (148).
As for the omitted bit width, weight information is set by the row bit width recording unit (147) from the CPU (016 in FIG. 1) in block units of rows.

For example, in FIG. 4B, weighting information from "0" to "3" is assigned to each block line. Here, the setting "0" means that all 13 bits are omitted, and the difference detection is performed. Setting 1 indicates that the lower 12 bits are omitted, setting 2 indicates that the lower 8 bits are omitted, and setting 3 indicates that the lower 4 bits are omitted. The smaller the number of omitted bits, the higher the difference detection sensitivity. The larger the omitted bit, the smaller changes are ignored. Note that “0” is assigned to the omitted bit string.

In the conventional difference image processing method and the difference image processing apparatus, the data processing amount is large and the software has to perform the processing. However, if the second embodiment is applied as described above, the data amount to be handled is Can be a system with a small number. Therefore, in the second embodiment, in addition to the effects of the first embodiment described above, an effect that the system can be reduced in size or realized only by hardware is added.

In implementing the present invention, it is also possible to adopt a configuration in which statistics of the difference detection status of the rows and columns per unit time are obtained, and a learning function is added to the above-described customizing function.

Furthermore, it is also possible to adopt a configuration and a method of detecting only pixels having a difference by picking up pixels commonly included in rows and columns determined to have “a difference”. Included in the implementation.

[0096]

As described in detail above, the present invention provides
"Reference image (020) that captures and records only the background of the subject
And a real-time image (021) that simultaneously captures and records the subject and the background and detects a difference between the real-time image and the real-time image that is updated. (021)
Each of the pixels is formed from a large number of pixels represented by a large number of rows and columns, and all pixel information corresponding to each row and each column of the reference image (020) is added.
A second step of adding all pixel information corresponding to each row and each column of the real-time image (021), and a result of the first step and the second step.
A third step of detecting a difference from a result of the step and detecting a row and a column including the pixel information of the difference generated by the real-time image (021). . Or “A difference image processing apparatus that detects an image of a difference between a reference image (020) that captures and records only the background of a subject and a real-time image (021) that captures and records the subject and the background simultaneously and is updated. And one reference image (02
0) and the real-time image (021) are formed from a large number of pixels represented by a large number of rows × columns, and each pixel information corresponding to each row and each column of the reference image (020). A first addition unit (012) for calculating first addition pixel information obtained by adding all the pixel information, and a second addition unit for adding all the pixel information corresponding to each row and each column of the real-time image (021). A second adding means (012) for calculating additional pixel information;
A difference detecting unit (012) for detecting a difference between the added pixel information of the second and the second added pixel information to detect a row and a column including the pixel information of the difference generated by the real-time image (021). A differential image processing device comprising: Therefore, by limiting the capacity of the memory means required by the system for performing the difference image processing, there is an effect that the configuration of the system is simplified and the cost is reduced.

[Brief description of the drawings]

FIG. 1 is an overall block diagram of a differential image processing system common to first and second embodiments of the present invention and further to the prior art.

FIG. 2 is a block diagram of a difference detection circuit in the difference image processing system of the related art.

FIG. 3 is a block diagram of a difference detection circuit in the difference image processing system according to the first embodiment of the present invention.

FIG. 4 is a schematic diagram of an image for explaining difference image processing executed by a difference image processing system according to a second embodiment of the present invention;

FIG. 5 is a block diagram of a difference detection circuit in the difference image processing system according to the second embodiment of the present invention.

[Explanation of symbols]

012 Difference detection circuit (first addition means, second addition means, difference detection means) 020 Reference image 021 Real-time image

Continued on front page F term (reference) 5C054 FC00 FC01 FC12 FC15 GB01 GB12 HA18 5C084 AA02 AA08 AA13 BB06 BB31 CC19 DD12 GG43 GG44 GG45 GG52 GG56 GG57 GG61 GG78 5L096 BA02 GA08 HA02

Claims (2)

[Claims] 1. A differential image processing method for detecting a difference image between a reference image in which only a background of a subject is photographed and recorded and a real-time image in which the subject and the background are photographed and recorded simultaneously and updated. The reference image and the real-time image are each formed of a large number of pixels represented by a large number of rows × columns, and all pixel information corresponding to each row and each column of the reference image are all added. A second step of adding all pixel information respectively corresponding to each row and each column of the real-time image; and detecting a difference between a result of the first step and a result of the second step. And detecting a row and a column including the pixel information of the difference generated by the real-time image.
And a difference image processing method. 2. A difference image processing apparatus for detecting a difference image between a reference image in which only the background of a subject is photographed and recorded and a real-time image in which the subject and the background are photographed and recorded simultaneously and updated. The reference image and the real-time image are each formed of a large number of pixels represented by a large number of rows × columns, and all pixel information corresponding to each row and each column of the reference image are all added. First adding means for calculating the first added pixel information, and second calculating the second added pixel information by adding all the pieces of pixel information corresponding to each row and each column of the real-time image. Adding means, detecting a difference between the first added pixel information and the second added pixel information, and a row and a column including the pixel information of the difference generated by the real-time image Difference image processing apparatus characterized by comprising a differential detection means for detecting.