JP2001189361A - Insulating film evaluation method, device, and system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an insulating film evaluation method, a device, and a system, where the reliability of an insulating film can be evaluated for its entire surface in a short time. SOLUTION: An insulating film. evaluation device is equipped with voltage sources which apply voltages to an insulating film formed on a base, voltage transfer members which transfer voltages applied from the voltage sources to the insulating film, a detection means which detects whether a leakage current flows through the insulating film when the voltages are applied to it from the voltages sources, and a calculating means which calculates the distance between the voltage transfer members and sites through which the leakage current flows, so as to locate the site through which the leakage current flows, and the reliability of the insulating film is evaluated by the film evaluation device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating film evaluation method for detecting whether a leak current flows through an insulating film by applying a voltage to the insulating film formed on a substrate, an insulating film evaluating apparatus, and an insulating film. Regarding the evaluation system.

[0002]

2. Description of the Related Art MOs conventionally used for large-scale integrated circuits
In order to improve the performance of the S transistor, it is effective to reduce the thickness of the gate insulating film or to apply a high electric field to the gate insulating film. The gate insulating film is several tens at the top level.
As the film thickness has been reduced to 0 °, the electric field applied to the gate insulating film at the time of transistor operation has been increased to about 5 MV / cm. Has been seen.

On the other hand, in the manufacture of semiconductor devices, silicon substrates have been increasing in diameter from the viewpoint of economies of scale.
A 12-inch diameter is being put to practical use, and from the viewpoint of yield control, it is required to strictly control the occurrence of defects in the manufacturing process. At such a management requirement level, the presence or absence of several levels of defects in the entire silicon substrate also becomes a problem, and in the evaluation using the representative point sampling method for several points in the silicon substrate surface, it is impossible to detect effectively. Have difficulty.

For this reason, as a method of evaluating the reliability of a gate insulating film in manufacturing process control, it is first required to efficiently detect the number of defects in the entire large-diameter silicon substrate.
In addition, it is also important to identify the shape of the defect distribution on the large-diameter silicon substrate when examining the deterioration factor in the process.

[0005] This is because deterioration factors in the manufacturing process include in-plane non-uniformity of the silicon substrate in various processes, and
This is because local dust or contaminants generated from the device mechanism often adhere to the silicon substrate, which is a cause of reliability deterioration.

In order to effectively evaluate the reliability of a gate insulating film related to such manufacturing process control, “Evaluation of initial withstand voltage” and “B-mode SILC (Stress-Induced Leakage)
Current) evaluation ”. Each of these evaluation methods measures a leak current flowing through the gate insulating film in relation to the deterioration of the gate insulating film, and evaluates the reliability of the gate insulating film based on the measured leak current.

However, the initial withstand voltage evaluation is easy based on a low electric field stress of about 4 to 5 MV / cm, which is about the electric field applied to the gate insulating film when the transistor is normally operated. The reliability is evaluated by detecting whether or not a leak current flows through the gate insulating film. A defect through which a leak current flows is called hard breakdown.

This defect is caused by particles on the silicon substrate on which the gate insulating film is formed, or surface crystal defects of the silicon substrate called COP, and when a very low electric field stress is applied to the gate insulating film. Then, a leak current flows through this defect.

Further, in the B-mode SILC evaluation, when the thickness of the gate insulating film is, for example, several tens of degrees or less, after applying an electric field stress of, for example, 12 MV / cm or more to the gate insulating film, the gate insulating film is again evaluated. Is applied, and the reliability is evaluated by detecting whether or not a leak current flows through the gate insulating film asymptotically based on the applied voltage.

Regarding the B-mode SILC evaluation, 199
6th International Solid State Materials Conference Conference, 782 (K. Okada, Extended abstracts of the 1996 Internati
onal Conference on Solid-State Devices and Materia
ls, p. 782, 1996). Also, Japanese Patent Application Laid-Open
Japanese Patent Application Laid-Open No. 1-186351 describes a B-mode SILC evaluation method.

Here, for example, 12M
When an electric field stress of V / cm or more is applied, a current called Fowler-Nordheim tunnel current (hereinafter, referred to as “FN tunnel current”) flows through the gate insulating film. The gate insulating film in which the FN tunnel current has flowed may have a deteriorated portion in which a leak current flows, which is called soft breakdown.

FIG. 12 shows the evaluation of the initial withstand voltage and the B-mode SI.
FIG. 4 is a diagram illustrating electric field stress applied to a gate insulating film and leak current flowing through the gate insulating film in order to perform LC evaluation. Note that FIG.
It shows a gate current flowing through the gate insulating film when an electric field stress of V / cm or more is applied.

When an electric field stress is applied to the gate insulating film when there is a defect in the gate insulating film, a gate current immediately flows through the gate insulating film as shown by "destructive leak current" in FIG.

On the other hand, when there is no defect in the gate insulating film,
When an electric field stress is applied to the gate insulating film, as shown in FIG. 12 as “before electric field stress”, for example, 10 MV / cm
Under the following electric field stress, an extremely low level leakage current flows. For example, at an electric field stress of 12 MV / cm or more, an FN tunnel current flows.

Further, for example, 12 MV
When the electric field stress is applied again after applying the electric field stress of not less than 4 to 8 MV / cm, as shown in FIG. Leakage current flows through the film. This is because, as described above, for example, 12 MV
This is because a defective portion was generated by applying an electric field stress of / cm or more.

FIG. 13 is a configuration diagram of an evaluation device for performing an initial withstand voltage evaluation. The evaluation apparatus shown in FIG. 13 includes a substrate support 10 supporting the silicon substrate 1 having the gate insulating film 2.
And a mercury holding nozzle 58 for forming a mercury droplet 48 on the gate insulating film 2, and a current measuring / cum-voltage source 30 connected to the mercury holding nozzle 58 via the connection lead 35.

In FIG. 13, reference numeral 7 denotes a defect in the gate insulating film 2. Also, the mercury holding nozzle 5
Reference numeral 8 denotes a tube having electrical conductivity. Further, a portion of the gate insulating film 2 where the mercury droplet 48 is formed is referred to as an electric field application region.

Next, the operation of the evaluation apparatus shown in FIG. 13 will be described. First, a silicon substrate 1 having a gate insulating film 2 is attached to a substrate support 10 to support the substrate. Then, a mercury holding nozzle 5 is provided on the gate insulating film 2.
8 is used to form a mercury drop liquid 8. Specifically, mercury flows along the tube wall of the mercury holding nozzle 58 by capillary action and flows toward the gate insulating film 2 side, and the surface of the gate insulating film 2 becomes hemispherical with a diameter of about several millimeters due to surface tension. A drop 48 is formed.

Note that the mercury droplet 48 is
8 and a connection lead 35, it is electrically connected to the current measuring / cum-voltage source 30. Here, mercury is a substance that is used because it has fluidity and sufficient electrical conductivity at room temperature, so that the electrical characteristics of the gate insulating film can be easily evaluated.

Subsequently, a voltage is applied to the mercury droplet 48 from the current measuring / voltage source 30. Thus, a voltage is applied to a portion where the mercury droplet 48 and the gate insulating film 2 are in contact. That is, this portion becomes an electric field application region. The applied voltage is, for example, 2 MV / c applied to the gate insulating film 2.
The voltage value is such that an electric field stress of m is applied.

When a voltage is applied to the mercury droplet 48, a current corresponding to the voltage flows. The current measuring device / voltage source 30 determines whether the gate insulating film 2 has a defect 7 by measuring the current. That is,
If there is a defect 7 in the electric field application region, when a voltage is applied to the mercury droplet 48, a leak current flows through the defect 7, so that the current value measured by the current measuring device / voltage source 30 becomes smaller than the applied voltage. This is because it is different from the corresponding one.

Subsequently, the voltage value of the applied voltage is increased so that an electric field stress of, for example, about 12 MV / cm is applied to the gate insulating film 2. During this time, the current value is measured by the current measuring device / voltage source 30 to check whether or not the defect 7 occurs in the gate insulating film 2.

After evaluating the reliability of the gate insulating film 2 at that position, the applied voltage is set to 0 V, and the mercury holding nozzle 85 is moved on the gate insulating film 2. The reliability of the gate insulating film 2 is evaluated by the same method as described above.

However, with the evaluation device shown in FIG. 13, it was difficult to quickly evaluate the reliability of the gate insulating film.
A technique for performing the above-described evaluation by measuring the current according to the applied voltage while continuously moving the mercury holding nozzle 85 while applying a voltage to the mercury droplet 48 by the current measuring device / voltage source 30, A technique for performing the above-described evaluation at a plurality of positions at once by providing the mercury holding nozzle 85 is described.

FIG. 14 is a configuration diagram of an evaluation apparatus for performing B-mode SILC evaluation. The evaluation device shown in FIG. 14 includes a probe pin 23 for supplying a current to a plurality of gate electrodes 3 formed together with a plurality of insulating layer sidewalls 4 on the gate insulating film 2. Reference numeral 8 denotes a defect in the gate insulating film 2.

In FIG. 14, the same parts as those in FIG. 13 are denoted by the same reference numerals. Probe pin 2
3 is electrically connected to the current measuring / cum-voltage source 30 via the connection lead wire 35.

The reason why the plurality of gate electrodes 3 are formed on the gate insulating film 2 is to evaluate the reliability of the portion of the gate insulating film 2 where the gate electrode 3 is formed (electric field application region). To do it. That is, since an electric field is applied only to the electric field application region, if there is a deteriorated portion 8 in this region,
It can be detected.

Next, the operation of the evaluation device shown in FIG. 14 will be described. First, a silicon substrate 1 having a gate insulating film 2, a plurality of gate electrodes 3, and a plurality of insulating layer side walls 4 is attached to a substrate support 10 to support the substrate. Then, the probe pin 23 is brought into contact with any one of the gate electrodes 3.

Subsequently, a voltage is applied to the probe pin 23 from the current measuring device / voltage source 30 for, for example, 1000 seconds. Thereby, a voltage is applied to a portion where the probe pin 23 and the gate electrode 3 are in contact. Note that the applied voltage has a voltage value at which an electric field stress of, for example, 12 MV / cm is applied to the gate insulating film 2.

After a voltage is applied for, for example, 1000 seconds,
A voltage is applied to the gate electrode 3 again. This applied voltage has a voltage value at which an electric field stress of, for example, 2 MV / cm is applied to the gate insulating film 2. And
A current corresponding to the voltage is measured by a current measuring device / voltage source 30 to check whether or not the deteriorated portion 8 has occurred in the gate insulating film 2.

That is, if a deteriorated portion 8 occurs in the electric field application region of the gate insulating film 2, a leak current flows through the deteriorated portion 8 when a voltage is applied to the gate electrode 3. Therefore, the current value measured by the current measuring device / voltage source 30 is different from the value corresponding to the applied voltage.

Subsequently, the voltage value of the applied voltage is gradually increased and, for example, 12 MV / cm
A certain level of electric field stress is applied. During this time,
A current value is measured by a current measuring device / voltage source 30 to check whether or not the deteriorated portion 8 has occurred in the gate insulating film 2.

After evaluating the reliability of the gate insulating film 2 at that position, the applied voltage is set to 0 V, and the probe pin 23 is moved on the other gate electrode 3. The reliability of the gate insulating film 2 is evaluated by the same method as described above.

[0034]

However, when the reliability of the gate insulating film is evaluated by the evaluation apparatus shown in FIG. 13, the reliability of the gate insulating film is determined by directly forming a mercury droplet on the gate insulating film. During the evaluation, the gate insulating film was exposed to the air during the evaluation. For this reason, molecules such as moisture and organic substances from the air may be adsorbed on the surface of the gate insulating film, and this changes the surface potential state of the gate insulating film, and the evaluation is reliable. Was not always possible.

Further, in the evaluation apparatus shown in FIG. 13, since the reliability of the gate insulating film was evaluated by mercury droplets,
In some cases, mercury remains in the gate insulating film, though it is very small. In this case, since the surface of the gate insulating film is contaminated, even when the electrical characteristics are measured again with the gate insulating film, reproducibility of the measurement may not be obtained.

When the reliability of the gate insulating film is evaluated by the evaluation device shown in FIG. 14, a plurality of gate electrodes are formed on the gate insulating film. In this case, the gate electrode is formed. The reliability cannot be evaluated for the parts that do not. This results in a result similar to that of sampling the electric field application region, and effective detection may not be performed in some cases.

Further, when the reliability of the gate insulating film is evaluated by the evaluation apparatus shown in FIG. 14, the electric field stress is applied to each of the plurality of gate electrodes, for example, every 1000 seconds. Therefore, an evaluation device that can evaluate a gate insulating film in a short period of time has been desired.

Accordingly, an object of the present invention is to provide an insulating film evaluation method, an insulating film evaluation apparatus, and an insulating film evaluation system that can evaluate the reliability of an insulating film such as a gate insulating film so that the surface potential state does not change. And

Another object of the present invention is to provide an insulating film evaluation method, an insulating film evaluation apparatus, and an insulating film evaluation system that can evaluate the reliability of the entire surface of an insulating film such as a gate insulating film in a short period of time. .

[0040]

In order to solve the above-mentioned problems, the present invention provides a method of applying a voltage to an insulating film formed on a substrate and determining whether a leak current flows through the insulating film by the applied voltage. In the method for evaluating an insulating film to be detected, the voltage is applied to the insulating film via a plurality of positions of an electrode formed on the insulating film.

Further, the insulating film evaluation apparatus of the present invention comprises a plurality of voltage sources for applying a voltage to the insulating film formed on the substrate,
A plurality of voltage transmitting members connected to each of the plurality of voltage sources and transmitting a voltage applied by the voltage sources to the insulating film; and a leakage current flowing into the insulating film by the voltages applied by the plurality of voltage sources. Detecting means for detecting whether or not the insulating film flows, to evaluate the reliability of the insulating film.

Further, the insulating film evaluation system of the present invention
A plurality of voltage sources for applying a voltage to the insulating film formed on the base, and a plurality of voltage transmitting members connected to each of the plurality of voltage sources and transmitting the voltage applied by the voltage source to the insulating film Detecting means for detecting whether or not a leak current flows through the insulating film by the voltages applied by the plurality of voltage sources; and each of the plurality of voltage transmitting members for specifying a position where the leak current flows. And a calculating means for calculating a distance between the leak current and a position where the leak current flows, to evaluate reliability of the insulating film.

[0043]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 FIG. 1 is a configuration diagram of an evaluation system including an evaluation device for evaluating the reliability of a gate insulating film of a semiconductor device according to an embodiment of the present invention. In the present embodiment, the “initial withstand voltage evaluation” is performed by the evaluation system shown in FIG.
Is explained.

The evaluation system shown in FIG. 1 comprises a substrate support 10 for supporting a silicon substrate 1 having a gate insulating film 2 and a gate electrode layer 3, and a plurality of inner peripheral probe pins which are a plurality of voltage transmitting members. A pin support insulator 25 having a plurality of probe pins 22 and a plurality of outer peripheral probe pins; a plurality of current measuring and voltage sources 30 connected to the pin supporting insulator 25 via connection leads 35; And a connection selection circuit 33 for selecting a connection destination of the voltage source 30. Reference numeral 7 denotes a defect in the gate insulating film 2.

The connection selection circuit 33 is arbitrarily provided. When the number of the inner peripheral probe pins 20 is larger than the number of the current measuring device / voltage source 30, the connection selection circuit 33 connects the current measuring device / voltage source 30 to the inner peripheral probe pin 20. The connection time can be switched so that the evaluation time for evaluating the reliability of the gate insulating film is reduced.

The substrate support 10 is provided with the gate insulating film 2
And a temperature controller 12 for controlling the temperature of the silicon substrate 1 having the gate electrode layer 3. Each of the inner probe pins 20 is electrically connected to the current measuring / cum-voltage source 30 via the connection lead 35 and the connection selection circuit 33. Each of the outer peripheral portion probe pins 22 is grounded via a connection lead wire 35 and a connection selection circuit 33.

The evaluation system shown in FIG. 1 includes a control device 39 for controlling the applied voltage value applied by the plurality of current measuring devices and voltage sources 30 and the temperature of the gate insulating film 2 heated by the temperature controller 12. A data processing device 38 for performing arithmetic processing for specifying the position of the defect 7 based on the current values measured by the plurality of current measuring devices and voltage sources 30, and a current measuring device and voltage source 30 output to the data processing device 38 And a control signal circuit 37 for selecting the result of the calculation.

For the silicon substrate 1, a P-type substrate having a diameter of, for example, 8 inches and a resistivity of about 1 Ω · cm is used. To form a gate insulating film 2 having a thickness of, for example, 70 °.

Further, for example, by a CVD reaction of a hydrogen-diluted silane gas to which a slight amount of phosphine gas is added,
Polysilicon having a thickness of about 00 ° is deposited, and is subjected to a heat treatment at, for example, 1020 ° C. for 50 seconds by an infrared lamp anneal or the like, thereby activating the doping impurity phosphorus in the polysilicon, thereby forming the gate insulating film 2. A gate electrode layer 3 having conductivity is formed. The gate electrode layer 3 thus formed has an average layer resistance of 1.3 k.
In square ohms, the variance is of the order of 2.1%.

FIGS. 2 to 5 are plan views of the pin supporting insulator 25. FIG. In the pin support insulator 25 shown in FIG. 2, pins P05 to P16 are provided at equal intervals of, for example, 30 mm as outer peripheral probe pins 22, and pins P01 to P04 are set at, for example, 30 mm as a plurality of inner peripheral probe pins 20. Provided at intervals.

Here, the electric field application region is a region of the gate insulating film 2 which is subjected to electric field stress because it is surrounded by a plurality of inner peripheral probe pins. The shield bias region is defined as a plurality of inner peripheral probe pins 20.
And a plurality of outer peripheral probe pins 22.

As shown in FIGS. 3 to 5, each of the pins constituting the plurality of outer probe pins 22 and the respective pins constituting the plurality of inner probe pins 20 are provided, for example, at equal intervals. There is no limitation on the number of pins as long as each pin forms a polygon.

Note that, for example, the pin support insulator 25 shown in FIG. 3 has a relatively larger area of the electrolytic application region than the shield bias region than the pin support insulator 25 shown in FIG. The evaluation of the gate insulating film can be performed quickly.

FIG. 6 is an explanatory diagram of the principle of evaluating the reliability of the gate insulating film 2 by the evaluation system shown in FIG. FIG. 6A is a diagram illustrating a state in which a voltage is applied so that an electric field stress of, for example, 2 MV / cm is applied to the gate insulating film 2. FIG. 6B shows a state in which the applied voltage is increased from the state shown in FIG. FIG. 6C is a diagram showing a state in which a leak current flows to the silicon substrate 1 through the defect 7.

When a voltage is applied to the gate insulating film 2, FIG.
As shown in (a), an electric field stress of, for example, 2 MV / cm is applied below the pin supporting insulator 25. further,
When the applied voltage is increased, as shown in FIG. 6B, the electric field stress may be applied below the pin supporting insulator 25 to cause a defect 7. As shown in (c), a leak current flows through the defect 7 to the silicon substrate 1 side. This is called the current measuring device 3
2 to detect.

FIG. 7 is a flowchart showing the operation of the evaluation system shown in FIG. 1 in the case of "initial withstand voltage evaluation". The operation of the evaluation system shown in FIG. 1 when performing “initial withstand voltage evaluation” will be described with reference to FIG. First, a silicon substrate 1 having a gate insulating film 2 and a gate electrode layer 3 is attached to a substrate support 10 to support the substrate (step S1).

The controller 39 controls the temperature controller 1
2 to control the heating temperature of the silicon substrate 1 to heat the gate insulating film 2 to, for example, 120 ° C. (Step S)
2). Here, the reason for raising the gate insulating film 2 to, for example, 120 ° C. is that when the semiconductor device is driven,
This is because the temperatures of the gate insulating film 2 and the gate electrode layer 3 are considered to rise only up to 120 ° C. at the maximum.

Subsequently, a plurality of outer probe pins 22 and a plurality of inner probe pins 20 provided on the pin support insulator 25 are brought into contact with the gate electrode layer 3.
Then, based on an instruction from the control device 39, as shown in FIG. A voltage is applied to the gate insulating film 2 through each of the gate electrodes 20 (step S3). Note that the applied voltage is gradually increased, and finally has a voltage value at which an electric field stress of, for example, 12 MV / cm is applied to the gate insulating film 2.

Here, the gate electrode layer 3 is in electrical contact with the gate insulating film 2. Therefore, if a defect 7 occurs in the gate insulating film 2 when a voltage is applied to the gate electrode layer 3, A current corresponding to the voltage value flows to the substrate support 10 via the defect 7, and the current measuring device 32 detects that the current flows. In some cases, the gate insulating film 2 has a defect 7 from the beginning at the manufacturing stage. In this case, when a voltage is applied to the gate electrode layer 3, a leak current flows to the silicon substrate 1 through the defect 7. Flows.

On the other hand, as shown in FIG. 6A, if there is no defect 7 in the gate insulating film 2 from the beginning of the formation of the gate insulating film 2 and no defect 7 Since the corresponding current flows to the ground through the outer peripheral portion probe pin 22 through the inside of the gate electrode layer 3, the current is not detected by the current measuring device 32.

For this reason, when an electric field stress is applied to the gate insulating film 2 via the gate electrode 3 by the current measuring device / voltage source 30, whether the current can be detected by the current measuring device 32 depends on whether the current is detected. It is checked whether or not there is a defect 7 (step S4).

If there is a defect 7 in the gate insulating film 2, the process proceeds to step S6. On the other hand, if there is no defect 7 in the gate insulating film 2, the voltage value of the applied voltage is gradually increased, and during this time, whether or not a current flows is detected by the current measuring device 32. It is checked whether or not a defect 7 has occurred in Step 2 (Step S5).

As shown in FIG. 6B, the gate insulating film 2
If the defect 7 has occurred in the semiconductor device or the defect 7 has occurred in the manufacturing stage, the value of the current flowing through the gate insulating film 2 is measured by the current measuring device / voltage source 30 and sent to the data processing device 38 ( Step S6). Thereafter, the position of the defect 7 is specified by a method described below.

FIG. 8 is an explanatory diagram of a method for specifying the position of the defect 7 generated in the gate insulating film 2. In FIG. 8, X of the inner peripheral portion probe pins p01, p02, p03, p04
-Coordinate values on the Y coordinate are (0, d), (d,
0), (0, -d), (-d, 0), and the resistance of the gate insulating film 2 interposed between the defect 7 and the inner peripheral portion probe pins p01 to p04 is Ra to Rd, respectively. 7 (P
The coordinate value (Xws, Yws) of (ws) can be expressed as follows: Xws = d (Rc−Rb) / (Rc + Rb) Yws = d (Ra−Rd) / (Ra + Rd)

FIG. 9 is an equivalent circuit diagram of FIG. 8 and its peripheral parts. In FIG. 9, V1 to V4 are voltages applied by each current measuring device and voltage source 30, and
Is the set value determined by I1 to I4 are voltages V1
The current supplied to the gate insulating film 2 by V4, which is a value measured by each current measuring device and voltage source 30.

Further, R0 is the inner peripheral portion probe pin p01.
To the resistance value of the gate insulating film 2 interposed between p04 and G _leak
Indicates a current measuring device 32, and Iws indicates a current value measured by G _leak .

The following equation can be derived from the equivalent circuit shown in FIG.

Iws = I1 + I2 + I3 + I4-1 / r0 (V1 + V2 + V3 + V4) (1) I1 = V1 / r0 + 1 / Ra (V1-Vws) + 1 / R0 (2V1-V2-V4) (2) I2 = V2 / r0 + 1 / Rb (V2-Vws) + 1 / R0 (2V2-V3-V1) (3) I3 = V3 / r0 + 1 / Rc (V3-Vws) + 1 / R0 (2V3-V4-V2) (4) I4 = V4 / r0 + 1 / Rd (V4-Vws) + 1 / R0 (2V4-V1-V3) (5)

Further, using the equation (1), an unknown r0 is determined from the set values V1 to V4 and the measured values I1 to I4. Then, in equations (2) to (5), (2V1-V2-V4) = 0 (2V2-V3-V1) = 0 (2V3-V4-V2) = 0 (2V4-V1-V3) = 0 and V1 to V4 are set so as to obtain unknown values Ra to Rd and R0.

When Ra to Rd are found, defect 7 (Pws)
(Xws, Yws) can be obtained. Thus, the position of the defect 7 is specified (step S
7). The specified result is stored in a memory (not shown) of the data processing device 38 (step S8).

Subsequently, the voltage value of the voltage applied by the current measuring device / voltage source 30 is set to 0 V, and then the pin supporting insulator 25 is moved (step S9), and the destination is also subjected to steps S3 to S9. By repeating the above, the defect 7
Is detected, and if there is a defect 7, its position is specified. Thus, reliability is evaluated on the entire surface of the gate insulating film 2 (Step S10).

After the reliability of the entire surface of the gate insulating film 2 has been evaluated, the heating of the temperature controller 12 is terminated based on an instruction from the control device 39. Then, the silicon substrate 1 on which the gate insulating film 2 whose reliability has been evaluated is formed is placed on the substrate support 1.
Remove from 0.

In the memory of the data processing device 38,
Finally, data indicating at which position of the gate insulating film 2 the defect 7 has occurred is stored. Therefore, the evaluator of the reliability of the gate insulating film 2 evaluates the reliability of the plurality of gate insulating films 2 by referring to the stored data on the presence or absence of the defect 7 in the plurality of gate insulating films 2. In addition, it is possible to obtain the cause of the defect 7 in the manufacturing process and the parts that require repair and improvement of the manufacturing apparatus. Thus, the evaluation of the reliability of the gate insulating film 2 formed on the silicon substrate 1 is completed.

When the reliability of the gate insulating film 2 is evaluated by the above-described method, the evaluation can be completed in a short time because the area of the voltage application region is larger than that of the conventional technique.

(Embodiment 2) Next, the "B mode SIL
The evaluation principle and operation of the evaluation system for performing “C evaluation” will be described. The same evaluation system as that shown in FIG. 1 is used.

FIG. 10 is an explanatory diagram of the principle of evaluating the reliability of the gate insulating film 2 by the evaluation system shown in FIG.
FIG. 10A shows that, for example, 12 MV /
FIG. 4 is a diagram illustrating a state in which a voltage is applied so as to apply an electric field stress of cm. FIG. 10B shows a state in which a degraded portion 8 is generated by applying a voltage so as to apply an electric field stress. FIG. 10C is a diagram illustrating a state in which a leak current flows to the silicon substrate 1 through the deteriorated portion 8.

As shown in FIG. 10A, a voltage is applied to the gate insulating film 2 to apply an electric field stress of, for example, 12 MV / cm below the pin supporting insulator 25. Since this electric field stress is a strong electric field stress such that an FN tunnel current flows, a charge trap is formed in the gate insulating film 2.

When this electric field stress is applied for a certain period of time, the charge traps may cause significant deterioration of the gate insulating film 2 at a portion called a weak spot. This is the deteriorated portion 8 shown in FIG. And
When the deteriorated portion 8 occurs, a leak current flows through the silicon substrate 1 through the deteriorated portion 8 as shown in FIG. This is detected by the current measuring device 32.

FIG. 11 is a flowchart showing the operation of the evaluation system shown in FIG. 1 when performing “B-mode SILC evaluation”. The operation of the evaluation system of FIG. 1 will be described with reference to FIG. First, a silicon substrate 1 having a gate insulating film 2 and a gate electrode layer 3 is mounted on a substrate support 10 to support the substrate (step S1).
1). Then, the heating temperature of the silicon substrate 1 is controlled by the temperature controller 12 by the control device 39 to heat the gate insulating film 2 to, for example, 120 ° C. (Step S12).

Here, the silicon substrate 1 is implanted with, for example, boron ions to have a surface concentration of 2 × 10 ¹⁷ cm ³ . The thickness of the gate insulating film 2 is, for example, 38 °. Furthermore, the gate electrode layer 3, for example after depositing a non-doped polysilicon to a thickness of about 2300 Å, and the phosphorus ion implantation, the activation treatment or the like Ranpuanira, and the average layer resistance 60 k-ohms ^2. At this time, the dispersion is about 4%.

Subsequently, the outer peripheral probe pins 22 and the inner peripheral probe pins 20 provided on the pin supporting insulator 25 are brought into contact with the gate electrode layer 3. Then, based on an instruction from the control device 39, as shown in FIG. 10 (a), the outer peripheral probe pin 22 is set in a floating state, For example, a voltage is applied for 1000 seconds (step S13).

The applied voltage has such a voltage value that an electric field stress of, for example, 12 MV / cm is applied to gate insulating film 2. Here, the reason why the electric field stress applied to the gate insulating film 2 is set to 12 MV / cm is to provide an electrolytic stress having sufficient strength to generate an FN tunnel current.

After a voltage is applied, for example, for 1000 seconds, a voltage is applied again to the gate electrode 3 (step S14). This applied voltage is gradually increased, and finally, for example, 8 MV / cm
The voltage value is such that the electric field stress is applied. Then, it is checked whether or not a deteriorated portion 8 or a defect (not shown) has occurred by detecting whether or not a leak current flows through the gate insulating film 2 by the applied voltage by the measuring and measuring device 32 (step S15). .

That is, if a deteriorated portion 8 or a defect occurs in the gate insulating film 2 near the gate electrode 3, a leak current flows through the deteriorated portion 8 or the defect when a voltage is applied to the gate electrode 3. The current measuring device 32 can detect that a leak current has flowed.

If there is a defect in the gate insulating film 2, the process proceeds to step S17. On the other hand, if there is no defect in the gate insulating film 2, the voltage value of the applied voltage is gradually increased, and during this time, whether or not a current flows is detected by the current measuring device 32. It is checked whether or not a deteriorated portion 8 has occurred (step S16).

As shown in FIG. 10B, if a deteriorated portion 8 has occurred in the gate insulating film 2, the current
The value of the current flowing through the gate electrode 2 is measured according to 0 and sent to the data processing device 38 (step S17).

As a method for detecting whether or not the deteriorated portion 8 has occurred, a threshold value allowable in the gate insulating film is previously determined when the electric field stress is in the range of 4 to 8 VM / cm. And current measuring device 32
When the measured value is larger than the threshold value, it is determined that the deteriorated portion 8 has occurred.

The data processing device 38 stores data as a nonlinear conductance characteristic table. The position of the deteriorated portion is specified by the same method as the method described in the first embodiment (step S18). However, as described with reference to FIG. 10, in the present embodiment, since the leak current flowing through the gate insulating film 2 due to the deteriorated portion 8 is non-linear, the following approximate expression is used.

Iws = G _leak (Vws) · Vws + D
_leak (Vws) where D _leak is the data processing device 38
In FIG. 12, the gate leak current value of “soft breakdown” shown in a logarithmic graph is shown in a constant graph, and the intercept of the tangent line of the gate current value is D _leak .

Thereafter, the specified result is stored in a memory (not shown) of the data processing device (step S19). After evaluating the reliability of the gate insulating film 2 at that position, the voltage applied by the current measuring device and voltage source 30 is set to 0 V, and then the pin supporting insulator 25 is moved (step S20). ), Steps S3 to S2 even at the destination
By repeating 0, the presence or absence of the deteriorated portion 8 or the like is detected, and if there is the deteriorated portion 8 or the like, the position of the deteriorated portion 8 or the like is specified. Thus, the reliability is evaluated on the entire surface of the gate insulating film 2 (Step S21).

Thereafter, the heating of the temperature controller 12 is terminated based on the instruction of the control device 39. Then, the silicon substrate 1 on which the gate insulating film 2 having undergone the reliability evaluation has been formed is removed from the substrate support 10. Thus, the evaluation of the reliability of the gate insulating film 2 formed on the silicon substrate 1 is completed.

When the reliability of the gate insulating film 2 is evaluated by the method described above, it is possible to apply a voltage to the entire surface of the gate insulating film 2 in advance at a time. Can be.

In the first and second embodiments, the case where the reliability of the gate insulating film 2 is evaluated has been described as an example. However, the object to be evaluated only needs to be the insulating film, and is limited to the gate insulating film. is not. Therefore, for example, the reliability of an insulating film such as a flash memory can be evaluated.

[0095]

As described above, according to the present invention, a voltage is applied to a plurality of positions of an insulating film formed on a substrate,
Since it is detected whether or not a leak current flows through the insulating film based on the voltage, the reliability of the entire surface of the insulating film can be evaluated in a short period of time.

[Brief description of the drawings]

FIG. 1 is a diagram showing an insulating film evaluation system according to a first embodiment of the present invention.

FIG. 2 is a plan view of a pin supporting insulator of the insulating film evaluation system shown in FIG.

FIG. 3 is a plan view of a pin support insulator of the insulating film evaluation system shown in FIG.

4 is a plan view of a pin supporting insulator of the insulating film evaluation system shown in FIG.

FIG. 5 is a plan view of a pin supporting insulator of the insulating film evaluation system shown in FIG.

FIG. 6 is an explanatory diagram of a principle of evaluating the reliability of the gate insulating film by the evaluation system shown in FIG. 1;

FIG. 7 shows an “initial withstand voltage evaluation” of the evaluation system shown in FIG.
9 is a flowchart showing the operation when the operation is performed.

FIG. 8 is an explanatory diagram of a method of specifying a position of a defect generated in a gate insulating film.

FIG. 9 is an equivalent circuit diagram of FIG. 8 and a peripheral portion thereof;

FIG. 10 is an explanatory diagram of a principle for evaluating the reliability of the gate insulating film according to the second embodiment of the present invention.

11 is a diagram showing the “B mode SI” of the evaluation system shown in FIG. 1.
It is a flowchart which shows operation | movement at the time of performing "LC evaluation."

FIG. 12 is a diagram showing an electric field stress applied to a gate insulating film and a leak current flowing through the gate insulating film for performing an initial withstand voltage evaluation and a B-mode SILC evaluation.

FIG. 13 is a configuration diagram of a conventional evaluation device that performs initial withstand voltage evaluation.

FIG. 14 is a configuration diagram of a conventional evaluation apparatus for performing B-mode SILC evaluation.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Gate insulating film 3 Gate electrode layer 4 Insulating side wall 7 Defect 8 Deteriorated part 10 Substrate support 12 Internal temperature controller 20 Inner peripheral probe pin 22 Outer peripheral probe pin 25 Pin supporting insulator 30 Current measuring instrument Voltage source 32 Current measuring device 33 Connection selection circuit 35 Connection lead wire 37 Control signal circuit 38 Data processing circuit 39 Control circuit 48 Mercury droplet 58 Mercury holding nozzle

Claims (14)

[Claims] 1. An insulating film evaluation method for applying a voltage to an insulating film formed on a base and detecting whether or not a leak current flows through the insulating film by the applied voltage, the method comprising: Through the multiple positions of the electrodes
A method for evaluating an insulating film, comprising applying the voltage to the insulating film. 2. The method according to claim 1, wherein a voltage value of the voltage applied to the insulating film is gradually increased. 3. The insulating film evaluation method according to claim 1, wherein the voltage value of the voltage is such that an electric field stress of at most 12 MV / cm is applied to the insulating film. 4. The method according to claim 1, wherein a voltage is applied to the insulating film in advance for a predetermined time.
3. The method for evaluating an insulating film according to the item 1. 5. The device according to claim 1, wherein the leakage current is detected based on whether the current can be measured by a current measuring device connected to the base.
3. The method for evaluating an insulating film according to the item 1. 6. A distance between each of the plurality of voltage transmitting members and a position where the leak current flows,
The insulating film evaluation method according to claim 1, wherein a position where the leakage current flows on the insulating film is specified. 7. A distance between each of the plurality of voltage transmitting members and a position where the leak current flows is determined by a current value of a current flowing through each of the plurality of voltage transmitting members and applying the voltage to the insulating film. 7. The method according to claim 6, wherein the calculation is performed based on a voltage value of a voltage applied to each of the voltage transmitting members and a current value of the leakage current. 8. The method for evaluating an insulating film according to claim 1, wherein the voltage is applied to the insulating film in a state where a temperature stress is applied to the insulating film. 9. The insulating film evaluation method according to claim 1, wherein the voltage transmitting member is a pin-shaped metal, and is in contact with the electrode at equal intervals. 10. A plurality of voltage sources for applying a voltage to an insulating film formed on a base, connected to each of the plurality of voltage sources, and transmitting a voltage applied by the voltage source to the insulating film. A plurality of voltage transmitting members; and a detecting unit configured to detect whether or not a leak current flows through the insulating film by the voltages applied by the plurality of voltage sources, to evaluate reliability of the insulating film. Insulation film evaluation device. 11. The insulating film evaluation device according to claim 10, wherein the voltage transmitting member is a pin-shaped metal, and is in contact with the electrodes at equal intervals. 12. The insulating film evaluation apparatus according to claim 10, further comprising heating means for applying heat to said insulating film. 13. The insulating film evaluation apparatus according to claim 10, wherein said detecting means is a current measuring device. 14. A plurality of voltage sources for applying a voltage to an insulating film formed on a base, connected to each of the plurality of voltage sources, and transmitting a voltage applied by the voltage source to the insulating film. A plurality of voltage transmitting members; a detecting unit configured to detect whether a leak current flows through the insulating film by the voltages applied by the plurality of voltage sources; and a plurality of the plurality of voltage transmitting members to specify a position where the leak current flows. An insulating film evaluation system, comprising: calculating means for calculating a distance between each of the voltage transmitting members and a position where the leak current flows, to evaluate reliability of the insulating film.