JP2001184875A - Memory having refreshing function - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a memory having a refreshing function. SOLUTION: In refreshing, a data is read out from a memory cell to be refreshed, it is stored in a data storing section for refreshing temporarily storing data of a memory cell to be refreshed, after that, the data of a memory cell to be refreshed is erased. Contents of the memory cell are read out, it is confirmed that the contents are erased (all are '0'), after that, the refresh-data is read out from the data storing section for refreshing in which the data is temporarily stored, and rewriting is performed for the memory cell. At the time, after memory output coincides with the refresh-data, additional write-in of the prescribed number of times is performed (M times, M>=1).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory having a refresh function.

[0002]

2. Description of the Related Art Generally, in a flash memory, a drain voltage of about 5 to 8 V is applied to an unselected memory of the same bit line (having a common drain) at the time of writing data.
The charge of the floating gate of the unselected memory cell is drawn to the drain side. Similarly, non-selected memory cells on the same word line (with a common gate) have a voltage of 10 to 13 V.
Voltage is applied, and the charge of the floating gate of the non-selected memory cell is extracted to the gate side. When batch erasing is performed, the charge of the floating gate is further extracted from the memory cell to which the writing has not been performed.

[0003]

Accordingly, there is a large variation in the amount of charge of the floating gate of each memory cell before writing due to these. For this reason, even if data is written to all memory cells under the same conditions, the amount of charge stored in the floating gate varies greatly from one memory cell to another, which poses a problem in terms of long-term reliability of data retention characteristics.

The present invention has been made in view of the above circumstances and aims to suppress the variation in the charge amount of the floating gate after writing by controlling the charge amount at the time of writing, thereby improving the reliability of the data holding characteristic. It is intended to provide a memory having a refresh function that can be performed.

[0005]

According to an aspect of the present invention, there is provided a memory having a refresh function, comprising: a memory cell section and a refresh data storage for temporarily storing memory contents for refresh; And a refresh control circuit section, wherein the refresh control circuit section writes the contents of the refresh target memory cell to the refresh data storage section at the time of refresh, erases the contents of the refresh target memory cell, and further updates the refresh data. Control the writing of the contents temporarily written to the storage unit to the previous memory cell, and if the writing contents of the memory cell are different from the contents temporarily written to the refresh data storage unit, perform write control multiple times. It is characterized by.

Further, the memory having a refresh function according to claim 2 is characterized in that the memory cell portion is an electrically rewritable nonvolatile memory.

A memory having a refresh function according to a third aspect of the present invention includes an electrically rewritable nonvolatile memory cell section, a refresh data storage section for temporarily storing memory contents for refresh, and a refresh control. A memory having a circuit section, wherein the refresh control circuit section writes the contents of the memory cell to be refreshed to the refresh data storage section at the time of refresh, erases the contents of the memory cell to be refreshed, and temporarily stores the contents of the memory cell for refresh. It is characterized by controlling the writing of the written contents to the previous memory cell, and performing the charge injection several times little by little at the time of this writing, thereby stopping the writing control to the memory cell when the desired charge amount is exceeded. And

Further, the memory having the refresh function according to claim 4 has a sense amplifier having a read threshold different from that of a sense amplifier used when reading the normal memory contents, and outputs the sense amplifier output and the refresh data storage. And a match detection circuit for comparing the contents with the contents of the memory cell to detect a match. The writing control to the memory cell is stopped at the time of coincidence with the content temporarily written in the data storage unit.

A memory having a refresh function according to a fifth aspect of the present invention is a memory having a memory cell section, a refresh data storage section for temporarily storing memory contents for refresh, and a refresh control circuit section. The refresh control circuit writes the content of the memory cell to be refreshed to the refresh data storage at the time of refreshing, and further writes the content temporarily written to the refresh data storage to the previous memory cell. And

Further, the memory having the refresh function according to the present invention uses a normal memory read section as a memory cell section and a refresh data storage section for temporarily storing memory contents for refresh. It is characterized in that control for directly writing a value to the memory cell portion is performed.

Further, the memory having a refresh function according to claim 7 is characterized in that the memory cell portion is an electrically rewritable nonvolatile memory.

In the memory having a refresh function according to the present invention, the contents of the memory cells to be refreshed are written to the refresh data storage section at the time of refresh, the contents of the memory cells to be refreshed are erased, and the data for refresh is further stored. It is characterized in that the control of writing the contents temporarily written in the section to the previous memory cell is performed in units of batch erasure of the memory.

Further, in the memory having the refresh function according to the ninth aspect, the content of the memory cell to be refreshed is written to the refresh data storage unit at the time of refreshing, and the content temporarily written to the refresh data storage unit is stored before the refresh. Is controlled in units of batch erasure of the memory.

Further, the memory having the refresh function according to the present invention is characterized in that the refresh control is controlled based on the number of accesses to the memory.

Further, the memory having the refresh function according to the present invention is characterized in that the refresh control is controlled for each batch erase unit based on the number of accesses of the memory for each batch erase unit.

A memory having a refresh function according to a twelfth aspect is built in a microcomputer, and performs refresh control by the microcomputer.

Further, the memory having a refresh function according to the present invention is characterized in that the refresh function is performed in a sleep mode of the microcomputer.

[0018]

In the memory having the refresh function of the present invention, charges are injected little by little at the time of writing at the time of refresh. As a result, it is possible to reduce variation between cells in the amount of injected charge in the floating gate after writing, and to realize highly reliable refresh.

Further, if a RAM is prepared, a large area is required. However, by omitting the erasing process, an increase in the area can be suppressed.

Further, by performing the refresh in the sleep mode of the microcomputer, it is possible to suppress the occurrence of a malfunction of processing based on the erased data if the refresh is performed during the memory operation.

[0021]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a memory having a refresh function according to the first embodiment. FIG. 2 shows this processing flow.

In the refresh operation, data is read from the memory cell 1 to be refreshed, stored in the refresh data storage unit 2 for temporarily storing the data in the memory cell to be refreshed, and then the data in the memory cell 1 to be refreshed is erased. I do. The contents of memory cell 1 are read and the contents are erased (all "0")
After that, the refresh data is read from the temporarily stored refresh data storage unit 2 and rewritten to the memory cell 1. At this time, after the memory output matches the refresh data, a predetermined number of times (M times, M ≧ 1)
Is additionally written.

When writing data to the memory cell 1, the amount of charge injection in one writing is reduced so that refresh data must be written at least twice before the output of the memory cell matches. I do. As a method of realizing this, a method of using a voltage lower than the generally used drain voltage and gate voltage at the time of writing and a method of shortening the writing time are possible.

FIG. 3 is a block diagram showing a configuration of a memory having a refresh function according to the second embodiment. FIG. 4 shows this processing flow.

This is to control the amount of charge injected using sense amplifiers having different read sensitivities. Refresh is performed on the memory cell 1 to be refreshed.
The data is read from 0, stored in the refresh data storage unit 20 for temporarily storing the data in the memory to be refreshed, and then the data in the memory cell 10 to be refreshed is erased. The contents of the memory cell 10 are read, and it is confirmed that the contents have been erased (it has become all "0").
After that, the refresh data is read from the refresh data storage unit 20 temporarily stored, and rewritten to the memory cell 10. At this time, if at least one write operation is not performed after the output of the first sense amplifier 30 matches the refresh data, the second sense amplifier 40
Is reduced to the extent that the output does not coincide with the refresh data. Note that the first sense amplifier 30 has the same sensitivity as the sense amplifier 3 used in a normal memory, and the second sense amplifier 40
Is a sense amplifier with low sensitivity.

In the third embodiment, the amount of charge in the floating gate is increased by performing rewriting without erasing data in the memory cell portion at the time of refreshing, thereby compensating for loss of charge in the floating gate due to aging. It is also possible. At this time, as in the first and second embodiments, the charge injection amount at this time is reduced.

It should be noted that the memory having the refresh function of the present invention is not limited to the above-described example.
It goes without saying that various changes can be made without departing from the spirit of the present invention.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a memory having a refresh function according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing a processing procedure of a memory having a refresh function according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a memory having a refresh function according to a second embodiment of the present invention.

FIG. 4 is a flowchart showing a processing procedure of a memory having a refresh function according to the second embodiment of the present invention.

[Explanation of symbols]

 1,10 memory cell section 2,20 refresh data storage section 3,30,40 sense amplifier

Claims (13)

[Claims] 1. A memory having a memory cell unit, a refresh data storage unit for temporarily storing memory contents for refresh, and a refresh control circuit unit,
The refresh control circuit writes the content of the memory cell to be refreshed to the refresh data storage section at the time of refresh, erases the content of the memory cell to be refreshed, and further writes the content temporarily written to the refresh data storage section to the previous memory. Controls writing to cells,
A memory having a refresh function characterized by performing write control a plurality of times when contents written in a memory cell are different from contents temporarily written in a refresh data storage unit. 2. The memory having a refresh function according to claim 1, wherein said memory cell portion is an electrically rewritable nonvolatile memory. 3. A memory comprising: an electrically rewritable nonvolatile memory cell unit; a refresh data storage unit for temporarily storing memory contents for refreshing; and a refresh control circuit unit, wherein the refresh control circuit is provided. The unit controls the writing of the content of the memory cell to be refreshed to the refresh data storage unit at the time of refreshing, erasing the content of the memory cell to be refreshed, and writing the content temporarily written to the refresh data storage unit to the previous memory cell. A memory having a refresh function, in which the charge is injected a plurality of times little by little at the time of writing to stop writing control to the memory cell when the amount of charge reaches a desired amount or more. 4. A match detection circuit comprising a sense amplifier having a read threshold different from that of a sense amplifier used when reading normal memory contents, and performing match detection by comparing the output of the sense amplifier with the contents of a refresh data storage unit. A value read out from the memory cell by the sense amplifier having a different threshold value when the amount of charge becomes equal to or more than a desired amount when writing to the memory cell matches the content temporarily written in the refresh data storage unit. 4. The memory having a refresh function according to claim 3, wherein the write control to the memory cell is stopped at the point of time. 5. A memory having a memory cell section, a refresh data storage section for temporarily storing memory contents for refresh, and a refresh control circuit section,
The refresh control circuit unit controls the writing of the content of the memory cell to be refreshed to the refresh data storage unit at the time of refreshing, and further controls the writing of the content temporarily written to the refresh data storage unit to the previous memory cell. Memory with refresh function. 6. A memory cell unit and a normal memory read unit as a refresh data storage unit for temporarily storing memory contents for refreshing, and performing control to write the read value as it is to the memory cell unit. A memory having a refresh function according to claim 5. 7. The memory having a refresh function according to claim 5, wherein the memory cell section is an electrically rewritable nonvolatile memory. 8. The contents of a memory cell to be refreshed are written to a refresh data storage section at the time of refreshing, the contents of a memory cell to be refreshed are erased, and the contents temporarily written to the refresh data storage section are written to a previous memory cell. 3. The memory having a refresh function according to claim 2, wherein the control of writing to the memory is performed in batch erase units of the memory. 9. The control of writing the contents of a memory cell to be refreshed to a refresh data storage unit at the time of refreshing and writing the contents temporarily written to the refresh data storage unit to a previous memory cell in units of batch erase of the memory. 8. The memory having a refresh function according to claim 7, wherein the memory is operated. 10. The memory having a refresh function according to claim 1, wherein the refresh control is performed based on the number of accesses to the memory. 11. The refresh control according to claim 2, wherein the refresh control is performed for each batch erase unit based on the number of accesses of the memory for each batch erase unit. A memory having a refresh function according to the item. 12. The memory having a refresh function according to claim 1, wherein the memory is built in the microcomputer and performs refresh control by the microcomputer. 13. The memory having a refresh function according to claim 12, wherein the refresh function is performed in a sleep mode of the microcomputer.