JP2001175880A5 - - Google Patents

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Publication number
JP2001175880A5
JP2001175880A5 JP1999358871A JP35887199A JP2001175880A5 JP 2001175880 A5 JP2001175880 A5 JP 2001175880A5 JP 1999358871 A JP1999358871 A JP 1999358871A JP 35887199 A JP35887199 A JP 35887199A JP 2001175880 A5 JP2001175880 A5 JP 2001175880A5
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JP
Japan
Prior art keywords
floating point
point adder
explaining
floating
block diagram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP1999358871A
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English (en)
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JP2001175880A (ja
JP4439060B2 (ja
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Publication date
Application filed filed Critical
Priority to JP35887199A priority Critical patent/JP4439060B2/ja
Priority claimed from JP35887199A external-priority patent/JP4439060B2/ja
Priority to US09/620,472 priority patent/US6581087B1/en
Publication of JP2001175880A publication Critical patent/JP2001175880A/ja
Publication of JP2001175880A5 publication Critical patent/JP2001175880A5/ja
Application granted granted Critical
Publication of JP4439060B2 publication Critical patent/JP4439060B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

[実施の形態5]
図10は、実施の形態5に係る浮動小数点加算器を説明するためのブロック図である。
請求項10、11に記載の浮動小数点加算器は、浮動小数点の加算や減算を行なうための機能ブロックを流用して、任意のクリッピングウインドウに対してクリップ上限値、下限値についてのクリップコード同時に高速に生成することができる。
【図10】 実施の形態5に係る浮動小数点加算器を説明するためのブロック図であ
る。
JP35887199A 1999-12-17 1999-12-17 浮動小数点加算器 Expired - Fee Related JP4439060B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP35887199A JP4439060B2 (ja) 1999-12-17 1999-12-17 浮動小数点加算器
US09/620,472 US6581087B1 (en) 1999-12-17 2000-07-20 Floating point adder capable of rapid clip-code generation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35887199A JP4439060B2 (ja) 1999-12-17 1999-12-17 浮動小数点加算器

Publications (3)

Publication Number Publication Date
JP2001175880A JP2001175880A (ja) 2001-06-29
JP2001175880A5 true JP2001175880A5 (ja) 2007-02-08
JP4439060B2 JP4439060B2 (ja) 2010-03-24

Family

ID=18461538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35887199A Expired - Fee Related JP4439060B2 (ja) 1999-12-17 1999-12-17 浮動小数点加算器

Country Status (2)

Country Link
US (1) US6581087B1 (ja)
JP (1) JP4439060B2 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7242414B1 (en) 1999-07-30 2007-07-10 Mips Technologies, Inc. Processor having a compare extension of an instruction set architecture
US7346643B1 (en) 1999-07-30 2008-03-18 Mips Technologies, Inc. Processor with improved accuracy for multiply-add operations
US6996596B1 (en) 2000-05-23 2006-02-07 Mips Technologies, Inc. Floating-point processor with operating mode having improved accuracy and high performance
US7599974B2 (en) * 2004-03-22 2009-10-06 Arm Limited Data processing apparatus and method for comparing floating point operands
CN111199133B (zh) * 2019-12-27 2023-09-15 成都锐成芯微科技股份有限公司 一种自动布线绕线的方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0664618B2 (ja) 1986-02-07 1994-08-22 松下電器産業株式会社 クリツピング回路
JPH0776911B2 (ja) * 1988-03-23 1995-08-16 松下電器産業株式会社 浮動小数点演算装置
US5157764A (en) 1989-01-13 1992-10-20 Sun Microsystems, Inc. Apparatus and method for using a test window in a graphics subsystem which incorporates hardware to perform clipping of images
EP0680020B1 (en) 1994-04-28 2003-02-05 Sun Microsystems, Inc. Apparatus and method for direct calculation of clip region outcodes
JP3203180B2 (ja) * 1996-03-27 2001-08-27 三菱電機株式会社 幾何学演算装置
JPH09330419A (ja) 1996-06-07 1997-12-22 Nippon Steel Corp 図形領域判別装置
US6175851B1 (en) * 1998-02-06 2001-01-16 S3 Incorporated Fast adder/subtractor for signed floating point numbers
US6401108B1 (en) * 1999-03-31 2002-06-04 International Business Machines Corp. Floating point compare apparatus and methods therefor

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