JP2001169106A - Image processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image processor which efficiently performs plural kinds of image processing in a system for realizing many functions. SOLUTION: This image processor is provided with an image processing processor 204 which is connected to an image read unit which reads image data, an image memory control unit which controls an image memory to write/ read image data, and an image write unit which prints image data and the image-processing processor 204 is provided with plural programmable operation parts (an SIMD operation part S and a sequential operation part T), which subjects image data to image processings, and a control part 303 which receives image data read by the image read unit or read by the image memory control unit to transmit this image data to operation parts and received image data subjected to image processing in operation parts to transmit this image data to another operation part, the image memory control unit, or the image write unit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus for performing image processing on digital image data, and more particularly, to an image processing apparatus for performing image processing on image data in a digital multifunction peripheral having functions of a copier, a facsimile, a printer, a scanner, and the like.

[0002]

2. Description of the Related Art Conventionally, digital copiers for processing digital image data from analog copiers have appeared, and digital copiers have not only functions as copiers, but also have the functions of copiers. There are digital multifunction peripherals that combine functions such as facsimile functions, printer functions, and scanner functions.

FIG. 14 is a block diagram showing a hardware configuration of a digital multifunction peripheral according to the prior art. FIG.
As shown in FIG. 4, the digital multifunction peripheral is formed by a series of components including a reading unit 1401, an image processing unit 1402, a video control unit 1403, and a writing unit 1404, as well as a memory control unit 1405 and a memory module 1406. A part constituting the copying machine (copier part) and a motherboard 1411
Via the facsimile control unit 141
2. By connecting units such as a printer control unit 1413 and a scanner control unit 1414, each function as a digital multifunction peripheral has been realized.

Accordingly, the components of the copying machine that realize the function of the copying machine include a reading unit 1401, an image processing unit 1402, a video control unit 1403, and a writing unit 1404, each of which includes a system controller 1407, a RAM 1408, and a ROM 1409. While a series of operations of each component is controlled, each unit such as the facsimile control unit 1412, the printer control unit 1413, and the scanner control unit 1414 uses a part of the established series of operations in the copying machine. By doing so, the function of each unit was realized.

In other words, a facsimile control unit 1412 and a printer control unit 14
13. By adding on the scanner control unit 1414, the function of the digital multifunction peripheral was realized. This is because the above-mentioned series of components are ASIC (App)
ligation Specific Integra
This is due to the background of emphasizing the processing speed (improving the processing speed) by using hardware such as a ted circuit.

[0006] In addition, various processing such as image processing performed using an ASIC has been replaced by a DSP (Digital Signal Pr) whose computational capability has been dramatically improved in recent years.
processor, especially SIMD (Single In)
Structure Multiple Datas
An arithmetic processing means realized using a (stream) type DSP has been devised (for example, Japanese Patent Application Laid-Open No. 4-37900).

[0007] Further, a SIMD type DSP and a sequential execution type processor are combined, and quantization processing is performed by the former,
Calculation processing to perform image processing that can be calculated from the density information of the target pixel and its surrounding pixels, such as gamma processing and filter processing, and to perform image processing that needs to reflect the previous processing result, such as error diffusion processing, in the current processing by the latter. Means have also been devised (for example,
122866 and JP-A-9-282305).

[0008]

However, in the digital multifunction peripheral according to the prior art, since the copying machine is established as one system as described above, the facsimile control unit 1412, the printer control unit 1413, the scanner Control unit 14
For units such as 14 connected to the above-mentioned copying machine portion, there is a problem that a system must be constructed independently of the copying machine portion in order to realize each function.

In addition, since the copying machine is established as a single system, there is a problem in that it is not possible to efficiently improve the functions of the peripheral units along with the performance thereof. Therefore, when it is desired to change only the reading unit 1401 and the writing unit 1404, more specifically, the reading unit 1401 having a resolution of 400 dpi
Alternatively, when the writing unit 1404 is changed to a reading unit for wide-width originals or a writing unit for printing wide-width originals and it is desired to change the writing unit to 1400 dpi, it is easy to improve the functions of the entire apparatus simply by replacing the units. There was a problem that it could not be performed.

That is, since a series of systems has already been established so that the entire copying machine can be read / written at 400 dpi, a matrix for intermediate processing is required when the above units are converted. It is necessary to change the size, threshold, etc. In some cases, the settings of other units must be changed so that reading / writing at 2400 dpi can be performed. In particular, in the image processing unit 1402, there is a problem that it is necessary to reconstruct an image processing program, memory allocation, efficiency of input / output of image data, and the like.

[0011] Therefore, in the case of hardware such as ASIC, the hardware (customized IC, LSI, etc.) must be replaced.
Therefore, merely replacing the peripheral unit with the improvement of the performance of the peripheral unit cannot make the function of the entire apparatus easy.

[0012] These problems are not limited to peripheral units, but can also occur when improving the functions of a digital multifunction peripheral such as operability. In other words, in order to improve the functions of the digital multi-function peripheral, it is necessary to make changes to the entire contents of the above-described system, and not only can designers not easily improve the functions of the digital multi-function peripheral, but also The problem is that the latest algorithm cannot be easily provided to the user who uses the multifunction peripheral.

The conventional digital multifunction peripheral has a problem that an optimal control structure has not been constructed in terms of sharing modules and the like, improving functions by replacing each unit, and effectively using each resource in the system. There was a point. In particular, a digital multifunction peripheral needs to perform a plurality of types of image processing due to its nature, but there has been a problem that the plurality of types of image processing cannot be efficiently performed.

Further, when changing from a configuration of 600 dpi to a configuration of 2400 dpi to a configuration in which a large amount of image data is input, it is necessary to process the image data at a high speed while keeping other configurations as possible. In other words, ideally, the number of processing processors and the processing capacity of the mounted image processing unit are increased without limit, and the high processing capacity is achieved by connecting the processing processors or between the processing processors and the outside by a high-speed transfer bus. It is possible to realize a parallel processing system with.

However, in actuality, there is a restriction on cost and a development period of a processing processor with an improved processing capability, so that a minimum necessary processor is mounted.
It is necessary to keep the transfer bus having a simple configuration and various application software, and to achieve the performance that satisfies the user's requirements by utilizing the conventional configuration as much as possible. In other words, even if a part of the system is changed to a configuration that increases the amount of image data to be processed, an image that can be efficiently processed using the conventional configuration is used as much as possible. A processing device was desired.

The technology disclosed in Japanese Patent Publication No. Hei 7-122866 and Japanese Patent Laid-Open No. Hei 9-282305 is simply applied to a single unit such as a copying machine. Therefore, even if applied directly to a multifunction digital multifunction peripheral, it may not always be possible to efficiently perform image processing on all types of image data input via a plurality of buses. There was a problem.

An object of the present invention is to provide an image processing apparatus capable of efficiently performing a plurality of types of image processing in a system for realizing multi-functions, in order to solve the above-described problems of the prior art. I do.

[0018]

Means for Solving the Problems To solve the above-mentioned problems,
In order to achieve the object, an image processing apparatus according to the first aspect of the present invention includes an image reading unit that reads image data and / or an image memory control unit that writes and reads image data by controlling an image memory. Or in an image processing apparatus having an image processing means connected to an image writing means for writing image data on transfer paper or the like, wherein the image processing means performs a plurality of programmable processing operation means for performing image processing on the image data; The first image data read by the image reading means and / or the second image data read by the image memory control means are received and transmitted to the processing operation means. Receiving the processed image data to another processing operation means and / or controlling the image memory And reception control means for transmitting to and / or into the image writing unit stage, characterized by comprising a.

According to the first aspect of the present invention, it is possible to efficiently transmit and receive image data and optimize image processing.

According to a second aspect of the present invention, in the image processing apparatus according to the first aspect, the image processing unit is configured to execute the image reading unit and / or the image memory via an image data control unit. Connected to a control unit and / or the image writing unit, wherein the image data control unit is connected between the image processing unit and the image reading unit and / or the image memory control unit and / or the image writing unit. Is transmitted and received.

According to the second aspect of the present invention, it is possible to control adaptation of image processing to an input / output device.

According to a third aspect of the present invention, in the image processing apparatus according to the first or second aspect,
Furthermore, a program storage unit for storing a processing program related to image processing performed by the processing operation unit is provided, and the transmission / reception control unit transmits the processing program from the program storage unit to the processing operation unit.

According to the third aspect of the present invention, it is possible to cope with various image processings as needed.

According to a fourth aspect of the present invention, in the image processing apparatus according to the third aspect, the image processing device relates to the processing capability of the image processing device and the processing capability of each device connected to the image processing device. A system information storage unit for storing system information; a processing capability determining unit for determining whether the processing capability of the image processing unit is inferior based on the system information; Program updating means for updating the processing program stored in the program storage means when it is determined that the program is present.

According to the fourth aspect of the present invention, even if the functions of other processing units of the system are improved, image processing corresponding to a new system can be performed.

According to a fifth aspect of the present invention, there is provided an image processing apparatus according to any one of the first to fourth aspects, wherein the image data needs to be divided or combined. Division and combination determination means for determining the image data, and image data division and combination means for dividing the image data into a predetermined data length, or combining the divided image data,
The transmission / reception control means transmits the image data determined to be required for division or combination by the division / combination determination means to the division / combination determination means, and converts the image data divided or combined by the division / combination determination means. It is characterized by receiving.

According to the fifth aspect of the present invention, image processing can be performed according to the processing capability of the processing operation means.

According to a sixth aspect of the present invention, in the image processing apparatus according to any one of the first to fifth aspects, the plurality of processing operation means are a SIMD type processor or a SIMD type processor. It is characterized by comprising a processor and a sequential operation processor.

According to the present invention, high-speed parallel processing corresponding to the type of image processing can be performed.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of an image processing apparatus according to the present invention will be described below in detail with reference to the accompanying drawings. First, the principle of the image processing apparatus according to the present embodiment will be described. FIG. 1 is a block diagram functionally showing the configuration of the image processing apparatus according to the embodiment of the present invention. In FIG. 1, the image processing apparatus has a configuration including the following five units.

The above five units are an image data control unit 100, an image reading unit 101 for reading image data, and an image memory control unit 102 for controlling an image memory for storing images and writing / reading image data. And an image processing unit 103 that performs image processing such as processing and editing on the image data, and an image writing unit 104 that writes the image data on transfer paper or the like.

The above-mentioned units are mainly composed of an image data control unit 100, an image reading unit 101, an image memory control unit 102, and an image processing unit 103.
And the image writing unit 104 are connected to the image data control unit 100, respectively.

(Image Data Control Unit 100) The processing performed by the image data control unit 100 is as follows.

(1) Data compression processing (primary compression) to improve data bus transfer efficiency, (2) transfer processing of primary compressed data to image data, (3) image synthesis processing (images from a plurality of units) It is possible to combine data, including combining on the data bus.),
(4) Image shift processing (shifting of the image in the main scanning and sub-scanning directions), (5) Image area expansion processing (the image area can be enlarged by an arbitrary amount to the periphery), (6) Image scaling processing ( For example, 50% or 200% fixed magnification),
(7) parallel bus interface processing, (8) serial bus interface processing (interface with a process controller 211 described later),
(9) Format conversion processing between parallel data and serial data, (10) interface processing with the image reading unit 101, (11) interface processing with the image processing unit 103, and the like.

(Image Reading Unit 101) The processing performed by the image reading unit 101 is as follows.

(1) Reading processing of reflected light of an original by an optical system, (2) CCD (Charge Coupled)
Device: charge-coupled device), (3) digitization by A / D converter, (4)
A shading correction process (a process for correcting illuminance distribution unevenness of a light source); and (5) a scanner γ correction process (a process for correcting a density characteristic of a reading system).

(Image Memory Control Unit 102) The processing performed by the image memory control unit 102 is as follows.

(1) interface control processing with a system controller, (2) parallel bus control processing (interface control processing with a parallel bus),
(3) Network control processing, (4) Serial bus control processing (control processing of a plurality of external serial ports), (5)
Internal bus interface control processing (command control processing with the operation unit), (6) local bus control processing (ROM, RAM for activating the system controller,
Font data access control processing), (7) memory module operation control processing (memory module write / read control processing, etc.), and (8) memory module access control processing (memory from multiple units). Process for mediating access requests),
(9) Data compression / expansion processing (processing to reduce the amount of data for effective use of memory), (10) Image editing processing (data clearing of memory area, rotation processing of image data, image on memory) Synthesis processing).

(Image processing unit 103) The processing performed by the image processing unit 103 is as follows.

(1) Shading correction processing (processing for correcting unevenness of the illuminance distribution of the light source), (2) scanner γ correction processing (processing for correcting the density characteristic of the reading process), (3)
MTF correction processing, (4) smoothing processing, (5) arbitrary scaling processing in the main scanning direction, (6) density conversion (γ conversion processing: corresponding to density notch), (7) simple multi-value processing, (8) Simple binarization processing, (9) error diffusion processing, (10) dither processing, (1
1) dot arrangement phase control processing (rightward dot, leftward dot), (12) isolated point removal processing, (13) image area separation processing (color determination, attribute determination, adaptive processing), (14) density conversion processing, etc. is there.

(Image Writing Unit 104) The processing performed by the image writing unit 104 includes the following.

(1) Edge smoothing processing (jaggy correction processing), (2) correction processing for dot rearrangement, (3) pulse control processing of image signals, (4) format conversion processing of parallel data and serial data, And so on.

(Hardware Configuration of Digital MFP)
Next, a hardware configuration when the image processing apparatus according to the present embodiment forms a digital multifunction peripheral will be described. FIG. 2 is a block diagram illustrating an example of a hardware configuration of the image processing apparatus according to the present embodiment.

In the block diagram of FIG. 2, the image processing apparatus according to the present embodiment includes a reading unit 201, a sensor board unit 202, and an image data control unit 2.
03, an image processor 204, a video data control unit 205, and an imaging unit (engine) 206. The image processing apparatus according to the present embodiment includes a process controller 211, a RAM 212, and a ROM 213 via a serial bus 210.

The image processing apparatus according to the present embodiment includes an image memory access control unit 221 and a facsimile control unit 224 via a parallel bus 220, and further includes an image memory access control unit 221.
Module 222, a system controller 231, a RAM 232, and a ROM 2
33 and an operation panel 234.

Here, the relationship between each of the above components and each of the units 100 to 104 shown in FIG. 1 will be described. That is, the reading unit 201 and the sensor board
The function of the image reading unit 101 shown in FIG. 1 is realized by the unit 202. Similarly, the function of the image data control unit 100 is realized by the image data control unit 203. Similarly, the image processor 204
Realizes the function of the image processing unit 103.

Similarly, the video / data control unit 205
The image writing unit 104 is realized by the image forming unit (engine) 206. Similarly, the image memory access control unit 221 and the memory module 2
The image memory control unit 102 is realized by 22.

Next, the contents of each component will be described. The reading unit 201 that optically reads a document includes a lamp, a mirror, and a lens, and condenses the reflected light of the lamp irradiation on the document to a light receiving element by the mirror and the lens.

A light receiving element, for example, a CCD is a sensor
The image data that is mounted on the board unit 202 and converted into an electric signal by the CCD is converted into a digital signal and then output (transmitted) from the sensor board unit 202.

The image data output (transmitted) from the sensor board unit 202 is transmitted to an image data control unit 203.
Is input (received). Functional device (processing unit)
The transmission of image data between the data buses is controlled entirely by the image data control unit 203.

The image data control section 203 transfers data between the sensor board unit 202, the parallel bus 220, and the image processing processor 204 and controls the process controller 21 for the image data.
1 and a system controller 231 that controls the entire image processing apparatus. RAM2
Reference numeral 12 is used as a work area of the process controller 211, and the ROM 213 stores a boot program and the like of the process controller 211.

The image data output (transmitted) from the sensor board unit 202 is transmitted to an image data control unit 203.
(Transmit) to the image processor 204 via
Then, the signal deterioration due to the quantization into the optical system and the digital signal (referred to as the signal deterioration of the scanner system) is corrected and output (transmitted) to the image data control unit 203 again.

The image memory access control unit 221 comprises:
It controls writing / reading of image data to / from the memory module 222. In addition, the parallel bus 220
Controls the operation of each component connected to. Also, RAM
232 is used as a work area of the system controller 231, and the ROM 233 stores a boot program and the like of the system controller 231.

The operation panel 234 inputs the processing to be performed by the image processing apparatus. For example, the type of process (copying, facsimile transmission, image reading, printing, etc.), the number of processes, and the like are input. Thereby, the input of the image data control information can be performed. The contents of the facsimile control unit 224 will be described later.

Next, the read image data is stored in the memory module 222 and reused,
There are jobs that are not stored in the memory module 222, and each case will be described. As an example of storing in the memory module 222, when copying a plurality of sheets of one document, the reading unit 201 is operated only once, and the image data read by the reading unit 201 is stored in the memory module 222. There is a method of reading stored image data a plurality of times.

As an example in which the memory module 222 is not used, when only one document is copied, the read image data may be reproduced as it is. Therefore, the memory module 222 by the image memory access control unit 221 is used. You do not need to access to.

First, when the memory module 222 is not used, the data transferred from the image processor 204 to the image data controller 203 is returned from the image data controller 203 to the image processor 204 again. The image processor 204 performs image quality processing for converting luminance data by the CCD in the sensor board unit 202 into area gradation.

The image data after the image quality processing is transferred from the image processing processor 204 to the video data control unit 205. The post-processing relating to the dot arrangement and the pulse control for reproducing the dots are performed on the signal changed to the area gradation, and then the reproduced image is formed on the transfer paper in the image forming unit 206.

Next, a description will be given of the flow of image data when additional processing, for example, rotation in the image direction, synthesis of images, and the like are performed at the time of reading out images stored in the memory module 222. The image data transferred from the image processor 204 to the image data control unit 203 is sent from the image data control unit 203 to the image memory access control unit 221 via the parallel bus 220.

Here, the system controller 23
1, control of access to image data and the memory module 222, expansion of print data of the external PC (personal computer) 223, and compression / expansion of image data for effective use of the memory module 222. .

The image data sent to the image memory access control unit 221 is stored in the memory module 222 after data compression, and the stored image data is read as needed. The read image data is decompressed, restored to the original image data, and returned from the image memory access control unit 221 to the image data control unit 203 via the parallel bus 220.

After the image data is transferred from the image data control unit 203 to the image processor 204, image quality processing and video / video processing are performed.
The data control unit 205 performs pulse control, and the image forming unit 206 forms a reproduced image on transfer paper.

In the flow of image data, the function of the digital multi-function peripheral is realized by the bus control by the parallel bus 220 and the image data control unit 203. The facsimile transmission function performs image processing on the read image data by the image processor 204, and executes the image data control unit 2.
03 and the facsimile control unit 224 via the parallel bus 220. The facsimile control unit 224 performs data conversion to a communication network, and transmits the data to a public line (PN) 225 as facsimile data.

On the other hand, the received facsimile data is
Line data from the public line (PN) 225 is converted into image data by the facsimile control unit 224 and transferred to the image processor 204 via the parallel bus 220 and the image data control unit 203. In this case, no special image quality processing is performed, the dot rearrangement and the pulse control are performed in the video data control unit 205, and the reproduced image is formed on the transfer paper in the image forming unit 206.

In a situation where a plurality of jobs, for example, a copy function, a facsimile transmission / reception function, and a printer output function operate in parallel, the system controller assigns the right to use the reading unit 201, the imaging unit 206, and the parallel bus 220 to the job. 231 and the process controller 211.

The process controller 211 controls the flow of image data, and the system controller 231
Controls the entire system and manages the activation of each resource. In addition, the function selection of the digital multi-function peripheral is selectively inputted on the operation panel (operation unit) 234, and the processing contents such as the copy function and the facsimile function are set.

The system controller 231 and the process controller 211 communicate with each other via the parallel bus 220, the image data control unit 203, and the serial bus 210. Specifically, communication between the system controller 231 and the process controller 211 is performed by performing data format conversion for the data interface between the parallel bus 220 and the serial bus 210 in the image data control unit 203.

(Image Processing Unit 103 / Image Processor 204) Next, the outline of the processing in the image processing processor 204 constituting the image processing unit 103 will be described. FIG. 3 is a schematic diagram showing the overall configuration of the image processor 204 of the image processing apparatus according to the present embodiment.

The image processor 204 includes a plurality of data buses B (B1 to B4) used for inputting / outputting image data and the like with the image data control unit 203 and the like, and a local memory group for storing image data and the like. 301, a processor array unit 30 for performing image processing on image data
2, a control unit 303 for controlling the data bus B, the local memory group 301, and the processor array unit 302
And Hereinafter, the local memory group 301 and the control unit 303 are collectively referred to as a transfer unit 304.

The local memory group 301 stores a local memory A for storing an operation program defining image processing in the image processor 204 and a local memory B for storing information such as the processing capability of the image processor 204 and other functional units. And a local memory C for storing image data.

The processor array unit 302 has a SIM
It comprises a SIMD operation unit S composed of a D-type processor and a sequential operation unit T composed of a sequential processor.
The processor array unit 302 includes a large number of SIMD operation units S and a sequential operation unit T in order to efficiently process one line of image data read by the reading unit 201, for example. Here, in order to simplify the explanation, three SIMD operation units S1, S2 and S
3 and one sequential operation unit T1.

Each of the SIMD operation units S or the sequential operation units T includes input data buses B7, B9, B11 and B13 for receiving image data from the control unit 303.
Are connected to output data buses B8, B10, B12, and B14 for transmitting image data to the control unit 303, and independently transmit and receive image data to and from the control unit 303. On the other hand, the control unit 303 has two sets of data buses (data buses B1 to B4) for transmitting and receiving image data to and from the image data control unit 203, and can independently transmit and receive image data. is there.

The control unit 303 controls the operation of the image processor 204 and the bus B under the control of the system controller 231 or the process controller 211. Specifically, the control unit 303 performs various controls based on a predetermined operation program stored in the local memory A. Examples of a program (operation program) for describing an operation include an instruction to divide and combine image data into an arbitrary data length, an instruction to select an arbitrary data bus B to transmit and receive image data, and an image data Is stored in the local memory C or an image data is retrieved from the local memory C.

These operation programs are downloaded (stored) from the image data control unit 203 to the local memory A by using the bidirectional bus B5 provided between the image data control unit 203 and these operation programs.

The local memory B has a control unit 3
And information about hardware such as the type of each operation unit in the processor array unit 302 connected to the data array B03 and the data buses B7 to B14. In the local memory B, information on connection destinations regarding the format of transmission / reception regarding image data such as presence / absence of compression and parallel connection / serial connection, and actual values of variables defined on the program such as pointers in the c language are used. Information for supplementing the operation program such as a value is also stored.

In the following, the local memory B
Is generically referred to as system information. When executing the operation program, the control unit 303
The information stored in the local memory B is read out as needed, and the image processor 204 is controlled.

It is assumed that the hardware of the image processing apparatus according to the present embodiment is partially replaced. For example, when the reading unit 201 is replaced with a higher-resolution one, and the image processing performed by the processor array unit 302 requires image processing using a larger number of the sequential operation units T. think of.

For example, due to a change in the system,
Conventionally, for certain image data, SIMD operation unit S1,
The processing performed using the S2 and S3 and the sequential operation unit T1 is better than the SIMD operation units S1 and S2,
In some cases, processing performed using the sequential calculation units T1 and T2 may improve the efficiency of image processing.

At this time, generally, even if the conventional setting is used as it is, efficient image processing cannot be performed. The control unit 303 includes a system controller 231
Under the control of, the processing capability of each unit is determined with reference to the local memory B, and the processing program is updated to a processing program optimal for the system.

FIG. 4 is a diagram showing an example of an image processor having a configuration different from that of the image processor shown in FIG. From among the system information stored in the local memory B shown in FIG. 3, the control unit 303 first updates the information on the data buses B11 and B12, and then updates the information on the connection destination from the contents of the SIMD operation unit S3. The content is updated to the content of the sequential operation unit T2, and information on the data buses B15 and B16 and information on the connection destination are newly added.

Further, the control unit 303 stores the data bus B1 in the operation program stored in the local memory A.
5 and instructions necessary for executing transmission and reception of image data using B16. By storing the updated operation program and system information in the local memories A and B in FIG. 4, transfer (transmission / reception) of image data becomes more efficient, and efficient image processing becomes possible.

Next, a data flow when image processing is actually executed by the image processor 204 will be described. First, an image processing capable of high-speed operation by SIMD-type processing and an image processing capable of high-speed operation by sequential-type processing will be described.

FIG. 5 is a block diagram showing the concept of the flow of SIMD-type image processing by the image processor 204, and FIG. 6 is a flowchart showing the flow of the processing. The image processing suitable for the SIMD operation unit S includes, for example, image processing such as quantization processing, γ processing, and filter processing that can be calculated from the density information of the pixel of interest and its surrounding pixels. Here, the image processing is performed using a plurality of SIMs.
An example in which the D operation unit S realizes high-speed operation by performing parallel processing will be described.

First, the image data is stored in the image data control unit 20.
3 through the data bus B1 (step S
601 and FIGS. 5 (a) and 5 (b)). This image data is stored in the local memory C (step S602). This storage control is performed by the control unit 303.
Subsequently, the control unit 303 converts the image data stored in the local memory C into SIMD operation units S1, S2 and SMD.
3 (step S6).
03).

The control unit 303 determines the processing length in each operation unit, and determines the necessity of division as necessary. At this time, the size of image data that can be processed at one time is determined by referring to system information stored in the local memory B. The instruction to divide is stored in the local memory A, and the control unit 303 divides the image data based on the instruction.

The image data divided in step S603 is transferred to each SIMD operation unit of the processor array unit 302 under the control of the control unit 303 (step S604, see FIG. 5B). Each SIMD operation unit S
Performs image processing A in parallel (step S60).
5, FIG. 5 (a)). Here, a program relating to the processing content of the image processing A is stored in the local memory A, and is transferred to the processor array unit 302 under the control of the control unit 303.

The image processing A is performed by dividing the divided image data into
Since it is performed simultaneously by a plurality of SIMD operation units S without referring to other image data or previous operation results,
The processing speed is increased.

The processed image data is transferred to the transfer unit 30 again.
4 is received and stored in the local memory C (step S606). When all processing results are obtained,
The control unit 303 combines the image data stored in the local memory C (Step S607). Finally, the control unit 303 transmits the image data to the image data control unit 203 (step S608, see FIG. 5C). Note that the control unit 303 may perform the following image processing on the image data as needed.

Next, a description will be given of image processing in which SIMD-type and sequential-type processing are combined and a high-speed operation is performed by pipeline processing. FIG. 7 is a block diagram showing a flow concept of image processing combining SIMD type and sequential type processing by the image processing processor 204, and FIG. 8 is a flowchart showing the flow of the processing.

Here, an example is shown in which the image processing A and the image processing B are performed in the SIMD operation unit S, and the image processing C is performed in the sequential operation unit T. As an example in which high-speed image processing can be performed by a sequential operation, there is a process in which a previous processing result is reflected in a current processing result, such as an error diffusion process.

First, the image data is transferred to the image data control unit 20.
3 (step S801). Next, the received image data is stored in the local memory C under the control of the control unit 303 (step S802). Subsequently, the control unit 303 of the transfer unit 304 divides the image data into a size that can be processed by the operation unit at one time (step S803). S
The IMD operation unit S1 inputs the divided image data (step S804).

The SIMD operation unit S1 performs predetermined image processing A on this image data (step S805, see FIG. 7), and sends the operation result (image data on which the image processing A has been applied) to the SIMD operation unit S2. Send (Step S80)
6, see FIG. 7 (b)). Control unit 303 of transfer unit 304
Determines whether the image data transmitted to the SIMD operation unit S1 is the last data (step S807), and if it is not the last data (No at step S807), transmits the next image data to the SIMD operation unit S1 If it is the last data (Yes at Step S807), the transmission control is ended.

On the other hand, the image data transferred to the SIMD operation unit S2 in step S806 is sequentially processed by the SIMD operation unit S2.
2 (step S808, see FIG. 7B). The input image data is subjected to image processing B (step S809), and is sequentially transferred to the sequential operation unit T1 (step S810). This transfer control is also performed by the control unit 303 of the transfer unit 304.

The sequential operation section T1 sequentially inputs the image data transferred in step S810 (step S81).
1, see FIG. 7 (b)). The input image data is subjected to image processing C (step S812), and is sequentially stored in the local memory C (step S813). Control unit 3
03 performs storage control in step S813. Further, the control unit 303 determines whether the image data stored in the local memory C is the last data (step S814).

If it is not the last image data (No at Step S814), the control unit 303 continues the storage control at Step S813, and if it is the last image data (Yes at Step S814), it combines the image data (Step S814: Yes). Step S815). Finally, the control unit 303
Transmits the combined image data to the image data control unit 203 after the image processing is completed, and terminates the processing (step S8).
16).

The image processor 204 has two buses B (B1 and B3) for transmitting and receiving image data to and from the image data control unit 203.
Since two (B2 and B4) are provided for reception, two types of image processing can be executed in parallel. In that case, the image data for performing the first type of image processing uses the data buses B1 and B2, and the image data for performing the second type of image processing uses the data bus B3.
And B4, the input / output of image data with the image data control unit 203 is performed.

Next, the internal configuration of the image processor 204 will be described. FIG. 9 is a block diagram illustrating an internal configuration of the image processor 204 of the image processing apparatus according to the present embodiment. In the block diagram of FIG.
The image processor 204 has a plurality of input / output ports 901 for data input / output with the outside, and can set data input and output arbitrarily, respectively.

A bus switch / local memory group 902 is internally provided so as to be connected to the input / output port 901.
The memory control unit 903 controls the memory area to be used and the path of the data bus. Here, the bus switch / local memory group 902 is the same as the local memory group 301 shown in FIG. 3, and the memory control unit 903 is the same as the control unit 303 shown in FIG. The input data and the data for output are assigned to the bus switch / local memory group 902 as a buffer memory, stored in each of them, and the I / F with the outside is controlled.

Bus switch / Local memory group 9
The processor array unit 302 performs various processes on the image data stored in the image data 02 and stores the output result (processed image data) in the bus switch / local memory group 902 again. The processing procedure and parameters for processing in the processor array unit 302 are stored in the program RAM 905 and the data RAM
906 is exchanged. Here, the program RAM 905 and the data RAM 906 are the same as the local memory A shown in FIG.

Program RAM 905, Data RAM 9
06 is transmitted from the process controller 211 to the host buffer 907 through the serial I / F 908.
Downloaded to Further, the process controller 211 reads the contents of the data RAM 906 and monitors the progress of the processing.

When the contents of the processing are changed or the processing form required by the system is changed, the contents of the program RAM 905 and the data RAM 906 referred to by the processor array unit 904 are updated.

(Image Data Control Unit 100 / Image Data Control Unit 203) Next, the image data control unit 1
The outline of the processing in the image data control unit 203 constituting 00 will be described. FIG. 10 is a block diagram illustrating an outline of processing of the image data control unit 203 of the image processing apparatus according to the present embodiment.

In the block diagram of FIG. 10, an image data input / output control unit 1001 inputs (receives) image data from the sensor board unit 202 and outputs (transmits) image data to the image processor 204. I do. That is, the image data input / output control unit 1001 is a component for connecting the image reading unit 101 and the image processing unit 103 (image processing processor 204), and converts the image data read by the image reading unit 101 into the image processing unit 103. It can be said that it is a dedicated input / output unit only for transmitting to the user.

The image data input control unit 1002
The image data corrected by the scanner image by the image processor 204 is input (received). The input image data is subjected to data compression processing in the data compression unit 1003 in order to increase the transfer efficiency in the parallel bus 220. Thereafter, the data is passed through the data conversion unit 1004 and the parallel bus 22 via the parallel data I / F 1005.
Sent to 0.

The image data input from the parallel bus 220 via the parallel data I / F 1005 is compressed for bus transfer.
4 to a data decompression unit 1006, where data decompression processing is performed. The decompressed image data is transferred to the image processor 204 in the image data output control unit 1007.

The image data control section 203 also has a function of converting between parallel data and serial data. The system controller 231 transfers data to the parallel bus 220, and the process controller 211 transfers data to the serial bus 210. The image data control unit 203 performs data conversion for communication between the two controllers.

A serial data I / F is a first serial data I / F 1008 for exchanging data with a process controller via a serial bus 210.
And a second serial data I / F 1009 used for exchanging data with the image processing processor 204.
By providing one system independently of the image processor 204, the interface with the image processor 204 can be smoothed.

Further, the command control unit 1010 operates in accordance with the input command to control the image data control unit 20 described above.
3 controls the operation of each component and each interface.

(Image Writing Unit 104 / Video Data Control Unit 205) Next, an outline of the processing in the video data control unit 205 forming a part of the image writing unit 104 will be described. FIG. 11 is a block diagram illustrating an outline of processing of the video data control unit 205 of the image processing apparatus according to the present embodiment.

In the block diagram of FIG. 11, the video data control unit 205 controls the input image data
Additional processing is performed according to the characteristics of the image forming unit 206. That is, the edge smoothing processing unit 1101 performs dot rearrangement processing by the edge smoothing processing, the pulse control unit 1102 performs pulse control of image data for dot formation, and forms image data on which the above processing has been performed. Output to the unit 206.

The video data control unit 205 has a function of converting the format of parallel data and serial data separately from the conversion of image data.
05 alone can support communication between the system controller 231 and the process controller 211. That is, a parallel data I / F 1103 for transmitting and receiving parallel data, a serial data I / F 1104 for transmitting and receiving serial data, and a parallel data I / F 1104 for transmitting and receiving serial data.
A data conversion unit 1105 for mutually converting data received by the serial data interface 1103 and the serial data I / F 1104
, The formats of both data are converted.

(Unit Configuration) Next, the unit configuration of the image processing apparatus according to the present embodiment will be described.
FIG. 12 is a block diagram illustrating an example of a unit configuration when the image processing apparatus is a digital multifunction peripheral.

As shown in FIG. 12, in the case of a digital multi-function peripheral, it is composed of three units: an image reading unit 101, an image engine control unit 1200, and an image writing unit 104, each unit having a single P.
It can be managed with the CB substrate. Here, the image reading unit 10
1 is a CCD 1201, an A / D conversion module 120
2. It is composed of a gain control module 1203 and the like, and converts optically read optical image information into digital image data.

The image engine control unit 1200 mainly includes a system controller 231, a process controller 211, and a memory module 222 in the image memory control unit 102, and includes an image processor 204, an image memory access control unit 221.
And an image data control unit 203 that performs bus control. Also, the image writing unit 1
Reference numeral 04 denotes a configuration including an image forming unit 206 centering on the video data control unit 205.

In these unit configurations, when the specifications and performance of the image reading unit 101 are changed, if only the image reading unit 101 is changed in the digital multi-function peripheral system, the data interface is retained. No units need to be changed. Also,
When the imaging unit (engine) 206 is changed,
If only the image writing unit 104 is changed, the system can be reconfigured. As described above, since the system depending on the input / output device is constructed in a different configuration, the system is upgraded only by replacing the minimum unit as long as the data interface is maintained.

In the configuration of the image engine control unit 1200 shown in FIG.
4. Each module (configuration unit) of the image data control unit 203 and the image memory access control unit 221 is configured as an independent module. Therefore, the common module is used for general purpose by deleting a module that is not required to be converted from the image engine control unit 1200 to the controller. As described above, a similar function is realized by using a common module without separately creating a module for controlling an image engine and a module for a controller.

(Configuration of SIMD type processor) FIG.
FIG. 1 is an explanatory diagram showing a schematic configuration of a SIMD type processor. SIMD (Single Instruction)
The Multiple Data stream is for executing a single instruction on a plurality of data in parallel, and is composed of a plurality of PEs (processor elements).

Each PE has a register (Reg) 1301 for storing data, a multiplexer (MUX) 1302 for accessing a register of another PE,
Barrel Shifter (Shift Expand) 130
3. A logical operation unit (ALU) 1304, an accumulator (A) 1305 for storing a logical result, and a temporary register (F) 1306 for temporarily saving the contents of the accumulator 1305.

Each register 1301 is connected to an address bus and a data bus (a read line and a word line), and stores an instruction code defining a process and data to be processed. The contents of the register 1301 are input to the logical operation unit 1304, and the result of the operation processing is stored in the accumulator 1305. In order to take out the operation processing result outside the PE, the temporary register 1306 is used.
Evacuate once. Temporary register 1306
By extracting the contents of the above, a processing result for the target data is obtained.

The instruction code is given to each PE with the same contents, and the data to be processed is given in a different state for each PE.
The contents of the register 1301 of E are stored in the multiplexer 13
By referring to 02, the calculation result is processed in parallel and output to each accumulator 1305.

For example, if the contents of one line of image data are arranged in the PE for each pixel and arithmetic processing is performed with the same instruction code, the processing result for one line can be processed in a shorter time than in the case of sequentially processing one pixel at a time. can get. In particular, the spatial filter processing and the shading correction processing can be performed in common for all PEs, with the instruction code for each PE being the operation expression itself.

As described above, the image processing apparatus according to the present embodiment can efficiently transmit and receive image data and optimize image processing, thereby achieving a multi-function system. A plurality of types of image processing can be efficiently performed.

Further, the image processing apparatus according to the present embodiment has a programmable processor array unit,
In addition, since the SIMD operation unit excellent in parallel operation and the sequential operation unit excellent in sequential operation are combined, efficient image processing can be performed.

Further, the image processing apparatus according to the present embodiment updates the program in accordance with the version upgrade of other units in the system, thereby enabling efficient image processing.

[0125]

As described above, according to the first aspect of the present invention, there is provided an image reading means for reading image data and / or an image memory control means for controlling image memory to write / read image data. And / or image processing means for connecting to image writing means for writing image data to transfer paper or the like, comprising a plurality of programmable processing operation means and transmission / reception control means, wherein the processing operation means performs image processing on the image data. The transmission / reception control means receives the first image data read by the image reading means and / or the second image data read by the image memory control means, and transmits the first image data to the processing calculation means; Receiving image data on which image processing has been performed by the processing operation means,
Alternatively, since the image data is transmitted to the image memory control unit and / or the image writing unit, the image data can be efficiently transmitted and received, and the image processing can be optimized. An effect is obtained that an image processing apparatus capable of efficiently performing a plurality of types of image processing is obtained.

According to a second aspect of the present invention, in the first aspect of the present invention, the image processing means includes an image data control means and the image reading means and / or
Alternatively, the image data control unit is connected to the image memory control unit and / or the image writing unit, and the image data control unit is connected to the image processing unit and / or the image reading unit and / or the image memory control unit and / or the image writing unit. Since image data is transmitted to and received from the means, it is possible to control adaptation of image processing to input / output devices, thereby efficiently performing a plurality of types of image processing in a system for realizing multi-functions. There is an effect that an image processing apparatus that can perform the processing can be obtained.

According to a third aspect of the present invention, in the first or second aspect, the program storing means stores a processing program relating to image processing performed by the processing calculating means, and Transmits the processing program from the program storage unit to the processing operation unit, so that it is possible to cope with various image processing at any time, and to efficiently perform a plurality of types of image processing in a system for realizing multi-function. This provides an effect that an image processing apparatus capable of performing the above is obtained.

According to a fourth aspect of the present invention, in the third aspect of the present invention, the system information storage means includes a processing capability of the image processing means and a processing capability of each means connected to the image processing means. The system information on the capacity is stored, the processing capacity determining means determines whether the processing capacity of the image processing means is inferior based on the system information, and the program updating means determines whether the processing capacity is inferior by the processing capacity determining means. If it is determined that the processing program is updated, the processing program stored in the program storage unit is updated. Therefore, even if the functions of other processing units of the system are improved, image processing corresponding to the new system can be performed. Image processing that can efficiently perform multiple types of image processing in a system for realizing multi-functions. An effect that physical device is obtained.

According to a fifth aspect of the present invention, in any one of the first to fourth aspects of the present invention, the division / combination determination means needs to divide or combine image data. The image data division / combination unit divides the image data into a predetermined data length or combines the divided image data, and the transmission / reception control unit determines whether the division / combination is required by the division / combination determination unit. Is transmitted to the division / combination determination unit, and the image data divided or combined by the division / combination determination unit is received, so that image processing according to the processing capability of the processing operation unit is performed. This makes it possible to obtain an image processing apparatus capable of efficiently performing a plurality of types of image processing in a system for realizing multi-functions. Achieve the.

According to the invention described in claim 6, in the invention described in any one of claims 1 to 5, the plurality of processing operation means may be a SIMD type processor or a SIMD type processor. Since it is composed of a type arithmetic processor, high-speed parallel processing corresponding to the type of image processing can be performed, thereby efficiently performing a plurality of types of image processing in a system for realizing multi-functions. There is an effect that a possible image processing apparatus can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram functionally showing a configuration of an image processing apparatus according to an embodiment.

FIG. 2 is a block diagram illustrating an example of a hardware configuration of the image processing apparatus according to the embodiment;

FIG. 3 is a schematic diagram illustrating an entire configuration of an image processor of the image processing apparatus according to the embodiment;

FIG. 4 is a diagram illustrating an example of an image processor having a configuration different from that of the image processor illustrated in FIG. 3;

FIG. 5 is a block diagram showing a flow concept of SIMD-type image processing by the image processor according to the present embodiment.

FIG. 6 is a flowchart illustrating a flow concept of SIMD-type image processing.

FIG. 7 is a block diagram showing the concept of the flow of image processing combining SIMD type and sequential type processing by the image processing processor according to the present embodiment.

FIG. 8 is a flowchart illustrating a flow of image processing in which SIMD-type and sequential-type processing are combined.

FIG. 9 is a block diagram illustrating an internal configuration of an image processor according to the present embodiment;

FIG. 10 is a block diagram illustrating an outline of a process of an image data control unit of the image processing apparatus according to the embodiment;

FIG. 11 is a block diagram illustrating an outline of processing of video data by the image processing apparatus according to the embodiment;

FIG. 12 is a block diagram illustrating an example of a unit configuration when the image processing apparatus is a digital multifunction peripheral.

FIG. 13 is an explanatory diagram showing a schematic configuration of a SIMD type processor.

FIG. 14 is a block diagram illustrating a hardware configuration of a digital multifunction peripheral according to the related art.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 Image data control unit 101 Image reading unit 102 Image memory control unit 103 Image processing unit 104 Image writing unit 201 Reading unit 202 Sensor board unit 203 Image data control unit 204 Image processing processor 205 Video data control unit 206 Image formation Unit 210 Serial bus 211 Process controller 220 Parallel bus 221 Image memory access control unit 222 Memory module 224 Facsimile control unit 231 System controller 301 Local memory group 302 Processor array unit 303 Control unit 304 Transfer unit 901 I / O port 902 Bus switch / Local memory group 903 Memory controller 904 Processor array Unit 905 Program RAM 906 Data RAM 907 Host buffer 1001 Image data input / output control unit 1002 Image data input control unit 1007 Image data output control unit 1010 Command control unit 1301 Register 1302 Multiplexer 1303 Barrel shifter 1304 Logical operation unit 1305 Accumulator 1306 Temporary register B1 to B4, B6 to B16 Data bus B5 Bidirectional bus

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Yuji Takahashi 1-3-6 Nakamagome, Ota-ku, Tokyo Inside Ricoh Company (72) Inventor Yasuyuki Nomizu 1-3-6 Nakamagome, Ota-ku, Tokyo Stock Ricoh Co., Ltd. (72) Inventor: Sugitaka Shikogi 1-3-6 Nakamagome, Ota-ku, Tokyo Stock Company Ricoh Company (72) Inventor: Takako Sato 1-3-6 Nakamagome, Ota-ku, Tokyo Stock Company (72) Inventor Rie Ishii 1-3-6 Nakamagome, Ota-ku, Tokyo Ricoh Co., Ltd. (72) Inventor Takeharu Tone 1-3-6 Nakamagome, Ota-ku, Tokyo Ricoh Co., Ltd. (72) Inventor Takusho Fukuda 1-3-6 Nakamagome, Ota-ku, Tokyo Inside Ricoh Company (72) Inventor Shinya Miyazaki 1-3-6 Nakamagome, Ota-ku, Tokyo Share Inside the Ricoh Company (72) Inventor Hiroyuki Kawamoto 1-3-6 Nakamagome, Ota-ku, Tokyo Stock Company Ricoh Company (72) Hideto Miyazaki 1-3-6 Nakamagome, Ota-ku, Tokyo Stock Company Ricoh Company F term (reference) 5B057 AA11 BA11 CE08 CE09 CH02 CH11 CH20 5C076 AA11 AA36 BA06 5C077 LL16 PP19 PP23 PQ12 PQ22 TT06

Claims (6)

[Claims] An image reading means for reading image data and / or an image memory control means for controlling image memory to write / read image data and / or an image writing means for writing image data to transfer paper or the like. An image processing apparatus having an image processing unit that performs image processing on image data, a plurality of programmable processing operation units, and first image data read by the image reading unit. Alternatively, the second image data read by the image memory control means is received and transmitted to the processing operation means, and the image data subjected to image processing by the processing operation means is received to perform another processing operation. Sending / receiving to / from the means and / or to the image memory control means and / or to the image writing means An image processing apparatus comprising: a communication control unit. 2. The image processing unit is connected to the image reading unit and / or the image memory control unit and / or the image writing unit via an image data control unit. 2. The image processing apparatus according to claim 1, wherein image data is transmitted and received between the image processing unit and the image reading unit and / or the image memory control unit and / or the image writing unit. . 3. A program storage means for storing a processing program relating to image processing performed by the processing operation means, wherein the transmission / reception control means transmits the processing program from the program storage means to the processing operation means. The image processing apparatus according to claim 1, wherein: 4. System information storage means for storing system information relating to the processing capacity of the image processing means and the processing capacity of each means connected to the image processing means, and processing of the image processing means based on the system information. Processing capacity determining means for determining whether the performance is inferior, and program updating means for updating a processing program stored in the program storage means when the processing capacity determining means determines that the processing capacity is inferior. The image processing apparatus according to claim 3, comprising: 5. A division / combination determining means for determining whether division or combination is necessary for image data, and an image for dividing image data into a predetermined data length or combining divided image data A data division / combination unit, wherein the transmission / reception control unit transmits image data determined to be required to be divided or combined by the division / combination determination unit to the division / combination determination unit, The image processing apparatus according to any one of claims 1 to 4, wherein the image processing apparatus receives image data divided or combined according to (1). 6. An image according to claim 1, wherein said plurality of processing operation means are constituted by a SIMD type processor or a SIMD type processor and a sequential type operation processor. Processing equipment.