JP2001156667A - Signal processing circuit for fm radio receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the sampling frequency concerning a reference subcarrier. SOLUTION: A clock generating circuit 30 generates a rectangular wave with a frequency of 38 kHz. A filter 32 unsharpens the rectangular wave into a sine wave, and gives the resultant sine wave to an L-R demodulation circuit 26 as the reference subscarrier. The L-R demodulation circuit 26 can accurately conduct L-R demodulation through the reception of the sine wave of the reference subcarrier even when the sampling frequency of the clock signal generated by the clock generating circuit 30 is lowered.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit of an FM radio receiver that receives an FM radio broadcast wave, converts a received signal into an intermediate frequency signal, converts the signal into a digital signal, and demodulates the signal.

[0002]

2. Description of the Related Art Conventionally, analog circuits have been used in FM radio receivers. In this circuit, a broadcast wave received by an antenna is amplified by an amplifier, and the frequency of a desired station is compared with the amplified RF signal. Local oscillation signals different by an intermediate frequency are mixed. Then, the signal of the desired station is obtained by extracting only the intermediate frequency component from the mixed signal, and the signal of the desired station frequency-converted to the intermediate frequency is subjected to FM.
A demodulation process is performed, and a demodulated signal is supplied to a speaker to output a sound.

[0003] Here, like a CD (compact disk) player, an audio signal is converted to a DSP (digital disc).
Signal processing (digital signal processing) systems have become widespread, and FM radio receivers
The number of cases in which signal processing is performed using a DSP is increasing.

[0004] In the processing of an audio signal by such a DSP, it is easy to achieve a graphic equalizer function, bass treble, loudness, low boost function, surround function, and the like, and a wider range of processing can be performed than analog processing. Become.

Here, in an FM radio receiver using a DSP, an intermediate frequency signal is converted into a digital signal,
The obtained digital signal is processed by the DSP. That is,
The intermediate frequency is subjected to FM demodulation to obtain an L + R signal (composite signal). This L + R signal has 38 kHz
Are superimposed on the LR signal and the 19 kHz pilot signal on the subcarrier. A 38 kHz clock signal synchronized with the subcarrier is obtained using a 19 kHz pilot signal, and the LR signal is demodulated using the clock signal.
Then, an L signal and an R signal are obtained by adding and subtracting the L + R signal and the LR signal, and the obtained L signal and R signal are converted to D signals.
/ A conversion and supply to the speaker.

[0006]

Here, the processing in the DSP is all digital signal processing, and the demodulation of the LR signal by the subcarrier is also performed as a multiplication of the digital composite signal and the 38 kHz clock as the digital signal. .

The 38 kHz clock signal is a rectangular wave obtained by dividing a system clock or the like.
In order to express this sufficiently accurately with a digital signal, a sampling frequency about 10 times that of the signal is required. That is, it is necessary to obtain a digital signal by A / D converting a 38 kHz clock signal at a sampling frequency of about 38 kHz × 10 = 380 kHz.

On the other hand, it is difficult to configure a circuit that operates with a high-frequency clock practically in digital processing, and there is a demand to lower the sampling frequency. However, if the sampling frequency is reduced, the digital clock signal for demodulation becomes inaccurate, and there is a problem that accurate demodulation cannot be performed.

An object of the present invention is to provide a signal processing circuit of an FM radio receiver that can perform relatively accurate demodulation of an LR signal even if the sampling frequency of a demodulation clock is lowered.

[0010]

SUMMARY OF THE INVENTION The present invention relates to a signal processing circuit of an FM radio receiver which receives an FM radio broadcast wave, converts a received signal into an intermediate frequency signal, converts the signal into a digital signal, and demodulates the signal. The sine wave or the pseudo sine wave is used as a digital reference subcarrier when demodulating an LR signal using a digital reference subcarrier with respect to a digital composite signal obtained by FM demodulation. And

As described above, the LR signal is demodulated using the digital reference subcarrier as a sine wave or a pseudo sine wave. In the case of a sine wave, distortion does not easily occur during demodulation even if there is no harmonic component and the sampling frequency is relatively low. Therefore, even if the sampling frequency for obtaining the digital reference subcarrier is relatively low, it is possible to accurately demodulate the LR signal.

Preferably, the digital reference sub-carrier is obtained by processing a rectangular wave signal synchronized with the sub-carrier of the digital composite signal by an IIR filter to remove a harmonic component. By converting a rectangular wave signal into a sine wave using an IIR filter, a digital rectangular wave can be processed as a sine wave reference subcarrier.

[0013]

Embodiments of the present invention (hereinafter referred to as embodiments) will be described below with reference to the drawings.

FIG. 1 is a diagram showing a circuit of the embodiment.
The RF signal received by the antenna 10 is provided to the front end 12. In the front end 12, after amplifying the received signal, the local oscillation signal is mixed and filtered to obtain a predetermined intermediate frequency (IF) signal. Here, the local oscillation signal is adjusted to have a frequency different from the desired station frequency by an intermediate frequency, and a signal of the desired station is obtained as an intermediate frequency signal. Note that FM
In a radio receiver, the intermediate frequency signal is usually 10.
Although it is 7 MHz, in the present embodiment, the frequency of the carrier is reduced to about 460 kHz. Thereby, the intermediate frequency can be made to depend on the practical operation speed of the DSP.

The intermediate frequency signal from the front end 12 is supplied to an amplifier 14 where it is amplified. The intermediate frequency signal amplified by the amplifier 14 is supplied to an A / D converter 16 and is converted into a digital signal.

The digital intermediate frequency signal obtained is D
This is supplied to SP20, where the FM demodulation processing is performed.
First, the intermediate frequency signal is supplied to the FM demodulation circuit 22, where the signal whose phase is delayed by 180 ° is FM-demodulated. As a result, an L + R signal (composite signal) is obtained. The L + R signal is superimposed on the LR signal on a 38 kHz subcarrier and a 19 KHz pilot signal. Therefore, the high band is removed by the low-pass filter 24, and the baseband L + R is extracted.

On the other hand, the L + R signal is supplied to an LR demodulation circuit 26.
, Where the LR signal is extracted. For this purpose, the L + R signal is also supplied to a band pass filter 28, where a 19 kHz pilot signal is extracted. This pilot signal is synchronized with the subcarrier on which the LR signal is carried. The pilot signal is supplied to the clock generation circuit 30, where a 38 kHz rectangular wave (a rectangular wave reference subcarrier) is generated. For example, this rectangular wave is divided into 38 k
It is possible to generate a rectangular wave of Hz by synchronizing the phase of the rectangular wave with a pilot signal by a PLL circuit. Note that this rectangular wave is synchronized with the subcarrier 3
The vibration may be 8 kHz, and may be directly generated from the LR signal.

Then, using this reference subcarrier, L + R
The LR signal superimposed on the signal is demodulated. At this time, the 38 kHz signal generated by the clock generation circuit 30 is a rectangular wave. Therefore, this rectangular wave is filtered by the filter 32.
To convert the signal into a sine wave or a pseudo sine wave having a waveform close to the sine wave.

The sine wave reference subcarrier of 38 kHz is supplied to the LR demodulation circuit 26. Thus, the LR demodulation circuit 26 multiplies the L + R signal (composite signal) by the reference subcarrier to obtain the LR signal on the subcarrier.

The output of the filter 24, L + R
The signal and the LR signal from the LR demodulation circuit 26 are supplied to an adder 34 and a subtractor 36. Then, an L signal is obtained in the adder 34 and an R signal is obtained in the subtractor 36. Then, the L signal and the R signal are output to the speaker via the D / A converters 38a and 38b, respectively, so that sound is output. In the DSP 20, since the audio signal is digitally processed, it is easy to perform surround processing and various effect processing, and it is also easy to achieve a volume adjustment for each frequency band, a graphic equalizer function, and the like.

As described above, in the present embodiment, the sampling frequency of the reference subcarrier is reduced by dulling the rectangular wave by the filter 32 and employing a sine wave or a pseudo sine wave close to the sine wave as the reference subcarrier. Can be reduced. That is, in the case of a rectangular wave, there is a harmonic component, and unless the sampling frequency is set to about 10 times the frequency of the rectangular wave to be converted, the rectangular wave cannot be correctly represented by a digital signal. That is, the clipped signal contains a high frequency of about 1 to 10 times, and a high sampling frequency is required to sample all of them. In the case of the present embodiment, the reference subcarrier is 38 kHz, and its sampling clock is about 380 kHz. However, if a sine wave is used, accurate demodulation can be performed in demodulation using the sampling clock even if the sampling clock is relatively low. At this time, since the sine wave contains only a high frequency of about 1 to 2 times, it can be demodulated at a sampling frequency of 2 to 3 times the carrier frequency. In the present embodiment, a sampling frequency of about 154 kHz is employed for a 38 kHz rectangular wave, and the rectangular wave obtained at this sampling frequency is blunted by the filter 32 to be a sine wave. Thus, the LR demodulation circuit 26 was able to accurately demodulate the LR signal.

Here, as the filter 32, a low-pass or band-pass filter is used.
(Infinite Impulse Response) filter is adopted. This IIR filter has a loop in which the signal after addition is delayed and returned to the adder, whereby the response to the impulse continues indefinitely. In a normal case, a path before delaying a signal before input to an adder is supplied to the adder, a path having a different delay time, and the like are provided, and a coefficient of a coefficient multiplier arranged on a plurality of paths can be set. By setting this coefficient to an appropriate one, desired filtering can be performed.

[0023]

As described above, according to the present invention,
In digital signal processing, since the LR signal is demodulated with the reference subcarrier being a sine wave or a pseudo sine wave, accurate demodulation of the LR signal can be performed even if the sampling frequency for obtaining the reference subcarrier is relatively low. It can be carried out.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a circuit according to an embodiment.

[Explanation of symbols]

Reference Signs List 10 antenna, 12 front end, 14 amplifier, 16 A / D converter, 20 DSP, 22 FM demodulation circuit, 24 filter, 26 LR demodulation circuit, 28
Bandpass filter, 30 clock generation circuit, 32
filter.

Claims (2)

[Claims] 1. A signal processing circuit of an FM radio receiver which receives an FM radio broadcast wave, converts a received signal into an intermediate frequency signal, converts the signal into a digital signal, and demodulates the signal. When demodulating an LR signal using a digital reference subcarrier with respect to the obtained digital composite signal, a signal of an FM radio receiver using a sine wave or a pseudo sine wave as a digital reference subcarrier. Processing circuit. 2. The circuit according to claim 1, wherein the digital reference subcarrier is obtained by processing a rectangular wave signal synchronized with a subcarrier of a digital composite signal by an IIR filter to remove a harmonic component. A signal processing circuit for an FM radio receiver.