JP2001156320A - Method for manufacturing semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem of the risk of deterioration due to machining time for a large-area semiconductor element, and heat and/or light to a semiconductor layer when a laser beam is used as a means for eliminating one portion of the surface of a semiconductor element in a line. SOLUTION: In the manufacturing method for eliminating one portion of a semiconductor element surface in a line, a wire electrode 102 is arranged while a discharge gap is formed at an area to the surface of a semiconductor element 101, and a voltage pulse is intermittently applied to the wire electrode 102, thus eliminating one portion of the semiconductor element surface in a line. Further, by feeding the wire electrode 102 for machining, thin line-shaped continuous machining can be made.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having a rectifying function, and more particularly to a method of manufacturing a semiconductor device in which a part of the surface is removed in a line in a manufacturing process of a photovoltaic device or the like. It is about.

[0002]

In recent years, and global warming due to the increase in the greenhouse effect that is CO ₂ becomes a problem, demand for clean sources of energy development that do not emit CO _2, has been increasingly. One of such energy sources is nuclear power generation, but there are many problems that must be solved, such as the problem of radioactive waste, and clean energy sources with higher safety are desired.

[0003] Among the clean energy sources expected in the future, solar cells (photovoltaic elements) have attracted much attention in terms of cleanliness, high safety, and easy handling. .

In the manufacture of a semiconductor device such as a photovoltaic device, a thin film is formed on a substrate or the like, and then a part of the semiconductor device formed on the same substrate is used to increase the output voltage of the semiconductor device. There is known an integrated semiconductor device which is divided into a plurality by scribing in a line shape, and is integrated by connecting in series. Also, in a semiconductor device using a semiconductor wafer such as a silicon wafer, a part of the surface of the semiconductor wafer may be scribed in a line.

Conventionally, chemical etching or ablation by an energy beam such as a laser beam has been used for scribing such a thin film and a surface layer.
In particular, a technique of dividing a transparent conductive layer or a photoelectric conversion layer using a laser, that is, a technique of laser scribe has been studied and many proposals have been made.

For example, Japanese Patent Publication No. 62-14954 discloses a structure of an integrated solar cell. In such a solar cell, a metal oxide such as an amorphous silicon thin film, a metal thin film, or a transparent conductive film is used. A thin film such as an object thin film is scribed in a line.

[0007] JP-A-5-25173 discloses an outline,
A plurality of photoelectric converters comprising a substrate side thin film electrode, an amorphous semiconductor formed of a pin junction formed on the thin film electrode, and a back surface thin film electrode formed on the amorphous semiconductor layer are formed on a glass substrate. And a means for removing a part of the amorphous semiconductor layer in a manufacturing process of an integrated solar cell module in which a part of the photoelectric converter is connected in series.
A technique using an AG laser is disclosed.

Japanese Patent Application Laid-Open No. Hei 7-307482 discloses, in brief, a first conductive type semiconductor layer, an i-type semiconductor layer and a first conductive type semiconductor layer on a substrate-side electrode formed separately on the same substrate.
Forming at least one stacked semiconductor layer in which a second conductivity type semiconductor layer of a conductivity type opposite to the conductivity type semiconductor layer is stacked, and dividing the stacked semiconductor layer by a semiconductor layer separation groove; A technique in which a back electrode is formed thereon, and in the manufacturing process of an integrated solar cell in which the substrate-side electrode and the back-side electrode of the adjacent stacked semiconductor layer are connected to each other, a technique of forming the split separation groove by a laser scribe method Is disclosed.

Japanese Patent Application Laid-Open No. 9-8337 discloses an outline that one first electrode is provided on a first electrode layer divided into a plurality of regions on a substrate and over two first electrode layers. A plurality of semiconductor layers having a connection opening formed on the layer are provided, and a conductor layer is provided in a region on the semiconductor layer other than the connection opening, and a connection layer is formed on the conductor layer. A unit element comprising a region sandwiched between the second electrode layer and the other first electrode layer by providing the second electrode layer in a state of being electrically connected to one of the first electrode layers via the opening for use Discloses a technique of fusing the electrode layer by a laser scribe method in a manufacturing process of an integrated thin film solar cell in which a plurality of are connected in series.

Japanese Patent Application Laid-Open No. 9-36397 discloses that
Outline, first electrode and second electrode on both sides of amorphous silicon layer
The second electrode is stacked in close contact with the insulating substrate, the second electrode of the adjacent power generation cell is insulated by the insulating groove, and the first electrode of the adjacent power generation cell is stacked.
An electrode and a second electrode are connected by a laser connection part, and a laser cutting part provided adjacent to the laser connection part cuts a first electrode of an adjacent power generation cell to manufacture an integrated solar cell. There is disclosed a technique in which an electrode is cut by a laser scribe method in a process and the electrode is connected by a laser welding method.

[0011] Japanese Patent Application Laid-Open Nos. 9-129903 and 9-129906 disclose an outline of a unit comprising a first electrode layer, a first stack cell, a second stack cell, and a second electrode layer on a substrate. A technique is disclosed in which a plurality of elements are formed, and in a manufacturing process of an integrated thin film tandem solar cell in which the plurality of unit elements are connected in series, electrodes and / or cells are blown and divided by a laser scribe method.

[0012]

SUMMARY OF THE INVENTION In order to explain the problem to be solved by the present invention, first, a typical structure of a semiconductor device (in this description, a solar cell) integrated by using a laser scribe method is described. The manufacturing method will be described with reference to FIG.

FIG. 13 is a schematic view showing the structure of a conventional semiconductor device (thin film solar cell) as a sectional view. This is the structure of an integrated thin-film solar cell generally adopted in the past. 1321 is an insulating substrate, 1322 is a first electrode layer, 1324 is a semiconductor layer, 1326 is a second electrode layer,
328 is a unit element, 1323 is a dividing groove for dividing the first electrode layer, 1325 is a connecting portion connecting the first electrode and the second electrode of the adjacent unit element, and 1327 divides the adjacent second electrode and the semiconductor layer. A dividing groove (dividing the semiconductor layer is not essential) is shown.

A first electrode layer 1322, a semiconductor layer 1324 made of amorphous silicon or the like, and a second electrode layer 1326 are sequentially laminated, and a connection portion 13 provided on the semiconductor layer 1324 is formed.
25, the unit elements 1328 adjacent to each other are connected in series.

As the first electrode layer 1322, a transparent conductive film such as tin oxide (SnO ₂ ), zinc oxide (ZnO), or indium tin oxide (ITO) is usually used. As the second electrode layer 1324, aluminum is used. (Al), silver (A
g), a metal film such as chromium (Cr) is used.

Such a conventional integrated thin-film solar cell is
It is produced by the following method.

On an insulating substrate (eg, a glass substrate) 1321, a transparent conductive film such as SnO ₂ , ZnO, or ITO is deposited as a first electrode layer 1322 by a sputtering method or the like.
Separation groove 1323 for separating first electrode layer 1322 corresponding to the power generation region by laser scribe method for integration
To form Then, cleaning is performed to remove the fusing residue generated at the time of laser scribing, and an amorphous silicon semiconductor layer having a pin junction structure (p layer and / or n layer may be fine if necessary) by a plasma CVD method. 1324 (which may be crystalline) is deposited over the entire surface. Subsequently, the semiconductor layer 1324 is separated by the laser scribe method in the same manner as the first electrode layer 1322, and the separation groove 1325 is formed.
Is formed, washing for removing the fusing residue is performed.
Further, as the second electrode layer 1326, a metal such as Al, Ag, or Cr is deposited in a single layer or a plurality of layers. By this deposition, the separation groove 1325 becomes a connection portion between the first electrode layer and the second electrode layer of the adjacent unit element, and further the second electrode layer 1326 is connected to the first electrode layer.
Similarly to the electrode layer 1322, the integrated large-area solar cell is completed by forming a separation groove 427 by separation by a laser scribe method.

However, in the case where semiconductor elements formed on the same substrate by such laser processing are divided and integrated by connecting them in series, the following problems exist.

A part of the amorphous silicon layer is heated by the laser beam irradiation and the outermost surface portion is crystallized, whereby the resistance is reduced, the leakage current is increased, and the output of the solar cell may be reduced. It is considered that the portion irradiated with the laser beam at the time of laser scribing becomes instantaneously at a high temperature of about 1000 ° C. Due to this heat, the outermost surface of the blown portion of the semiconductor layer is crystallized (or alloyed with the metal of the electrode layer), so that the electric resistance may be reduced by two digits or more. When the electric resistance of the semiconductor layer portion is reduced, a leakage current flows (short-circuits) between the upper electrode and the lower electrode via the semiconductor layer whose electric resistance is reduced, so that the generated power is wasted. This leakage current reduces the output of the solar cell. The leakage current is proportional to a voltage generated between the first electrode layer 1322 and the second electrode layer 1326. On the other hand, when the light is weak, the output current of the solar cell is small, but the output voltage does not decrease so much. Therefore, even when the light is weak, the leakage current does not decrease so much. Therefore, when the light is weak, there is a problem that the power loss due to the leakage current becomes relatively large.

Further, in order to scribe each layer in a line by using a laser beam, the laser beam must be scanned, and when patterning a large area, it takes a long time.

The present invention solves these problems, and further provides a method of manufacturing a semiconductor device in which a part of the surface of a semiconductor device which is substantially free from deterioration due to light irradiation or is extremely small is removed in a line shape. Aim.

[0022]

According to the present invention, there is provided a method for manufacturing a semiconductor device, comprising: removing at least a part of the surface of the semiconductor device on a line;
Forming a discharge gap on the surface of the semiconductor element, arranging electrodes, applying a voltage pulse intermittently to the gap to generate a discharge, and removing a part of the semiconductor element surface. is there.

The method of manufacturing a semiconductor device according to the present invention further has the following features: "the electrode is a wire-type electrode"; and "processing while feeding the wire electrode continuously at a speed of 5 mm / sec or more." Performing, "the width or diameter of the electrode is 0.05 mm to 1 mm", "at least a discharge gap for generating a discharge is immersed in a machining fluid", and "at least a discharge for generating a discharge". The gap is filled with a reaction gas. "

[0024]

Embodiments of the present invention will be described below.

(Semiconductor Element) The present invention can be suitably applied to an amorphous semiconductor element formed on an insulating substrate. However, the present invention is also applicable to non-amorphous single-crystal semiconductor elements, polycrystalline semiconductor elements, or semiconductor elements other than crystalline systems such as compounds, and further, in addition to an insulating substrate, a conductive substrate, Alternatively, the present invention can be applied to a semiconductor element having no substrate such as a semiconductor wafer.

FIG. 10 is a schematic diagram showing a layer structure of a photovoltaic element as an example of a semiconductor element to which the present invention can be applied. FIGS. 11A to 11C show the structure in each manufacturing process of the semiconductor device of FIG.

The semiconductor element is formed on an insulating substrate such as a polyimide film or a metal substrate 1021 such as stainless steel.
It is configured by laminating a reflective conductive layer 1026 made of l, Cu, Ag or the like, a semiconductor layer 1024, and a transparent conductive layer 1022 such as ITO.

FIG. 11A shows that a reflective conductive layer 1026 is deposited on the surface of a substrate 1021 and further a reflective conductive layer 1026 is formed.
5 shows a state in which a plurality of division grooves 1027 are formed. These dividing grooves 1027 allow the reflective conductive layer 10
26 is electrically divided.

FIG. 11B shows a state in which a semiconductor layer 1024 is deposited over the reflective conductive layer 1026 and the dividing groove 1027, and a plurality of dividing grooves 1025 are formed in the semiconductor layer 1024.

FIG. 11C shows that a transparent conductive layer 1022 is deposited over the semiconductor layer 1024 and the dividing groove 1025 and further electrically divided by a plurality of dividing grooves 523 so that adjacent semiconductor elements are connected in series. Represents the state connected to.

FIG. 12 is a schematic view showing a layer structure of a photovoltaic element formed on a transparent substrate as another example of a semiconductor element to which the present invention can be applied. The semiconductor element is
On a transparent substrate 1021 such as glass, SnO ₂ , Zn
It is composed of a transparent conductive layer 1022 such as O or ITO, a semiconductor layer 1024 such as a photovoltaic element, and a reflective conductive layer 1026 made of Al, Cu, Ag or the like.

Hereinafter, each component of the semiconductor device to which the present invention can be applied will be described in more detail.

Substrate The substrate 1021 is a member that mechanically supports the semiconductor layer 1024 when the semiconductor element is thin, such as amorphous, and the semiconductor layer itself, such as a semiconductor wafer, has sufficient mechanical strength. If it does, it need not be provided. Substrate 102
The material of the substrate 1021 may be conductive or insulating.
When the electrode also functions as an electrode, the electrode must be conductive. The substrate 1021 is required to have heat resistance that can withstand a heating temperature (normally 200 ° C. or higher) when providing an electrode, a semiconductor layer, or the like.

As the conductive material forming the substrate 1021, for example, Fe, Ni, Cr, Al, Mo, Au, N
Examples include metals such as b, Ta, V, Ti, Pt, and Pb, and alloys thereof, for example, thin plates such as brass and stainless steel and composites thereof.

The insulating material constituting the substrate 1021 includes heat-resistant resin films such as polyester, polyethylene, cellulose acetate, polypropylene, polyvinyl chloride, polyvinylidene chloride, polystyrene, polyamide, polyimide, polyethylene terephthalate, and epoxy resin. Or composites of these with glass fiber, carbon fiber, boron fiber, and the like; glass, ceramics, and the like; and laminated materials in which these insulating layers are formed on a conductive substrate. The insulating layer formed on the conductive substrate has at least 1 × 10 ¹⁰ Ωc
m, preferably 1 × 10 ¹² Ωcm or more. Examples of the material include a diamond film, a silicon film, a silicon carbide film, a silicon nitride film, a silicon oxide film, an aluminum oxide film, a calcium fluoride film, and the like. These films are formed by a method such as sputtering, plasma CVD, or ion plating. Can be deposited on the conductive substrate.

These substrates may be used after being cut into a predetermined shape, or may be used in the form of a long sheet. When used in the form of a long sheet, it can be wound in a coil shape, so that it is suitable for continuous production, and storage and transportation are easy. The surface of the substrate may be a mirror surface, but may have appropriate irregularities.

Reflective conductive layer The reflective conductive layer 1026 is a reflective layer that reflects light transmitted through the semiconductor layer 1024 and enters the semiconductor layer 1024 again, and / or one of the conductive layers for extracting generated power. It is required that a semiconductor or the like has a work function that becomes an ohmic contact. As a material, for example, Al, Ag, Pt, Au, Ni, Ti,
Mo, Fe, V, Cr, Cu, SnO ₂ , In ₂ O ₃ , Z
nO, CdO, Cd ₂ SnO ₄ , ITO, or the like, an alloy containing these metals, a transparent conductive oxide (TCO), or the like is preferably used. The surface of the reflective conductive layer 1026 is desirably smooth. However, when irregular reflection of light is caused, the surface may be textured.

As a method of forming the reflective electrode layer, for example, a method of sputtering, plating, plasma CVD, ion plating, or the like is used to deposit a film on a substrate (in the case of a conductive substrate, on an insulating film formed on the conductive substrate). Can be done.

When the substrate 1021 is made of a conductive material, the reflective conductive layer 1026 may not be provided.

Semiconductor Layer For the semiconductor layer 1024, a known semiconductor substance generally used can be used. For example, compound semiconductors such as pin-junction amorphous silicon, pn-junction single-crystal silicon, polycrystalline silicon, and CuInSe ₂ / CdS can be given. Further, in the case of amorphous silicon, at least one or all or all of the layers (p layer, i layer, and n layer) constituting the semiconductor layer may have a microcrystalline structure.

As a method of manufacturing the semiconductor layer, when the semiconductor layer is amorphous silicon, the semiconductor layer is manufactured by introducing a raw material gas for forming a thin film such as silane gas into plasma CVD or the like for generating plasma discharge. Can be. When the semiconductor layer is a pn junction polycrystalline silicon layer, for example, there is a method of forming a thin film from molten silicon. When the semiconductor layer is CuInSe ₂ / CdS, it is formed by a method such as an electron beam evaporation method, a sputtering method, and an electrodeposition method.

Transparent Conductive Layer The transparent conductive layer 1022 is a conductive layer for extracting electric power generated in the semiconductor layer 1024, and forms a pair with the reflective conductive layer 1026. The transparent conductive layer 1022 is necessary in the case of a semiconductor having a high sheet resistance such as amorphous silicon, and is not particularly necessary in a crystalline semiconductor because the sheet resistance is low. The transparent conductive layer 1022 needs to be transparent in order to be located on the light incident side, and has a light transmittance of 85% or more in order to efficiently absorb light from the sun or a white fluorescent lamp into the semiconductor layer. The sheet resistance is desirably 100 Ω / □ or less in order to allow the current generated by light to flow in the lateral direction with respect to the semiconductor layer. Examples of materials having such characteristics include SnO ₂ , In ₂ O ₃ , ZnO, CdO, and CdO.
Metal oxides such as dSnO ₄ and ITO (In ₂ O ₃ + SnO ₂ ) are exemplified.

(Partial removal of semiconductor element surface)
Partial removal of the surface of the semiconductor element means that a pattern is selectively formed on at least one or all or all of a reflective conductive layer, a transparent conductive layer, and a semiconductor layer (p layer, n layer, and i layer). It is. For example, linear scribe processing for a thin film such as an amorphous silicon thin film, a metal thin film, or a metal oxide thin film such as a transparent conductive film disclosed in Japanese Patent Publication No. Sho 62-14954, or Japanese Patent Application Laid-Open No. Hei 5-32689. And groove processing for forming an embedded electrode on the substrate surface of a silicon wafer as disclosed in US Pat.

(Electric Discharge Machining) As a machining method of the present invention for generating electric discharge and removing at least a part of the surface of the semiconductor element in a line shape, known electric discharge machining means can be applied.

FIG. 1 is a schematic view showing one example of the electric discharge machining method of the present invention.

In the figure, 101 is a semiconductor element which is a workpiece fixed by a chuck mechanism (not shown), 102 is an electrode for generating a discharge between the semiconductor element 101, and 103 is processing energy between the semiconductor element 101 and the electrode 102. Power supply. Further, if necessary, the electrode 102 and / or the semiconductor element 101 is fixed to a moving means movable in the Z direction by a chuck mechanism (not shown), and a mechanism capable of controlling a discharge gap between the semiconductor element 101 and the electrode 102 is provided. Have. Further, the chuck mechanism (not shown) of the electrode 102 and / or the semiconductor element 101
There is a mechanism for adjusting the discharge gap between the electrode 1 and the electrode 102 in parallel, and the discharge gap is adjusted to minimize the processing variation due to the position when performing the electric discharge machining. Further, by providing a moving means that can move in the X direction and the y direction as needed, continuous processing can be performed.

(Wire Electric Discharge Machining) According to the wire electric discharge machining method of the present invention for generating electric discharge and removing at least a part of the surface of the semiconductor element from the line, the electrode 102 is a wire-shaped electrode. The known wire electric discharge machining means can be suitably applied.

FIG. 2 is a schematic view showing an example of the wire electric discharge machining method of the present invention.

In the figure, 101 is a semiconductor element which is a workpiece fixed by a chuck mechanism (not shown), 102 is a wire electrode, and 103 is a power supply for supplying processing energy between the semiconductor element 101 and the electrode 102. 104, a wire bobbin for spooling the wire electrode 102; 105, a pulley for changing the running direction of the wire electrode 102; 106, a diamond die for positioning the wire electrode; 107, a rotating roller for running the wire electrode 102; A tension adjusting mechanism for applying tension to the electrode 102 is provided.

Similarly to the electric discharge machining means, if necessary, for example, a moving means for moving a diamond die 106 as a positioning member for the wire electrode 102 in the z direction;
Alternatively, the discharge gap between the semiconductor element 101 and the wire electrode 102 can be controlled by fixing the semiconductor element 101 to a moving unit movable in the z direction by a chuck mechanism (not shown). Further, a diamond die 106 serving as a positioning member for the wire electrode 102, and / or
And a chuck mechanism (not shown) of the semiconductor element 101 has a mechanism for adjusting a discharge gap between the semiconductor element 101 and the wire electrode 102 in parallel, so that a processing variation depending on a position when performing the electric discharge machining is minimized. Adjusted.

The wire electrode 102 is made of a conductive material such as C
u, Ni, Mg, Mn, Ag, Au, Pt, Ti, Mo
It is possible to use a known conductive wire such as an alloy containing these metals or the like, but the wire electrode is considerably damaged by electric discharge. It is necessary to replace with a new electrode, and inexpensive materials such as Cu and Mo are preferably used. When processing by applying a voltage pulse to the electrode is performed in a corrosive gas atmosphere such as SF ₆ , CF ₄ , or Cl ₂ , for example, Al having low mechanical strength but corrosion resistance can be used. Al ₂ O ₃ , AlF ₃ , BaF ₃ , C
It is also possible to coat the surface with aF ₂ , MgF ₂ or the like.

The diameter of the wire electrode 102 is determined by the required width of the removal line and the material of the workpiece. The line width required for the removal of the surface of the semiconductor element on the line is approximately 10 μm. Since the workpiece material is the semiconductor element material described above,
The diameter of the wire electrode is desirably 0.05 mm to 1 mm.

Further, since the wire electrode is considerably damaged by the discharge, if the discharge is generated several times at the same position, the wire electrode may be cut. Therefore, it is desirable that the wire electrode 102 be supplied while being wound on a bobbin and be processed while being sent at a speed of 5 mm / sec or more.

Working fluid In the working method of the present invention for generating a discharge by applying a voltage pulse to a discharge gap provided on the surface of a wire electrode and a semiconductor element, at least the discharge gap is immersed in a working fluid. , Abnormal discharge due to machining waste, wire electrode 102,
The processed surface of the semiconductor element 101 is prevented from being roughened or damaged, and it becomes easy to stably generate a discharge.

The method of supplying the working fluid will be described with reference to FIGS. In FIG. 3, reference numeral 108 denotes a machining liquid water tank, and both the electric discharge machining portion of the wire electrode 102 and the semiconductor element 101 are immersed in the machining liquid water tank 108, and electric discharge machining is performed in the machining liquid water tank 108. In FIG. 4, reference numeral 109 denotes a nozzle for supplying a processing liquid. The processing liquid is supplied through the nozzle 109, and at least the wire electrode 102 and the semiconductor element 1 are supplied.
01 is immersed in the working fluid.

As the working fluid, pure water or an oil-based working fluid is used, and if necessary, 1 to 50 μm
A well-known powder-mixed working fluid mixed with a fine powder having a particle size of the order may be used. As the powder particles, a semiconductor material such as polycrystalline silicon, a conductive material such as Al or graphite powder, or an inorganic oxide or inorganic carbide is used.

Reaction gas By filling the discharge gap of the present invention with a reaction gas,
Neutral radicals based on the reaction gas generated by the electrode 102 to which the voltage pulse has been applied intermittently
1, the volatile substance generated by the radical reaction between the neutral radicals and the atoms or molecules constituting the processing surface is vaporized and removed, and a part of the surface of the semiconductor element 101 is removed. be able to.

The method for supplying the reaction gas will be described with reference to FIG. In FIG. 5, reference numeral 110 denotes a processing chamber, in which at least the electric discharge machining portion of the wire electrode 102 and the semiconductor element 101 are housed in the processing chamber 110, and the processing chamber 110 is filled with a reaction gas. Is applied to generate a radical, and the reacted gas is exhausted outside the processing chamber as exhaust gas. Although the processing chamber 110 is particularly provided here, a reaction gas may be supplied through, for example, a nozzle, and at least a gap between the wire electrode 102 and the semiconductor element 101 may be filled with the reaction gas. In this case, a fresh reaction gas will be sprayed by the nozzle,
There is also an effect that the exhaust gas hardly stays in the gap.

Here, as a method for generating radicals, it is possible to use plasma which can be easily generated by electric discharge at a degree of vacuum of 133 Pa or less. However, since the density of generated radicals is low and the processing speed is slow, one atmosphere is required. Under the above high pressure, a DC or AC voltage pulse is applied to the electrode to generate charged particles based on the inert gas, or to generate metastable particles having a long life, and to generate a reaction gas between these particles and the reaction gas. The collision produces neutral radicals based on the reaction gas.

Known reactive gases such as fluorine-based gases such as SF ₆ and CF ₄ and chlorine-based gases such as Cl ₂ can be used as the reaction gas.

[0061]

Embodiments of the present invention are described below.

Example 1 FIGS. 6 to 8 are schematic views according to Example 1 of the present invention, and FIG. 6 is a schematic view showing a cross section of a photovoltaic element as a semiconductor element after completion. 7
(A) to (c) show the structure of a photovoltaic element in each manufacturing process, and FIG. 8 is a schematic diagram illustrating a means for removing a part of the surface of a semiconductor element in a line shape.

In FIG. 6, reference numeral 621 denotes a thickness of 2 mm, 50 mm ×
A glass substrate of 50 mm, 626 is a transparent conductive layer made of an indium oxide thin film having a thickness of about 700 ° formed by evaporating In in an O ₂ atmosphere by using a resistance heating method, and 624 is a p-layer formed by plasma CVD. Type, i type, n
, P-type, i-type, and n-type layers are sequentially stacked to form a semiconductor layer made of amorphous silicon having a photovoltaic function, and each layer has a thickness of 100 °, 800 °, 100 °, 1 °.
It was set to about 00, 4000, and 150 degrees. Also, 62
2 has a thickness of 2000 mm formed by a sputtering method.
Is a reflective conductive layer made of Al.

FIG. 7A shows a state in which a dividing groove 623 is formed in a transparent conductive layer 622 deposited on a glass substrate 621.

FIG. 7B shows a state in which a semiconductor layer 624 is deposited over the transparent conductive layer 622 and the dividing groove 623, and a dividing groove 625 is formed in the semiconductor layer 624.

FIG. 7C shows a state in which a reflective conductive layer 626 is deposited over the semiconductor layer 624 and the dividing groove 625, and further, a dividing groove 627 is formed in the reflective conductive layer 626. By such electrical division, a photovoltaic element in which adjacent semiconductor elements are connected in series can be manufactured.

A method for forming the dividing groove 623 will be described with reference to FIG. 8, reference numeral 801 denotes a transparent conductive layer 6 on a substrate 621.
22 is a semiconductor element on which 221 is deposited.
A wire electrode 803 is a power supply for applying a voltage pulse to the wire electrode 802. The wire electrode 802 and the semiconductor element 801 are adjusted so that their gaps are parallel to each other. The electrode 802 is fixed to a moving means that can move in the z direction.
Reference numeral 1 is fixed to a table movable in the x direction by a chuck mechanism. Further, pure water is supplied from a nozzle 809 to a discharge gap between the semiconductor element 801 and the wire electrode 802.

Next, a series of operations of the main processing will be described. The wire electrode 802 is sent at a speed of 80 mm / sec.
A power supply 8 is provided between the wire electrode 802 and the transparent conductive layer 622.
03 applies a voltage of 30V. In the above state, the wire electrode 802 moves in the z direction toward the semiconductor element 801 to a distance where discharge starts. The wire electrode 802 is further fed to the photovoltaic element side in the z-direction by 20 μm from the position where the discharge is started, and the processing of removing a part of the transparent conductive layer 622 and forming the dividing groove 623 is completed. Thereafter, the wire electrode 802 is returned to a predetermined position in the z-direction by the moving means, and the semiconductor element 801 is fed one step in the x-direction, so that the formation of the dividing groove is continuously performed.

Semiconductor element 8 manufactured in a series of processing
01 was measured, the line width was 70 to 90.
μm, and as measured by a tester,
As a result, it was found that the transparent conductive layer 622 was electrically divided.

In the present embodiment, the time required for manufacturing one divided groove was completed in about 2 seconds. In the case of a single groove with a length of 50 mm, the processing time is not superior to that of the conventional scribing using a scanning laser, but when a plurality of wire electrodes are arranged, the processing of a 50 mm × 50 mm semiconductor element is performed. However, the process is completed in substantially the same time, and even when the length of the division groove is further increased, only the wire electrode needs to be lengthened, and the processing time is not significantly increased, so that it is suitable for processing a semiconductor element having a large area.

Although the dividing grooves 625 and 627 can be processed in the same manner, in the case of a thin film, it is necessary to selectively form the dividing grooves for each layer, and it is difficult to control the depth direction of the grooves. . Further, when the pure water is not supplied by the nozzle 809, the wire electrode is easily cut, so that the feed speed needs to be increased. As a result of examination at a feeding speed of 250 mm / sec, it was confirmed that a dividing groove 623 having a line width of 20 to 70 μm was formed, and the measurement was performed by a tester to electrically separate the groove.

(Embodiment 2) FIG. 9 is a schematic diagram according to Embodiment 2 of the present invention, and is a schematic diagram for explaining a means for removing a part of the surface of a semiconductor element in a line shape.

This embodiment is an example in which a reactive gas is supplied to a discharge gap for generating a discharge.

In FIG. 9, reference numeral 901 denotes a semiconductor device having a transparent conductive layer deposited on a substrate; 902, a wire electrode made of Cu having a diameter of 0.3 mm; 903, a power supply for applying a voltage pulse to the wire electrode 902; 902 and semiconductor element 90
1 is adjusted so that the gap is parallel, and although not shown, the wire electrode 902 is fixed to a moving means movable in the z direction, and the semiconductor element 901 is further moved to a table movable in the x direction. Are fixed by a chuck mechanism. The semiconductor element 901 and the wire electrode 902 are provided in the processing chamber 910, and the reaction gas SF ₆ is supplied from the nozzle 909 to the semiconductor element 901 and the wire electrode 902.
Is supplied toward the gap. Further, the gas after the reaction is exhausted outside the processing chamber as exhaust gas, and the processing chamber is adjusted to have a pressure of 2 atm.

As in the first embodiment, the semiconductor element 901 is formed by depositing In on a glass substrate having a thickness of 2 mm and a size of 50 mm × 50 mm in an O ₂ atmosphere by a resistance heating method to a thickness of about 700 °. A transparent conductive layer 622 made of an indium oxide thin film is deposited.
P-type, i-type, n-type, p-type, i by plasma CVD
A semiconductor layer made of amorphous silicon having a photovoltaic function in which layers of an n-type and an n-type are sequentially stacked, and a reflective conductive layer made of Al formed by a sputtering method.

Next, a series of operations of the main processing will be described. The wire electrode 902 is moved by the moving means in the z direction to the semiconductor element 9.
It is arranged at a distance of 1 mm from 01. At this time, the wire electrode 902 is sent at a speed of 80 mm / sec, and a voltage of 30 V is applied between the wire electrode 902 and the transparent conductive layer 622 by the power supply 903. When a voltage is applied to the electrode in a reaction gas atmosphere, a neutral radical based on the reaction gas is generated, and the neutral radical is generated by a radical reaction between the neutral radical and atoms or molecules of the transparent conductive layer deposited on the surface of the semiconductor element 901. A process is performed in which volatile substances are vaporized and removed, and a part of the transparent conductive layer 622 is removed. After that, the semiconductor element 901 is sent one step in the x direction,
The formation of the division grooves 623 is performed continuously.

Semiconductor element 9 manufactured in a series of processing
01 was measured, the line width was 70 to 90.
μm, and as measured by a tester,
As a result, it was found that the transparent conductive layer 622 was electrically divided.

In this embodiment, the wire electrode 902 is connected to 8
Removal was performed while feeding at a speed of 0 mm / sec.
As a result of examination even when the wire electrode was not sent, a division groove 623 having a line width of 30 to 100 μm was formed, and it was confirmed by measurement with a tester that the division was performed electrically.

[0079]

According to the present invention, a discharge gap is formed on the surface of a semiconductor element, electrodes are arranged, and a voltage pulse is intermittently applied to the gap to generate a discharge. Since the portion can be removed, the processing can be performed in substantially the same processing time even when the length of the electrode is long or when a plurality of electrodes are provided. That is, when a groove is formed on a large-area semiconductor element such as a photovoltaic element, high productivity is exhibited.

Further, since the manufacturing method of the present invention is a processing method which does not involve light irradiation, there is no fear of light deterioration of the semiconductor element.

Further, in the processing method of the present invention, particularly in a reaction gas, there is no need to worry about a decrease in electric resistance of the semiconductor layer due to heat.

Further, since the wire electrode is supplied while being continuously fed, there is no concern about deterioration of the electrode, and continuous processing is possible.

[Brief description of the drawings]

FIG. 1 is a schematic view showing one example of an electric discharge machining method of the present invention.

FIG. 2 is a schematic view showing one example of a wire electric discharge machining method of the present invention.

FIG. 3 is a schematic view showing an example of a method of supplying a machining fluid in the wire electric discharge machining method of the present invention.

FIG. 4 is a schematic view showing another example of a method of supplying a machining fluid in the wire electric discharge machining method of the present invention.

FIG. 5 is a schematic view showing an example of a method for supplying a reactive gas in the wire electric discharge machining method of the present invention.

FIG. 6 shows a semiconductor device according to the first embodiment of the present invention.
It is sectional drawing which shows the cross section after completion of a photovoltaic element.

FIG. 7 is a cross-sectional view showing a structure in each manufacturing process of the photovoltaic device according to Example 1 of the present invention.

FIG. 8 is a schematic view illustrating a method for processing a dividing groove according to the first embodiment of the present invention.

FIG. 9 is a schematic view illustrating a method for processing a dividing groove according to a second embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a layer configuration of a photovoltaic element as an example of a semiconductor element to which the present invention can be applied.

11 is a cross-sectional view showing a structure in each manufacturing process of the photovoltaic device of FIG.

FIG. 12 is a cross-sectional view showing a layer configuration of a photovoltaic element formed on a transparent substrate as another example of a semiconductor element to which the present invention can be applied.

FIG. 13 is a cross-sectional view showing the structure of a conventional semiconductor device (thin film solar cell).

[Explanation of symbols]

101, 801, 901 Semiconductor element 102, 802, 902 (Wire) electrode 103, 803, 903 Power supply 104 Wire bobbin 105 Pulley 106 Diamond die 107 Rotary roller 108 Processing liquid water tank 109, 809, 909 Nozzle 110, 910 Processing chamber 621, 1021 , 1321 Substrate 622, 1022, 1322 First electrode layer (transparent conductive layer) 623, 1023, 1323 Dividing groove of first electrode layer 624, 1024, 1324 Semiconductor layer 625, 1025, 1325 Dividing groove of semiconductor layer 626, 1026, 1326 Second electrode layer (reflective conductive layer) 627, 1027, 1327 Division groove of second electrode layer 1328 Unit element

Continuing on the front page (72) Koji Tsuzuki, Inventor 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Koichi Shimizu 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Takeshi Yoshino 3-30-2 Shimomaruko, Ota-ku, Tokyo F-term in Canon Inc. (reference) 3C059 AA01 AB05 CH01 CH08 HA00 5F043 AA21 BB14 DD14 EE07 EE14 EE27 EE35 EE36 FF01 GG04 5F051 AA05 BA17 DA EA08 EA13 FA06 GA03 GA05 HA03

Claims (6)

[Claims] In a method of manufacturing a semiconductor device, wherein at least a part of a surface of a semiconductor device is linearly removed, a discharge gap is formed on a surface of the semiconductor element, electrodes are arranged, and a voltage is intermittently applied to the gap. A method for manufacturing a semiconductor device, comprising: applying a pulse to generate a discharge to remove a part of the surface of the semiconductor device. 2. The method according to claim 1, wherein the electrode is a wire-type electrode. 3. The method according to claim 2, wherein the processing is performed while continuously feeding the wire electrode at a speed of 5 mm / sec or more. 4. The electrode has a width or diameter of 0.05 m.
4. The method for manufacturing a semiconductor device according to claim 1, wherein the length is from m to 1 mm. 5. The method of manufacturing a semiconductor device according to claim 1, wherein at least a discharge gap for generating a discharge is immersed in a working fluid. 6. The method according to claim 1, wherein at least a discharge gap for generating a discharge is filled with a reactive gas.