JP2001136078A - Syndrome arithmetic method and device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain a high-speed syndrome arithmetic operation by extending data whose error is corrected at the same time so as to decrease number of times of accesses to storage means without making syndrome computing elements and their control complicated. SOLUTION: Changeover means 3, 6 that are operated in matching with an error correction data format and number of syndrome computing elements and FIFO storage means 4, 5 with a number of stages similarly in matching therewith are provided to a pre-stage of the syndrome computing elements 7, 8, 9, 10. Thus, the degrees of syndrome coefficients given to each syndrome computing element can be arranged.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to code correction,
In particular, the present invention relates to a syndrome calculation method and apparatus therefor.

[0002]

2. Description of the Related Art In recent years, DVDs and CD-ROMs for recording digital information at high density have been widely used.
By the way, the information recorded on these recording media is
Since recording, reading, etc. are done using a laser,
Individual digital information is very small in size. Now,
No matter how carefully the recording medium is manufactured and handled, it is difficult to completely prevent the occurrence of stains and small scratches due to fingerprints and the like. For this reason, errors will occur during reading and reproduction by the laser if it is inevitable,
Correction is needed.

[0003] In this correction, for example, in the case of an even-odd parity in which a parity is added for every seven bits of the original information, even if the existence of the error itself is known, no matter where the error exists, even if the existence of the error itself is known. It is unknown whether it exists or what the correct data is. On the contrary, if a plurality of errors occur, the existence of the error itself cannot be understood.

For this reason, for example, as conceptually shown in FIG. 1, error correction is performed by attaching a plurality of parities in a vertical direction and a horizontal direction of a data group arranged vertically and horizontally. I have. In this figure, only the even addresses are shown for the sake of simplicity.
Up to the row are the original data and the Q-direction parity code string,
The 26th and 27th rows are P-direction parity code strings. It should be noted that the Q-direction parity code is 8 bits of the original data code string.
One byte is stored every six addresses. Also,
This and the reading of data will be described later in detail.

[0005] Under this circumstance, even if a multiplex error occurs instead of a double or triple error, the error is found and corrected in real time. Further, as a method of assigning the parity, various techniques such as RS code correction that reduces error correction to a problem of solving a mathematical expression have been developed. However, RS code correction etc.
"Introduction to Coding Theory" Published by Shoseido and other "Practical Error Correction Techniques" Since this is a well-known technique described in Trikeps, etc., further description is omitted.

In an optical disk device such as a DVD or a CD-ROM, data error correction is performed in accordance with each data format. By the way, in this DVD error correction device, it is necessary to rewrite erroneous data to correct data. Therefore, after demodulated data is once written in the buffer memory, it is read out again to correct the error in the data in the buffer memory. It is common to do.

Hereinafter, the contents of the conventional syndrome calculation device will be described.

FIG. 2 shows an example of the configuration of a syndrome operation device in a conventional Q-corrected data format of a CD-ROM. In the figure, reference numeral 1 denotes a control signal generation unit.
Reference numeral 2 denotes a storage unit that stores input data at an arbitrary location and outputs data at an arbitrary location according to a control signal from the control signal generation unit 1. Next, for the syndrome calculation, data of 1 byte at each address stored in two consecutive addresses of the storage means, that is, data of a total of 2 bytes is output. Reference numeral 7 denotes a syndrome computing unit that performs a syndrome operation when 1-bit data of an address output later from the storage unit 2 is input, and further resets or outputs an operation result by the control signal generation unit 1. Reference numeral 8 denotes a syndrome computing unit that can perform a syndrome operation when 1-bit data of an address previously output from the storage unit 2 is input, and can output a reset or an operation result by the control signal generation unit 1. . In this figure, the numbers in the shaded portions of the signal lines indicate the number of bits of data transmitted at one time or the number of signal lines for that.

Hereinafter, the operation of the syndrome arithmetic device having the above configuration will be described.

First, in order to help understand the operation, a CD-
The Q correction data format of the ROM will be described.

FIG. 1 shows a Q-correction data format of a CD-ROM. As shown in the figure, this format is based on 2340 bytes excluding the sync pattern 12 bytes for 2352 bytes of one sector of the CD-ROM.
The application range of the erased ECC, and 104 bytes from the end of the applicable range are called Q parity.

The Q parity is added to the LSB side and the MSB side in the sequence shown in FIG. 1 for 2-byte data, and there are 26 rows of Q syndromes in one sector.

Further, the Q sequence includes an address 0 (address),
The addresses are read out at addresses 88, 176,..., And the syndrome calculation is performed. CD
In the data array in the ROM, if the address becomes 2236 or more, the operation is continued from the address obtained by subtracting 2236.

In the operation of the conventional syndrome operation device, the syndrome operation units 3 and 4 are first reset by the control signal generation means 1.

Next, the control signal generating means 1 inputs data of two consecutive addresses output from the storage means 2 in the order of the Q correction data format and from the beginning of the code string.

When the last data in the column of the data format is output, the two syndrome calculators 7 and 8 independently calculate according to the instruction of the control signal generator 1, and output the respective syndrome results.

Although the above is the case of the Q code string, substantially the same processing is performed for the P code string.

The specific configuration for these processes, for example, the contents of the program, the CPU operated by the program, the data in its memory, various circuits, and the like are not directly related to the present invention (the assumption is made). This is a well-known technique, and a description thereof will be omitted.

[0019]

By the way, the resetting of the syndrome calculators 7 and 8, the syndrome calculation, and the output of the results are performed for all data for each code string described later, and further, all Q correction syndrome results are obtained. The determination is made in a circuit (or software) by a CPU depending on a circuit or a case in advance. Therefore, processing can be performed at high speed. However, the access to the storage means by the reading means for reading data, overwriting corrected data, etc. is performed by coordinating with various parts such as securing of a bus for overwriting of data after error correction, correction of a P code string, etc. Depending on the case, the operation of the arm-shaped readout means may be up to the hardware, and this is not the case. For this reason, access to the storage unit by the read unit is a bottleneck for speeding up error correction.

Therefore, as long as the speed of accessing the storage means is not improved, there is a limit to the operation speed no matter how fast the syndrome operation unit is increased.

As a countermeasure, the width of one access to the storage means has been increased, or a plurality of storage means has been provided. However, from the viewpoint of circuit cost, it is common to adopt a method of expanding the access width at one time.

However, in other words, simply increasing the width of one access to the storage means, or in other words, simply increasing the amount of addresses and data to be read, etc. Since the data array is not arranged in such a manner, the order of the syndrome coefficients of the data of the output addresses of the plurality of columns is shifted from each other, and the error correction from the first data cannot be performed for one code string. Would.

That is, for example, when 4-byte data from the address 0 to the address 3 of the Q correction of the CD-ROM is taken, the data stored at the addresses 0 and 1 is the syndrome coefficient of the 0th column and the 44th order. However, as shown in FIG. 3, the data at addresses 2 and 3 are syndrome coefficients of 25 columns and 43 orders. (Note that FIGS. 3 and 4 show the addresses where the data from the 44th to the 0th order of each Q code string are stored, and are two leaves for convenience of space. In addition, the Q code string will be described in detail later, and only the even-numbered addresses will be described for simplicity of the figure. It is assumed that the data of 0 really refers to the data of address 0 and address 1.) Therefore, it is impossible to input these data to a general syndrome calculator as it is to perform the calculation.

As a result, in order to increase the width of one access, an operation for correcting the shift is added, and the data accessed once is accessed many times thereafter.
Complicated processing, such as controlling the operation of the syndrome arithmetic unit in accordance with the deviation of the order, and a circuit therefor are required.

For this reason, the width of access to the storage means for error correction without complicating the arrangement of data in the existing storage means, the syndrome arithmetic unit and its control, or changing the system, etc. Therefore, there has been a demand for the development of a technology that can increase the speed of the syndrome calculation.

Therefore, development of a technique for solving the problem has been desired.

The above is the case of the Q code string, but the P code string has substantially the same problem. However, since the sequence of the P code sequence is relatively simple, a description thereof will be omitted.

[0028]

SUMMARY OF THE INVENTION The present invention has been made to achieve the above object, and has a function of delaying data in order to align the order of each syndrome coefficient.
IFO (first-in, first-out) storage means, switching means for switching the flow of data to align the order of each syndrome coefficient, and control means for controlling the order in which data is processed to align the order of each syndrome coefficient , And data reading is performed from consecutive addresses. Specifically, the configuration is as follows.

According to the first aspect of the present invention, in each code string, data is sequentially read from the head in units of addresses, and the number determined by the number of code strings read at one time is:
Since the error correction of each code string read by the syndrome arithmetic unit having a capacity determined by the data amount of one address such as one byte is simultaneously performed, the number of code strings read at one time, the content of error correction, and the CD-ROM According to a standard determined by a standard or the like, the reading unit reads data of an adjacent address at a time from a storage medium in which data of each code string is arranged in a row direction and a row direction in a large number of address units. The data of a code string that is larger than the number of codes to be read at a time is read out, and the number of syndrome calculators corresponding to the number of code strings that have been read out more and a predetermined number of data corresponding to the order of the data of the code string that has been read out more are determined. A high-speed syndrome which simultaneously corrects the error of each read code string by the predetermined switching means as well as the FIFO storage means of the number and the number of stages. In beam calculation method, the following effects are made.

In a preprocessing step, prior to error correction,
A code string that is not read out sequentially from the top (of course,
The present invention is not limited to data of some code strings to be initially corrected. )), The leading data that is not read or the following necessary data in addition thereto, and the code string whose trailing is not to be read, the last data that is not read or the Prior necessary data is stored in a predetermined FIFO storage means prior to the start of error correction.

In the reading step, at least one of a plurality of code strings to be read simultaneously is read in order from the beginning to the end, and the other code strings are, in principle, as described above except for the turning point of the data array on the storage medium. The data is sequentially read from the address adjacent to the address where the data of the code string to be sequentially read from the head is stored.

In the preceding storage step such as the beginning and end data of the non-correction target code string, the data is stored at an address adjacent to the address where the data of the code string to be read sequentially from the head is stored. The head of the code string not subject to error correction or the following read data or the end or the preceding read data is also sent to a predetermined FIFO instead of the syndrome calculator.
It flows to the O storage means and is temporarily stored. For this reason, a multiplexer and a selector are controlled as needed. This is the same in other steps.

At the read target code string selection control step, when the error correction of the code string currently subjected to the error correction is completed in the read step, the code strings to be read in the next read step are sequentially read from the head. Since the data is read from the address adjacent to the address where the data of the code string to be read is read, the data is not read in order from the head, and the data at the head of the code string that is not read, or in addition to this, the subsequent necessary data, Similarly, the last unread data of the code string whose tail is not read or the preceding necessary data is stored in a predetermined FIFO memory in the preceding storage step such as the leading and trailing data of the code string not to be corrected. Means for temporarily storing the data, and outputting the stored data when necessary. Without selected so as to be immediately output possible it is manner.

In the order adjusting step, for a code string to be error-corrected other than the code string sequentially read from the head in the reading step, data of a code string which is not currently subjected to error correction is passed to a predetermined FIFO storage means. In parallel with the preceding storage step such as the end data, the predetermined FIFO
O The first data which is not read out of the code string to be currently subjected to error correction stored in the O storage means, or in addition to this, the following necessary data, or the reading of the code string whose end is not read out The last data not to be processed or, in addition to this, the preceding necessary data is supplied to the syndrome arithmetic unit with good timing.

In addition to the above, all the data of the code string read out later is sent to the syndrome arithmetic unit via a predetermined FIFO storage means, and all the data of the code string read out from the beginning to the end are directly sent to the syndrome processor. It will be passed to the arithmetic unit.

In the invention according to claim 2, claim 1 is
According to the syndrome calculation method described above, the code string read out at the same time, which is originally intended by the storage means, is the current mainstream 2
On the other hand, the number of syndrome arithmetic units is also two. On the other hand, the number of code arrays which the syndrome arithmetic unit actually reads simultaneously for speeding up is four, and the number of syndrome arithmetic units is four, and the predetermined FIFO storage means is two. The predetermined switching means for simultaneously storing and outputting the data of the code lines stored side by side and of the one-stage type and the six-stage type is provided after the four of the four read out code sequences. This is to select which of the two FIFO storage means to store the read data of the two code strings, and to open and close to output the data at a necessary time.

In the reading step, the first two of the actually read code strings are sequentially read from the beginning to the end.

The pre-processing step is a step 2
For one code string, data of a predetermined address is temporarily stored in two FIFO storage means using two switching means.

In the preceding storage step such as head and tail data, since two code strings are read out later, two switching means are used to temporarily store data at a predetermined address in two FIFO storage means. Alternatively, one F
The IFO storage means functions to delay the data by one address and flow it to the syndrome arithmetic unit.

The reading target code string selection control step includes:
When selecting a code string to be read next, control is performed in consideration of the arrangement of data of the Q code string in the current storage means.

In the order adjusting step, the data temporarily stored in the two FIFO storage units using the two switching units are set to timings necessary for error correction of two adjacent code strings read out later. It flows well to the syndrome computing unit.

According to the third aspect of the invention, the correction of the P code string is performed in substantially the same manner.

According to the fourth aspect of the present invention, in each code string, data is sequentially read from the head in units of address, and the number determined by the number of code strings read at one time is:
Since the error correction of each code string read by the syndrome arithmetic unit having the capacity determined by the data amount of the address is performed simultaneously, the number of code strings read at one time, the content of the error correction, etc. Data is row-oriented,
The reading means also reads data of an adjacent address at a time from a storage medium arranged in units of a large number of addresses in a row direction, so that data of a code string that is larger than the number that the storage medium is originally supposed to read at a time can be obtained. Each of the read-out operations is performed by the same number of syndrome calculators corresponding to the number of the code strings that have been read out and the predetermined switching means as well as the predetermined FIFO storage means that corresponds to the data sequence of the code strings that have been read out many times. In a high-speed syndrome arithmetic unit that simultaneously performs error correction of a code string, the following operation is performed.

Prior to error correction, the preprocessing means reads the leading data which is not read in order from the head or the necessary data in addition to the leading data before the error correction. For the code string not to be output, the last data which is not read out or the preceding necessary data is stored in a predetermined FIFO storage means prior to the start of error correction.

The reading means sequentially reads at least one of a plurality of code strings to be read simultaneously from the beginning to the end, and reads the other code strings in a read operation direction except for a turning point of a data array on a storage medium. , The data is read from an address adjacent to the address where the data of the code string to be read sequentially from the beginning is stored.

The control means of the switching means for preceding storage, such as the leading and trailing data of the non-correction target code string, is stored at an address adjacent to the address where the data of the code string to be read sequentially from the head is stored. The head of the code string not subject to the error correction or the following read data or the tail or the preceding read data of the code string is not stored in the syndrome arithmetic unit but is supplied to a predetermined FIFO storage means and temporarily stored therein. Control the switching means.

When the reading means completes the error correction of the code string currently subjected to the error correction, the reading object code string selection control means sets the code to be sequentially read from the head as the code string to be read next by the reading means. Since the data is read from the address adjacent to the address where the data of the column is stored, the data is not read in order from the head, and thus the data at the head of the code string that is not read, or in addition to this, necessary subsequent data, and also the end Is the last data of the code string that is not to be read, or the preceding required data is added to the operation of the control means of the switching means for preceding storage such as the leading and trailing data of the code string not to be corrected. Data that is temporarily stored in predetermined FIFO storage means and can be output without outputting other data. Selected and so as to can.

The control means of the order adjusting switching means stores, in a predetermined FIFO memory, data of a code string which is not currently subjected to error correction for a code string to be subjected to error correction other than a code string sequentially read from the head by the reading means. In parallel with the operation of the preceding storage control means such as the leading and trailing data to be passed to the means, the leading data of the code string to be currently subjected to error correction stored in the predetermined FIFO storage means, which is not read out, or in addition to this, The switching means is controlled so that the necessary data, the last data of the code string whose end is not to be read, or the last necessary data in addition to this, flows to the syndrome arithmetic unit.

In the invention according to claim 5, claim 4
The described syndrome operation device has two syndromes which are originally intended by the storage means and which are simultaneously read out, and two syndrome operation units. On the other hand, the syndrome operation device actually has four code lines which are simultaneously read out. The predetermined number of arithmetic units is four, and the predetermined FIFO storage means simultaneously stores and outputs the data of two code strings stored side by side. Of the two code strings read out later of the four code strings read
One of the two FIFO storage means is to be stored, and the opening and closing for outputting data at a necessary time is performed.

In the reading means, of the code strings to be actually read, two of the code strings to be read first because there is data at the address ahead of the read operation direction are read through error correction of the code string. Read in order from the beginning to the end.

The pre-processing means uses two switching means to perform two FIs for two code strings read out later.
The FO storage means temporarily stores data at a predetermined address of the code string.

The control means of the switching means for preceding storage, such as head and tail data, temporarily stores data of a predetermined address in two FIFO storage means by using two switching means because two code strings are read later. Remember.

The read target code string selection control means performs control in consideration of the data arrangement of the Q code string in the current storage means.

The control means of the order adjusting switching means uses the two switching means to flow the data temporarily stored in the two FIFO storage means to the syndrome arithmetic unit with good timing.

According to the sixth aspect of the invention, the correction of the P code sequence is performed in substantially the same manner.

[0056]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on its embodiments.

FIG. 5 shows the structure of the syndrome calculation device according to the present embodiment. In the figure, reference numeral 1 denotes a control signal generation unit. Reference numeral 2 denotes a storage unit that stores input data at an arbitrary location or outputs data at an arbitrary location according to a control signal from the control signal generation unit 1. Reference numeral 3 denotes an upstream switching unit that switches an output destination of the data output from the storage unit 2 according to a control signal from the control signal generation unit 1. Reference numeral 4 denotes a one-stage FIFO (first-in, first-out) storage unit that stores the data when the data is output from the storage unit 2 and outputs the stored data. Reference numeral 5 denotes a six-stage FIFO storage means for storing data at the rear part when data is output from the storage means 2 and outputting the data of the front end held on the other hand.
6 is a one-stage FIFO storage means 4 or a six-stage FIFO
This is a downstream switching unit that selects data output from the storage unit 5 and transmits one of the data to the syndrome computing unit at the subsequent stage.

7 is a one-stage FIFO storage means 4 or 6
When the data output from the FIFO storage means 5 of the stage is input, the syndrome operation unit performs a syndrome operation, and can reset or output the operation result by the control signal generation unit 1. 8, when data output from the one-stage FIFO storage unit 4 or the six-stage FIFO storage unit 5 is input, a syndrome operation is performed, and the control signal generation unit 1 can reset or output the operation result. It is a syndrome arithmetic unit.

Reference numeral 9 denotes a syndrome computing unit that can perform a syndrome operation when data output from the storage unit 2 is input, and can output a reset or an operation result by the control signal generation unit 1. Reference numeral 10 also denotes a syndrome computing unit that can perform a syndrome operation when data output from the storage unit 2 is input, and can reset or output an operation result by the control signal generation unit 1.

The control means 1 controls the storage means 2 and the two switching means 3, 6, and four syndrome computing units 7, 8, 9, and 10 on the upstream and downstream sides.

The reading section (not shown) of the syndrome calculation device is basically composed of four addresses located continuously from left to right in the row direction, apart from the folded section and the end section shown in FIG. Is read at a time. Therefore, as shown in the figure, the number of output signal lines from the storage means 2 is 32 bits (32 lines), and 16 of the 2-byte data read earlier are used by the syndrome arithmetic unit 10 and The connection is directly made to the same, and 16 lines of 2 bytes of data which are read later are connected to the upstream switching means 3.
Further, there are 16 bits of signal lines from the upstream switching means 3 to the downstream switching means 6, and 16-bit signal lines are also output from the downstream switching means to the syndrome arithmetic units 8 and 7. For this reason, regardless of the switching of the upper and lower switching means, the previously read 16 bits of data are directly output to the syndrome computing units 10 and 9.

An 8-bit signal line is connected to each syndrome arithmetic unit. Further, the syndrome computing units 7, 8, 9, and 10 are general syndrome computing units that can output a syndrome computation result when all the syndrome coefficients have been input from the highest order to the 0th order after reset.

The control signal generating means 1 properly recognizes the arrangement of the data in the CD-ROM, the addresses read by the reading device, the number of times of reading for each code string, etc., in order to appropriately issue control signals such as switching signals. Of course. However, since this is a technique that is also used in the current syndrome arithmetic device, a detailed description thereof will be omitted.

Hereinafter, the operation of the syndrome calculation device will be described. Step A As in the conventional syndrome calculation device, the data of the CD-ROM input prior to error correction is temporarily stored in the storage unit 2.
To store.

The storage address is the La-La of the CD-ROM.
0 at the beginning of the applicable range of 2340 bytes
The address and the end are 2339, and the Q correction syndrome sequence is 0 column, 1 column in ascending order of the highest stored address (86i, i = 0 to 25) of the syndrome coefficient.
..., 25 columns. FIGS. 3 and 4 show the addresses at which the syndrome coefficients of the respective columns and orders are stored as described above.
In both figures, the vertical is the Q correction syndrome sequence, and the horizontal is the order of the syndrome coefficient. According to both figures, for example, 0
The syndrome coefficient of column 44 is address 0, the column 43 of column 0 is address 88, the column 19 of order 0 is 2200, the column 18 of order 0 is 52, the column 17 of order 0 is 140 and the column 44 is of order 44. Is stored at address 86. Step B Initial values are stored in the FIFO storage means 4 and 5 as a preprocessing for simultaneously correcting errors of 4-byte data, which will be specifically described later.

B1. The upstream switching means 3 is switched so that the two-byte data read out later from the data continuously read out from the storage means 2 is input to the one-stage FIFO storage means 4.

B2. It outputs 4-byte data continuously read from address 2148, which is a secondary syndrome coefficient of 8 columns stored in the storage means 2. Therefore, the 25 columns 4 read out later are stored in the one-stage FIFO storage unit 4.
2-byte data at address 2150, which is the fourth-order syndrome coefficient (accurately as described above, addresses 2150 and 2151
Address data) is stored.

B3. The upstream switching means 3 is switched so that the 2-byte data read out later from the data continuously read out from the storage means 2 is input to the six-stage FIFO storage means 5.

B4. It outputs 4-byte data continuously read rightward in FIG. 1 from address 2284, which is the first-order syndrome coefficient of 24 columns stored in the storage means 2. For this reason, 2286, which is a syndrome coefficient of the first order in 25 columns, which is read out later into the FIFO memory means 6 of six stages (hereinafter, "read out later" is omitted).
Two-byte data of the address (including the data at the address 2287 as described above. Such a note is omitted hereafter) is stored.

B5. The address was sequentially read from address 2336, which is the 0th-order syndrome coefficient of 24 columns stored in the storage means 2, to the address on the right in FIG. (Hereinafter, description such as "to the right address" is also omitted.) Outputs 4-byte data. The 6-stage FIFO storage means 5 stores 2-byte data at address 2338, which is the syndrome coefficient of the 0th order in 25 columns.

B6. It outputs 4-byte data continuously read from address 2268, which is a 16-column primary syndrome coefficient stored in the storage means 2. 6-stage FIF
The O storage means 5 stores 2-byte data at address 2270 which is a 17th-column first-order syndrome coefficient.

B7. It outputs 4-byte data continuously read from address 2320, which is the 0th-order syndrome coefficient of 16 columns stored in the storage means 2. 6-stage FIF
The O storage means 5 stores 2-byte data at address 2322 which is a syndrome coefficient of the 0th order in 17 columns.

B8. It outputs 4-byte data continuously read from address 2252, which is a first-order syndrome coefficient of eight columns stored in the storage means 2. 6-stage FIFO
The storage means 5 stores a 2nd-order syndrome coefficient of 9 columns
Two-byte data at address 254 is stored.

B9. It outputs 4-byte data continuously read from address 2304, which is the 0th-order syndrome coefficient of the 8th column stored in the storage means 2. 6-stage FIFO
The storage means 5 stores the 2nd syndrome coefficient of the 0th order in 9 columns.
Two-byte data at address 306 is stored.

The two Fs at the time when the above preprocessing is completed
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(A) of FIG. Step C: Syndrome calculations for the 0 column and 25 columns are performed. Here, column 0 is the data of the address located on the upper oblique line shown in FIG. 1, and column 25 is the data of the address located immediately above (right side).

C1. The syndrome arithmetic units 7, 8, 9, and 10 are reset.

C2. The 2-byte data output from the storage means 2 is input to the one-stage FIFO storage means 4,
The switching units 3 and 6 on the upstream side and the downstream side are switched so that the data output from the one-stage FIFO storage unit 4 is sequentially input to the syndrome computing units 8 and 7.

C3. As in the case of the conventional reading device, the data stored in the storage means 2 is output 43 times from address 0 to address 88. At this time, the address of the output data is 2236.
The same applies to the case where the address is equal to or larger than the address, and a value obtained by subtracting 2236 is used as a new address. In other words, in the case of column 0, the address following address 2200 is address 52 as shown in FIG. (Therefore, of course, the control signal generation means has necessary counters, calculation means, etc.) However, while the conventional reading device outputs two bytes at a time, four bytes are output. Output byte data. Therefore,
The difference is that data of 25 columns of 2 bytes is output in principle following data of 0 columns of 2 bytes. Further, the data in column 0 is directly input to the syndrome calculators 10 and 9, while the data in column 25 is temporarily input to the one-stage FIFO.
This is input to the O storage means 4.

Based on the above, data at addresses 1460 and 1462 is output at the 43rd time.

C4. Of the data output from the storage means 2, the latter two bytes are input to the six-stage FIFO storage means 5, and the data output from the FIFO storage means 5 is input upstream to the syndrome arithmetic units 8 and 7. The switching means 3 and 6 on the downstream side and the downstream side are switched.

Therefore, one-stage FIFO storage means 4 has
Two bytes of data in the 17th column and the 44th are stored.

C5. With respect to the data stored in the storage means 2, 4 bytes of data are read out sequentially from address 2236 in which the 0th column primary data is stored, and then 4 bytes of data are sequentially read out from address 2288 in which the 0th column secondary data is stored. In each of the read operations, the preceding two bytes of data are output to the syndrome calculators 10 and 9, and the latter two bytes of data are output from six stages of FIFO storage means. Therefore, first-order two-byte data of the first column and second-order zero-byte data of the same zero-order are stored in the six-stage FIFO storage means 4. The byte data is output next to the 0th order 2-byte data to the syndrome calculators 8 and 7.

C6. The syndrome calculators 7, 8, 9, and 10 output the calculation results.

At the end of the above processing, 0 column and 25 columns
The syndrome operation result of the column is output to the downstream side.

At this point, the FIFO storage means 4, 5
6 is as shown in FIG. 6B. Step D: Syndrome calculations for columns 18 and 17 are performed.

D1. Same as C1.

D2. Same as C2.

D3. The processing performed from the address 0 in C3 is performed from the continuation address of the previous step for 3 of each step from the present D to the last O. Therefore, D3
Then, the same processing is performed on 4-byte data from address 1548 which is the address following C3.

D4. Same as C4.

D5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2272 and then from address 2324. For this reason, the 18 columns are directly output from the storage means 2 to the syndrome calculators 10 and 9 as primary and then secondary 2-byte data. On the other hand, in the 17th column, primary and then secondary 2-byte data are output from the six-stage storage means 5 to the syndrome calculators 8 and 9, and further stored in the six-stage storage means 5 at the right of address 2272. The first two-byte data of the 19th column and the zeroth order, which are the data at the address 2326 and the address 2326 to the right of the address 2324, are sequentially stored. (Note that in step 5 of the following steps,
The same processing as in this step is performed. However, for the sake of simplicity, a detailed description of the flow of data of each code string is omitted. ) D6. Same as C6.

When the above processing is completed, 18, 17
The syndrome result of the column is output. Further, the data stored in the FIFO storage units 4 and 5 are as shown in FIG. 6C as can be understood from the above description. Step E: Syndrome calculations are performed for the 10th and 9th columns.

E1. Same as C1.

E2. Same as C2.

E3. Same as D3.

E4. Same as C4.

E5. With respect to the data stored in the storage means 2, 4 bytes of data are output in order from address 2256 and then from address 2308.

E6. Same as C6.

When the above processing is completed, 10 columns and 9 columns
The syndrome result of the column is output. Also, two FIs
The data stored in the FO storage means 4 and 5 is as shown in FIG. In addition, since it is obvious and there is a space requirement, the description of the FIFO storage means 4 and the FIFO storage means 5 in the drawing will be omitted hereafter (d). Step F: Perform syndrome calculation for two columns and one column.

F1. Same as C1.

F2. Same as C2.

F3. Same as D3.

F4. Same as C4.

F5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2240 and then from address 2292.

F6. Same as C6.

When the above processing is completed, the syndrome results in two columns and one column are output. Also, two FIF
The data stored in the O storage means 4 and 5 is as shown in FIG. Step G: Syndrome calculations for the 20th and 19th columns are performed.

G1. Same as C1.

G2. Same as C2.

G3. Same as D3.

G4. Same as C4.

G5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2276 and then from address 2328.

G6. Same as C6.

When the above processing is completed, 20 columns and 1
Nine columns of syndrome results are output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(F). Step H: Perform a syndrome operation on columns 12 and 11.

H1. Same as C1.

H2. Same as C2.

H3. Same as D3.

H4. Same as C4.

H5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2260 and then from address 2312.

H6. Same as C6.

When the above processing is completed, 12 columns and 1
One column of syndrome results is output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(G). Step I: Syndrome calculation of 4 columns and 3 columns is performed.

I1. Same as C1.

I2. Same as C2.

I3. Same as D3.

I4. Same as C4.

I5. For the data stored in the storage means 2, 4-byte data is output in order from address 2244 and then from address 2296.

I6. Same as C6.

When the above processing is completed, the syndrome results of the fourth and third columns are output. Also, two FIF
The data stored in the O storage means 4 and 5 is as shown in FIG. Step J: Perform a syndrome operation on columns 22 and 21.

J1. Same as C1.

J2. Same as C2.

J3. Same as D3.

J4. Same as C4.

J5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2280 and then from address 2332. J6. Same as C6.

When the above processing is completed, 22 columns and 2 columns
One column of syndrome results is output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(I). Step K: Perform a syndrome operation on the 14th and 13th columns.

K1. Same as C1.

K2. Same as C2.

K3. Same as D3.

K4. Same as C4.

K5. For the data stored in the storage means 2, 4 bytes of data are output in order from address 2264 and then from address 2316.

K6. Same as C6.

When the above processing is completed, 14 columns and 1
Three columns of syndrome results are output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(J). Step L: Syndrome calculations are performed for the 6th and 5th columns.

L1. Same as C1.

L2. Same as C2.

L3. Same as D3.

L4. Same as C4.

L5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2248 and then from address 2300.

L6. Same as C6.

When the above processing is completed, the syndrome results in the sixth and fifth columns are output. Also, two FIF
The data stored in the O storage means 4 and 5 is as shown in FIG.

Step M: Syndrome calculations are performed for the 24th and 23rd columns.

M1. Same as C1.

M2. Same as C2.

M3. Same as D3.

M4. Same as C4.

M5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2284 and then from address 2336.

M6. Same as C6.

When the above processing is completed, 24 columns and 2 columns
Three columns of syndrome results are output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(L). Step N: Syndrome calculations are performed for 16 columns and 15 columns.

N1. Same as C1.

N2. Same as C2.

N3. Same as D3.

N4. Same as C4.

N5. For the data stored in the storage means 2, 4-byte data is output in order from address 2268 and then from address 2320.

N6. Same as C6.

When the above processing is completed, 16 columns and 1
Syndrome results in five columns are output. Also, two F
The data stored in the IFO storage units 4 and 5 are as shown in FIG.
(M). Step O: Syndrome calculations are performed for the 8th and 7th columns.

O1. Same as C1.

O2. Same as C2.

O3. Same as D3.

O4. Same as C4.

O5. With respect to the data stored in the storage means 2, 4-byte data is output in order from address 2252 and then from address 2304.

O6. Same as C6.

When the above processing is completed, the syndrome results of the eighth and seventh columns are output. Also, two FIF
The data stored in the O storage means 4 and 5 is as shown in FIG.

As described above, by performing the processing from step A to step O, all the Q correction syndromes can be calculated. According to the present embodiment, even if the access width to the storage means in which the error correction data is stored is doubled as compared with the conventional case, the syndrome arithmetic units 7, 8, 9, and 10 are used.
Is provided at the preceding stage with two FIFO memory means of the same number of stages as the two switching means operating in accordance with the error correction data format and the number of syndrome arithmetic units, whereby the syndrome coefficients inputted to each syndrome arithmetic unit are provided. Is adjusted. For this reason, the number of times the reading means accesses the storage means is reduced, and the speed of the syndrome calculation is increased.

Although the present invention has been described based on the embodiments, it goes without saying that the present invention is not limited to this. That is, for example, the following may be performed.

1) In this embodiment, four syndrome arithmetic units are used. However, the number of syndrome arithmetic units may be increased, or a structure of a syndrome arithmetic unit for another error correction data format may be used.

For example, as schematically shown in FIG.
In the case of performing an operation on the M P-corrected data format by using four syndrome computing units, one FIFO storage unit and two switching units are provided at the preceding stage of the syndrome computing unit. As a result, the access width to the error correction data is expanded without complicating the syndrome operation unit and its control, as in the case where the operation is performed by the four syndrome operation units on the Q correction data format of the CD-ROM. The number of accesses can be reduced to speed up the syndrome calculation.

2) The bit amount of one address, the number of vertical and horizontal data, and the number of parities are values of different standards.

[0174]

As can be seen from the above description, according to the present invention, the syndrome operation by expanding the one-time access width to the error correction data stored in the storage means manufactured according to the current standard or the like. The deviation of the order of the syndrome coefficient at the time of inputting the device can be corrected without difficulty. Therefore, it is possible to increase the width of access to the error correction data, reduce the number of accesses, and speed up the syndrome calculation without complicating the syndrome calculator and its control.

In particular, the effect is extremely large in the case of a complicated sequence such as a Q code string of a CD-ROM.

[Brief description of the drawings]

FIG. 1 shows a Q-correction data format of a CD-ROM.

FIG. 2 is a configuration diagram of a syndrome operation device according to the related art.

FIG. 3 shows each column in Q correction of a CD-ROM, 44 to
It is a figure which shows the address where the 22nd-order syndrome coefficient is stored.

FIG. 4 shows columns 21 to 21 in Q correction of a CD-ROM.
It is a figure showing the address where the syndrome coefficient of the 0th order is stored.

FIG. 5 is a configuration diagram of a syndrome operation device according to an embodiment (Q code string correction) of the present invention.

FIG. 6 shows data stored in the FIFO storage means at the start or end of each step in the simultaneous error correction step of four code strings in the embodiment of the present invention.

FIG. 7 is a configuration diagram of a syndrome operation device according to an embodiment (P code string correction) of the present invention.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 control signal generation means 2 storage means 3 upstream switching means 31 upstream switching means 4 one-stage FIFO storage means 5 six-stage FIFO storage means 51 13-stage FIFO storage means 6 downstream switching means 61 downstream switching means 7 Syndrome arithmetic unit 8 Syndrome arithmetic unit 9 Syndrome arithmetic unit 10 Syndrome arithmetic unit

 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Yuichi Hashimoto 1006 Kazuma Kadoma, Kadoma City, Osaka Prefecture F-term within Matsushita Electric Industrial Co., Ltd. 5B001 AA02 AB02 AC03 AD04 AE03 5J065 AA01 AB01 AC03 AD03 AF01 AG02 AH06 AH17

Claims (6)

[Claims] 1. In each code string, data is read in order from the head in units of address, and is read out by a syndrome calculator having a number determined by the number of code strings read at a time and a capacity determined by the data amount of the address. Since the error correction of each code string is performed simultaneously, the data of each code string is arranged in a row direction and a row direction in a large number of address units according to a standard determined by the number of code strings read at a time, the content of the error correction, and the like. From the storage medium, the reading means also reads the data of the adjacent addresses at a time, so that the storage medium reads out data of a code string that is larger than the number of codes that are originally supposed to be read at one time. And a predetermined FIFO corresponding to the order of the data of the code string which has been read out in large numbers.
This is a high-speed syndrome calculation method in which error correction of each read code string is performed simultaneously with predetermined switching means in the same manner as the O storage means. Prior to error correction, code strings that are not sequentially read from the head are Regarding the leading data that is not read or the following necessary data in addition to the above, for a code string that is also not read at the end,
A preprocessing step of storing the last unread data or the necessary data in addition to the preceding data in a predetermined FIFO storage means prior to the start of error correction; 1 is read out sequentially from the beginning, and other code strings are read from the address adjacent to the address where the data of the code string read out from the beginning is stored except for the turning point of the data array on the storage medium. Read from the beginning of the code string that is not subject to error correction at the beginning or subsequent Of the read data or the last or preceding read data The preceding storage step such as the beginning and end data of the non-correction code string to be temporarily stored by flowing to a predetermined FIFO storage means instead of the arithmetic unit, and the error correction of the code string currently subjected to error correction in the reading step When the processing is completed, the code string to be read in the next read step is read from an address adjacent to the address where the data of the code string data to be sequentially read from the top is stored, so that the code is not read sequentially from the top. The unread data at the beginning of the sequence or, in addition thereto, the following necessary data; the unread data at the end of the code string, which is also not to be read at the end, or this preceding required data The data is stored in a predetermined FIFO storage step in the preceding storage step such as the head and tail data of the non-correction target code string. And a read target code string selection control step of selecting so that this data can be used because the stored data can be output without outputting other stored data. The data of the code string which is not to be subjected to the error correction and which is to be subjected to the error correction other than the code string which is sequentially read from the top in the predetermined FIFO
In parallel with the preceding storage step such as the leading and trailing data to be passed to the storage means, the head data which is not read out of the code string to be currently subjected to error correction stored in the predetermined FIFO storage means or in addition to this, Necessary data, or the last unread data of a code string whose end is not read or, in addition to this, the preceding necessary data is sent to the syndrome arithmetic unit with good timing in the order of the data of the code string. And a sequence adjusting step. 2. The syndrome calculation method according to claim 1, wherein the storage means originally targets two simultaneously read code strings and two syndrome calculators. On the other hand, the code string read simultaneously simultaneously by the syndrome calculation device is Four, four syndrome arithmetic units, and a predetermined FIFO storage means, which simultaneously stores and outputs data of two code lines stored side by side, and has one stage and six stages. The predetermined switching means selects which of the two FIFO memory means to store the data of the two code strings read later from the four read code strings, and outputs the data at a necessary time. In the reading step, the first two of the actually read code strings are sequentially read from the top, and the preprocessing step is For the two code strings read out after the code string read out sequentially from the above, the data of a predetermined address is temporarily stored in the two FIFO storage means using the two switching means. In the data and other preceding storage step, the data of a predetermined address is temporarily stored in the two FIFO storage means by using the two switching means because two code strings are also read later. The target code string selection control step is to control the data arrangement of the Q code string in the current storage means, and the order adjustment step is to control the two FIFOs using the two switching means. The data temporarily stored in the storage means is flowed to the syndrome arithmetic unit with good timing from the beginning to the end of the data of each code string. Syndrome calculation method according to claim 1, wherein the the at it. 3. The syndrome calculation method according to claim 1, wherein the storage means originally targets two code strings to be read simultaneously and two syndrome calculators. On the other hand, the code string to be read simultaneously and simultaneously by the syndrome calculation device is Four, four syndrome arithmetic units, and a predetermined FIFO storage means having two 13-stage code strings for storing two code strings that are read out and stored side by side;
The two predetermined switching means have the four code strings read out and flow to the four syndrome arithmetic units in the same order as they are, or the two code strings read out later are temporarily set to two F
At the predetermined time, it flows into the IFO storage means and then flows as two preceding code strings to two downstream syndrome computing units, and the two code strings read earlier are directly used as the two code strings read later. In the reading step, the first two of the actually read code strings are sequentially read from the head, and the pre-processing step includes the following: For the two code strings read out after the code string read out sequentially from the above, the data of a predetermined address is temporarily stored in the two FIFO storage means using the two switching means, The preceding storage step for data and the like is performed in the two FIFO storage means by using the two switching means because the two code strings are read later. Address data is temporarily stored, and the read target code string selection control step is to control in consideration of an array of data of the P code string in the current storage means, and the order adjustment step is: The data primarily stored in the two FIFO storage units using the two switching units are supplied to the syndrome arithmetic unit with good timing from the beginning to the end of the data of each code string. The syndrome calculation method according to claim 1. 4. In each code string, data is read in order from the head in units of address, and is read out by a syndrome calculator having a number determined by the number of code strings read at a time and a capacity determined by the data amount of the address. Since the error correction of each code string is performed simultaneously, the data of each code string is arranged in a row direction and a row direction in a large number of address units according to a standard determined by the number of code strings read at a time, the content of the error correction, and the like. From the storage medium, the reading means also reads the data of the adjacent addresses at a time, so that the storage medium reads out data of a code string that is larger than the number of codes that are originally supposed to be read at one time. And a predetermined FIFO corresponding to the order of the data of the code string which has been read out in large numbers.
This is a high-speed syndrome computing unit that simultaneously performs error correction of each read code string with predetermined switching means as well as the O storage means. Prior to error correction, code strings that are not sequentially read from the head are corrected. Regarding the leading data that is not read or the following necessary data in addition to the above, for a code string that is also not read at the end,
A pre-processing means for storing the last data which is not read or in addition to the preceding necessary data in the predetermined FIFO storage means prior to the start of error correction; and At least 1 is read out sequentially from the beginning, and other code strings are read consecutively from the address adjacent to the address where the data of the code string read out from the beginning is stored except for the turning point of the data array on the storage medium. Reading means for reading the data, and the code string data to be sequentially read from the head. The subsequent read data or the same or the last read data of the preceding read Control means for switching means for preceding storage, such as leading and trailing data of an uncorrected code string, for controlling the switching means so as to temporarily store the data by flowing the data to a predetermined FIFO storage means instead of a memory; When the error correction of the code string to be corrected is completed, the reading means reads the code string to be read next sequentially from the address adjacent to the address where the data of the code string to be read sequentially from the top is stored. Therefore, the data at the beginning of the code string that is not read out sequentially from the head, or the data that is not read out, in addition to this, the necessary data that follows, and the last data that is not read out at the same time in the code string that is not read out at the end The data or, in addition to this, the preceding necessary data is used for preceding storage, such as the leading and trailing data of the non-correctable code string. Predetermined FIFO by the control means of recombinant means
A read target code string selection control means which is temporarily stored in a storage means, and which is selected when necessary, so as to be able to output data irrelevant to error correction of the other code string without outputting the data; and In parallel with the operation of the preceding storage control switching means, such as the leading and trailing data, which causes the data of the code string not subject to error correction to flow to the predetermined FIFO storage means for the error correction target code strings other than the code strings sequentially read from As a result, the head data which is not read out of the code string to be currently subjected to error correction stored in the predetermined FIFO storage means or the necessary data subsequent thereto or the tail end is not read out. Timing of the last data of the code string that is not read or in addition to this preceding necessary data to the syndrome arithmetic unit Control means for controlling the switching means for controlling the switching means so as to flow well. 5. The syndrome calculation device according to claim 1, wherein the storage means originally has two code strings which are read simultaneously and two syndrome calculation devices, while the code string which the syndrome calculation device actually reads simultaneously is two. Four, four syndrome arithmetic units, and a predetermined FIFO storage means for simultaneously storing and outputting two sets of code string data stored side by side, and one and six stages. The predetermined switching means has a function of selecting which one of the two FIFO storage means to store the data of the two code strings read out later from the four read out code strings, Opening and closing for outputting data, wherein the reading means reads the first two of the actually read code strings in order from the head, Is the data of the required address at the beginning or end of the two code strings read out later in the two FIFO storage means using the two switching means because the two code strings are read out later. The control means of the switching means for preceding storage such as head and tail data uses two switching means for the two FIFO storage means because the two code strings are also read later. The readout target code sequence selection control means controls the data sequence of the Q code sequence in the current storage means in consideration of the arrangement of the data, and the order adjustment is performed. The control means of the switching means switches the data temporarily stored in the two FIFO storage means using the two switching means in a timely manner. Syndrome calculation device according to claim 3, characterized in that the flow through the chromatography beam calculator. 6. The syndrome arithmetic device according to claim 1, wherein the storage means originally targets two code strings which are read simultaneously and two syndrome arithmetic units. On the other hand, the code string which is actually read simultaneously by the syndrome arithmetic device is Four, four syndrome arithmetic units, two predetermined FIFO storage units, two 13-stage units for storing two code strings read out later, and two predetermined switching units, four readout units. One of the two code streams is sent to the four downstream syndrome computing units in that order, or two of the code streams read out later are temporarily sent to two FIFO storage means, and the two downstream code streams are used as the two preceding code streams. Whether to flow to the syndrome arithmetic unit, and to flow the two code strings read earlier as they are to the two syndrome arithmetic units downstream as two code strings read later The reading means reads out the first two of the actually read code strings sequentially from the head, and the pre-processing control means reads the code strings read sequentially from the head after the code string. For two code strings, the two switching means are used to temporarily store data at a predetermined address in the two FIFO storage means. The control means of the preceding storage switching means such as the head and tail data is The two code strings read later are used to temporarily store data at a predetermined address in the two FIFO storage means using the two switching means. The read target code string selection control means Is controlled in consideration of the arrangement of the data of the P code string in the current storage unit. The control unit of the order adjustment switching unit is The data which is temporarily stored in the two FIFO storage means by using two switching means is supplied to the syndrome operation unit with good timing from the beginning to the end of the data of each code string. 5. The syndrome calculation device according to 4.