JP2001128166A - Integrated circuit for image compression and image compressing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a general purpose integrated circuit for image compression which can be adaptive to the specifications of various application segments. SOLUTION: The integrated circuit for image compression makes the data length of an application segment externally settable, prepares dummy data having the style of the application segment from the data length, and outputs the dummy data in a state where the data are inserted into a compressed image file. On an external device side, the compressed image file is completed by replacing the dummy data with a regular application segment. Since the integrated circuit can be adaptive to various application segments, the versatility of the integrated circuit is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit for compressing an image and an image compressing apparatus using the integrated circuit.

[0002]

2. Description of the Related Art Conventionally, there is known an electronic camera or other device having an image compression function (hereinafter referred to as an "image compression device") on which an image compression integrated circuit comprising a dedicated LSI is mounted. In this type of image compression integrated circuit, header information of a compressed image file (for example, JPEG
SOI, DQT, DHT, DRI, S specified in the standard
It is known to automatically generate OF0, SOS, RSTm, and EOI markers). By utilizing such a function of automatically generating header information, external processing of the integrated circuit is greatly reduced.

[0003]

By the way, in such a compressed image file, an application segment is prepared as a data area that can be arbitrarily added on the use side of the file. For example, Ex for electronic cameras
If (Exchangeable image file format), APP
As 1, unique data such as a thumbnail image is recorded. Such an application segment can be variously determined for each device or use of the compressed image file, and the data length and data content also differ. Therefore, in a general-purpose image compression integrated circuit,
It has not been possible to automatically generate all of these various application segments.

Conventionally, on the image compression apparatus side, a standard compressed image file output from an image compression integrated circuit is rewritten together with header information including an application segment. In this case, the image compression apparatus must separately prepare a processing program for moving data of header information in the compressed image file or producing header information by itself. Therefore, it has been difficult to use a general-purpose image compression integrated circuit in the design process.

[0005] Further, the header information internally generated by the image compression integrated circuit includes accurate parameters used in the actual image compression work, and is therefore highly reliable. However, when such header information is rewritten on the device side,
Under the influence of software bugs, the reliability of header information is reduced.

In order to avoid such a problem, an image compression integrated circuit for automatically generating a dedicated application segment may be created. However, since such a dedicated integrated circuit is not versatile, the number of manufactured integrated circuits is extremely limited, resulting in a problem of extremely high cost.

In order to solve the above-mentioned problems, the present invention provides a general-purpose image compression integrated circuit which enables efficient generation of a compressed image file including various application segments. Aim. Another object of the present invention is to provide an image compression apparatus that efficiently generates a compressed image file including a unique application segment using such an image compression integrated circuit.

[0008]

An embodiment (FIG. 1, FIG.
Means for solving the problem will be described while associating the reference numerals in FIGS. 2 and 6). Note that the association here is for reference and does not limit the present invention.

According to a first aspect of the present invention, in the image compression integrated circuit (11) for compressing image data and generating a compressed image file, the data length of the application segment is externally set. APP data length input means (12) for accepting, and dummy insertion means (13, 17) for inserting dummy data of the data length set in the APP data length input means at the application segment position of the compressed image file, A compressed image file into which dummy data has been inserted is output via an insertion unit.

In such an image compression integrated circuit, dummy data in which the format of the application segment is adjusted according to the data length set externally is generated and inserted into the compressed image file. Therefore, in the external device, the dummy data in the compressed image file (or the portion in the dummy data that needs to be rewritten) may be replaced later with the regular application segment. In this case, it is not necessary to rewrite the header information or move the address in the related art, and the processing load on the device side is reduced.

Further, on the image compression integrated circuit side, by setting the data length of the application segment externally, it is possible to immediately respond to the specifications of various application segments. Therefore, according to the present invention, an integrated circuit for image compression with very high versatility is realized. In a fifth aspect of the present invention, a buffer memory for storing an application segment is mounted on an image compression integrated circuit in order to solve the same problem. In this case, a buffer memory having a sufficient capacity is required to sufficiently cope with various application segments in the future. For this reason, it causes a cost increase such as an increase in the chip size of the integrated circuit. On the other hand, the invention of claim 1 has an advantage that this kind of buffer memory is unnecessary and that the problem can be flexibly solved by software processing outside the integrated circuit.

Further, in the invention of claim 5 described later, normally, a compressed image file cannot be output until the application segment in the buffer memory is determined. In this case, the high speed of the image compression integrated circuit cannot be fully utilized depending on the timing of determining the application segment and the processing speed on the device side. On the other hand, in the invention of claim 1,
If the data length of the application segment is determined (especially if the data length is rough such as the number of segments, the compressed image file can be output for the time being). Therefore, it is possible to make full use of the high speed of the integrated circuit for image compression, for example, it is possible to immediately proceed to the compression processing of the next frame without being greatly affected by the processing speed of the apparatus. Further, on the device side, flexible and efficient processing, such as performing the creation and replacement processing of the application segment later in the margin time, is also possible.

<Second Aspect> According to a second aspect of the present invention, in the integrated circuit for image compression according to the first aspect,
APP position input means (12) for receiving an external setting for the position of the application segment in the file
Wherein the dummy insertion means (13, 17) inserts dummy data at a position in the file set by the APP position input means. In the above configuration, the position of the application segment in the file can be specified. Therefore, a more versatile image compression integrated circuit can be realized.

According to a third aspect of the present invention, in the integrated circuit for image compression according to the first aspect,
Dummy inserting means (13, 17) inserts dummy data into S
It is characterized by being inserted immediately after the OI marker. In the above configuration, the dummy data of the application segment is inserted immediately after the SOI marker. Usually, the application segment is often inserted immediately after the SOI marker. Therefore, even with such a configuration, an image compression integrated circuit with sufficiently high versatility can be realized.

According to a fourth aspect of the present invention, there is provided an image compression integrated circuit (11) according to any one of the first to third aspects, wherein the dummy insertion means (13,
17) is characterized in that dummy data is generated so as not to include other marker codes used in the compressed image file.

Normally, when a marker code other than the application segment is inserted into the dummy data,
Significant errors can occur in file interpretation of compressed image files. Therefore, according to the invention of claim 4, dummy data is generated and embedded in the compressed image file so that unnecessary marker codes are not included. Such an operation makes it possible to prevent an error in file interpretation.

According to a fifth aspect of the present invention, in the image compression integrated circuit (51) for compressing image data and generating a compressed image file, a buffer memory capable of externally writing an application segment. (5
2) and APP insertion means (17) for inserting the application segment written in the buffer memory into the application segment position of the compressed image file. The compressed image file in which the application segment has been inserted via the APP insertion means is provided. It is characterized by outputting. In such an image compression integrated circuit, a compressed image file is completed by inserting the application segment written in the buffer memory. In this case, since it is not necessary for the integrated circuit to individually create the data of the application segment, an image compression integrated circuit having extremely high versatility is realized.

According to a sixth aspect of the present invention, there is provided an image compression integrated circuit according to any one of the first to fourth aspects, and dummy data is stored in the image compression integrated circuit. APP information setting means (27) for setting information necessary for generating an image segment, and APP overwriting means (27) for overwriting an application segment on a compressed image file output from the image compression integrated circuit. Thus, an image compression apparatus is configured.

<Seventh Aspect> According to a seventh aspect of the present invention, there is provided an APP writing means for writing an application segment to the image compression integrated circuit according to the fifth aspect and a buffer memory in the image compression integrated circuit. (27) to constitute an image compression device.

[0020]

Embodiments of the present invention will be described below with reference to the drawings.

<< First Embodiment >> The first embodiment is an embodiment corresponding to the first to fourth and sixth aspects of the present invention. [Configuration of Image Compression Integrated Circuit] FIG. 1 is a block diagram conceptually showing the internal configuration of the image compression integrated circuit 11.
In this figure, for convenience of explanation, some functions that are flexibly realized by software processing such as a software sequencer in an integrated circuit are also represented as functional blocks. Note that part or all of the internal processing of the integrated circuit 11 of the present embodiment may be realized by hardware (for example, a hardware sequencer and a hardware processing circuit that executes processing under the sequence control thereof). Absent.

In FIG. 1, an image compression integrated circuit 11 is shown.
Is schematically configured with the following functional blocks. APP setting register 12: A register for holding “information necessary for creating dummy data of an application segment” written from outside. In this register, an area for recording each data length of APP0 to APP15 and information on the position in the file is predetermined. Dummy data generation unit 13: APP setting register 1
The dummy data of the application segment is generated with reference to the information of No. 2. A JPEG header generation unit 14 generates a JPEG header and other accompanying information (excluding an application segment). Compression operation unit 15: JPEG compression of image data (pixel block → DCT conversion → quantization → encoding). File creator 17: Arranges each generated data in the order of the file format, and externally outputs it as a compressed image file.

[Configuration of Electronic Camera] On the other hand, FIG. 2 is a diagram showing the internal configuration of an electronic camera 21 on which the image compression integrated circuit 11 is mounted. In FIG. 2, a photographing lens 22 for forming an image of a subject is attached to an electronic camera 21.
In the image space of the taking lens 22, an image pickup device 23 for photoelectrically converting a subject image is arranged. The image data from the image sensor 23 is supplied to the image compression integrated circuit 11 after passing through the A / D converter 24 and the signal processor 25 in this order.
The image compression integrated circuit 11 is connected to an MPU (microprocessor unit) 27 for system control, a system memory 28, a memory card 29 for image recording, and the like via a bus 30 and the like.
Note that a broken line area (the image compression integrated circuit 1) shown in FIG.
1, MPU 27, system memory 28, and bus 3
The image compression device 26 is configured by the configuration of (0).

[Compression Recording Operation of Image Data on Electronic Camera 21] FIG. 3 is a diagram showing a compression recording operation executed on the electronic camera 21 side. Hereinafter, the compression recording operation in the electronic camera 21 will be described according to the step numbers in FIG. Step S1: First, as an initial setting, the MPU 27
The data length of each application segment is recorded in the APP setting register 12 in the image compression integrated circuit 11. If the position of the application segment in the file is different from that immediately after the SOI marker, the MPU 27
The information indicating the position in the file is also recorded in the APP setting register 12. Step S2: Next, the MPU 27 creates application segment data on the system memory 28. During this period, on the image compression integrated circuit 11 side, a process of creating a compressed image file including dummy data (described later) is executed in parallel. Step S3: The compressed image file (including the dummy data) completed on the image compression integrated circuit 11 side is
Are sequentially recorded in the system memory 28. Step S4: The MPU 27 overwrites the dummy data (or dummy code) of the compressed image file with the regular application segment created in step S2. Step S5: The MPU 27 stores the completed compressed image file of the application segment in the memory card 29.
To record.

[Process of Creating Compressed Image File on Image Compression Integrated Circuit 11] FIG. 4 shows a process of creating a compressed image file (including dummy data) executed inside the image compression integrated circuit 11. It is. Hereinafter, the process of creating the compressed image file shown in FIG. 4 will be described. Step S11: The compression operation unit 15 in the image compression integrated circuit 11 executes JPEG compression on the image data supplied from the signal processing unit 25 by hardware processing.
In the case of fixed-length compression, the compression calculation unit 15 determines the scale factor after performing a plurality of test compressions,
Perform fixed-length compression. Step S12: The dummy data generation unit 13 firstly
The setting information recorded in the APP setting register 12 is read. The dummy data generation unit 13 acquires the data length of the application segment from the setting information and creates dummy data as shown in FIG. The dummy data here is composed of the following data strings. Marker code of each application segment Segment length of each application segment (value calculated from data length) Dummy code (here, 00H or FFH) so as to satisfy the data length of each application segment
The dummy data generation unit 13 interprets that the application segment whose data length is set to zero does not exist in the file, and does not generate the dummy data of the application segment. Step S13: The file creation unit 17 determines whether or not the APP setting register 12 has valid information on the position in the file. When there is no information on the position in the file, the file creating unit 17 shifts the operation to Step S14.
On the other hand, when there is information on the position in the file, the file creating unit 17 shifts the operation to Step S15. Step S14: The file creation unit 17 inserts the dummy data created by the dummy data creation unit 13 immediately after the SOI marker (default position) in the JPEG header. After that, the file creation unit 17 determines in step S1
The operation moves to 6. Step S15: The file creation unit 17 inserts the dummy data created by the dummy data creation unit 13 into the set position in the file. Then, the file creation unit 1
The operation proceeds to step S16. Step S16: The file creating section 17 outputs the compressed image data and accompanying information (including dummy data) such as a JPEG header to the outside according to the JPEG file format. Specifically, a kind of sequencer (hardware sequencer or software sequencer) is provided in the image compression integrated circuit 11. The sequencer functions as a file creation unit 17 to perform sequence control (eg, start and stop) of functional blocks such as a dummy data generation unit 13, a generation unit 14 such as a JPEG header, and a compression operation unit 15. As a result, the output data of each functional block is sequentially output to the outside in the order of the internal data of the compressed image file without conflict at the time of output.

(Effects of the First Embodiment, etc.) By the above-described series of operations, the integrated circuit for image compression 11
A compressed image file (including dummy data) whose example is shown in FIG. Electronic camera 2
On the first side, by overwriting the dummy code with a regular application segment, a regular compressed image file can be completed quickly and accurately.

In particular, in the image compression integrated circuit 11, the data length of the application segment (dummy data) can be freely changed by external setting. Further, the position of the application segment (dummy data) in the file can be freely changed. With these features,
A very versatile image compression integrated circuit 11 that can flexibly cope with various file specifications is realized.

The image compression integrated circuit 11 fills the data area in the dummy data with a dummy code of 00H or FFH. Therefore, in the present embodiment, unnecessary marker codes do not appear in the dummy data, and an error in file interpretation can be reliably prevented. Further, the image compression integrated circuit 11 generates dummy data corresponding to a plurality of application segments (APP0 to APP15). Therefore, the image compression integrated circuit 11 can flexibly cope with a file specification in which a plurality of application segments are inserted.

The image compression integrated circuit 11 inserts APPn (marker code of the application segment) and the segment length at the head of each dummy data.
Therefore, on the electronic camera 21 side, it is possible to save trouble such as generating these data. In particular, at the time of output from the image compression integrated circuit 11, each data position in the compressed image file has been determined. Therefore, there is no need to move the address of data when rewriting the application segment on the electronic camera 21 to the regular application segment. Therefore, there is no danger that the data is divided into upper byte / lower byte due to an odd address movement smaller than the data bus width, and the bus transfer of the compressed image file can be performed efficiently. Next, another embodiment will be described.

<< Second Embodiment >> A second embodiment is an embodiment corresponding to the fifth and seventh aspects of the present invention. FIG. 6 is a diagram showing a schematic configuration of the image compression integrated circuit 51. The feature of the configuration of the image compression integrated circuit 51 is that the image compression integrated circuit 51 is provided with a buffer memory 52 that can externally write application segment data. In addition,
Other configurations are the same as those of the first embodiment (FIGS. 1 and 2), and thus the same reference numerals are given and the description thereof is omitted.

FIG. 7 is a diagram for explaining the compression recording operation of the electronic camera 21 equipped with the image compression integrated circuit 51.
Hereinafter, the compression recording operation of the electronic camera 21 will be described according to the step numbers in FIG. Step S21: First, the MPU 27 creates application segment data on the system memory 28. Step S22: The MPU 27 writes the created application segment data into the buffer memory 52 in the image compression integrated circuit 51. The data area of the application segment is stored in the buffer memory 52.
When the capacity exceeds the capacity, the MPU 27 does not write the excess data area into the buffer memory 52, and keeps the data area as it is on the system memory 28. Step S23: The compressed image files completed on the image compression integrated circuit 51 side are sequentially recorded in the system memory 28 via the bus 30. Step S24: If the excess data area remains in the system memory 28 in step S22, the MP
U27 transfers the operation to step S25. On the other hand, when the excess data area does not remain in the system memory 28, the MPU 27 shifts the operation to Step S26. Step S25: The MPU 27 stores the system memory 28
The excess data area remaining above is overwritten with the dummy code in the compressed image file. Step S26: The MPU 27 stores the completed compressed image file of the application segment in the memory card 2.
Record in 9.

[Process of Creating Compressed Image File on Integrated Circuit 51 for Image Compression] FIG. 8 is a diagram showing the process of creating a compressed image file executed inside the integrated circuit 51 for image compression. Hereinafter, the process of creating the compressed image file shown in FIG. 8 will be described. Step S31: The compression operation unit 15 in the image compression integrated circuit 51 executes JPEG compression on the image data supplied from the signal processing unit 25 by hardware processing. Step S32: The file creating unit 17 first sets the application segment in the buffer memory 52 to JP
Insert into EG header. Step S33: The file creation unit 17 determines whether or not the application segment exceeds the buffer capacity by judging from the segment length of the application segment in the buffer memory 52. If the application segment exceeds the buffer capacity, the file creation unit 1
The operation proceeds to step S34. On the other hand, if the application segment does not exceed the buffer capacity,
The file creating unit 17 shifts the operation to Step S35. Step S34: The file creating unit 17 determines the data length of the unstored data area from the value of the segment length of the application segment, and inserts a dummy code corresponding to the data length. Step S35: The file creation unit 17 sends the compressed image data and the accompanying information such as the JPEG header to the JP
External output according to EG file format.

(Effects of Second Embodiment, etc.) By the above-described series of operations, the integrated circuit for image compression 51
A compressed image file including a part or all of the regular application segment is output on the bus 30. In this case, it is not necessary for the image compression integrated circuit 51 to individually create the data of the application segment, so that the image compression integrated circuit 51 with extremely high versatility is realized.

<< Supplementary Items of the Embodiment >> In the first embodiment, the data length is set for each of a plurality of application segments, but the present invention is not limited to this. For example, information such as the type and number of application segments may be set. In this case, the image compression integrated circuit 11 may create dummy data in which the format of the application segment is adjusted based on the type and the number of the application segments (the number of the same type of application segments) and insert the dummy data into the compressed image file. .

For example, the image compression integrated circuit 11 may receive a setting relating to the total data length of the entire application segment. in this case,
The image compression integrated circuit 11 may generate the dummy data (the dummy codes are simply arranged) for the total data length and insert the dummy data into the compressed image file. In this case, the dummy data string does not include the application marker code, the segment length, and the like. Therefore, the application segments can be flexibly overwritten later in an arbitrary number, an arbitrary length, and an arbitrary order within the range of the total data length.

In the first embodiment, replacement of dummy data is performed on the system memory 28, but the present invention is not limited to this. For example, the compressed image file from the image compression integrated circuit 11 may be directly recorded on the memory card 29, and the dummy data may be replaced on the memory card 29. In the second embodiment, a data discriminating means for discriminating whether the data in the buffer memory 52 is “application segment” or “information for generating dummy data” (for example, from data characteristics or setting flag information). May be provided. In this case, when the data in the buffer is determined to be an application segment, the file creation unit 17 (APP insertion means) inserts the application segment into the compressed image file. On the other hand, if it is determined that the information is for generating dummy data, the file creating unit 17 (APP inserting means) generates dummy data from the information and inserts the dummy data into the compressed image file. With such a configuration, a more versatile image compression integrated circuit 51 that can automatically deal with both of the above-described two embodiments is realized.

In the second embodiment described above,
“Information on the position of the application segment in the file” may be made writable in the buffer memory 52. In this case, the file creating unit 17 inserts the application segment at the position in the file. With such a configuration, a more versatile image compression integrated circuit 51 that can externally set the position in the file is realized.

In the above two embodiments, 00H or FFH is used as the dummy code.
It is not limited to this. Generally, it is sufficient that unnecessary marker codes do not appear in the dummy data.
In the two embodiments described above, the case where DRI (Define Restart Interval) information is output as shown in FIG. 5 has been described, but the present invention is not limited to this. For example, some compressed image files do not include DRI information and RSTm markers. Also, for example, the image compression integrated circuit may be provided with a DRI designation unit for designating whether or not to output the DRI information, and automatically switch between outputting and not outputting the DRI information according to the designation. Further, when DRI information is output, RSTm (Restar
t Interval Termination (ECS) marker
RST insertion means for automatically inserting the RST into the coded segment may be provided in the image compression integrated circuit. In the above two embodiments, the case of JPEG has been described, but the present invention is not limited to this. The application segment in the present invention refers to a data area that can be arbitrarily added on the user side or the compression apparatus side.
Widely applicable to PEG and other file formats.

[0039]

According to the first aspect of the present invention, dummy data of an application segment is inserted into a compressed image file according to an externally set data length. In this case, by changing the setting of the data length from the outside, it is possible to flexibly cope with the specifications of various application segments. Further, the integrated circuit for image compression of the present invention can output a compressed image file (including dummy data) without waiting for completion of data of the application segment. Therefore, the speed of generating the data of the application segment is increased, and there is no problem such as a delay in the output of the compressed image file (including the dummy data), and the high speed of the image compression integrated circuit can be fully utilized. According to the second aspect of the present invention, the position of the application segment in the file can be specified, so that a more versatile integrated circuit for image compression is realized. According to the third aspect of the present invention, the dummy data of the application segment is inserted immediately after the SOI marker. Usually, since the application segment is very frequently inserted immediately after the SOI marker, an image compression integrated circuit having sufficiently high versatility is realized even with such a configuration. According to the fourth aspect of the present invention, dummy data is generated so that unnecessary marker codes are not included. Therefore, it is possible to reliably prevent an error in file interpretation. According to the invention described in claim 5, the compressed image file is completed by inserting the application segment written in the buffer memory. Therefore, there is no need to create any unique data of the application segment on the image compression integrated circuit side, and an extremely versatile image compression integrated circuit is realized. According to a sixth aspect of the present invention, there is provided an image compression apparatus using the image compression integrated circuit according to any one of the first to fourth aspects. According to a seventh aspect of the present invention, an image compression apparatus using the image compression integrated circuit according to the fifth aspect is realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an internal configuration of an image compression integrated circuit 11.

FIG. 2 is a diagram showing an internal configuration of the electronic camera 21.

FIG. 3 is a diagram illustrating a compression recording operation of the electronic camera 21 according to the first embodiment.

FIG. 4 is a diagram showing a process of creating a compressed image file executed on the image compression integrated circuit 11 side.

FIG. 5 is a diagram illustrating an example of a compressed image file including a dummy code.

FIG. 6 is a diagram showing an internal configuration of an image compression integrated circuit 51.

FIG. 7 is a diagram illustrating a compression recording operation of the electronic camera 21 according to the second embodiment.

FIG. 8 is a diagram showing a process of creating a compressed image file executed on the image compression integrated circuit 51 side.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Image compression integrated circuit 12 APP setting register 13 Dummy data generation part 14 Generation part of JPEG header etc. 15 Compression operation part 17 File preparation part 21 Electronic camera 22 Photographing lens 23 Imaging element 24 A / D conversion part 25 Signal processing part 26 Image compression device 27 MPU 28 System memory 29 Memory card 30 Bus 51 Image compression integrated circuit 52 Buffer memory

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference)

Claims (7)

[Claims] An image compression integrated circuit for compressing image data to generate a compressed image file, wherein an external data length of an application segment (a data area that can be arbitrarily added to the compressed image file) An APP data length input unit for receiving setting from the device; and a dummy insertion unit for inserting dummy data having a data length set in the APP data length input unit into an application segment position of the compressed image file. And outputting the compressed image file in which the dummy data has been inserted via the CPU. 2. The integrated circuit for image compression according to claim 1, further comprising: APP position input means for receiving an external setting of the position of the application segment in the file, wherein said dummy inserting means is set by said APP position input means. An integrated circuit for compressing an image, wherein the dummy data is inserted at a position in the file. 3. The integrated circuit for compressing an image according to claim 1, wherein said dummy inserting means outputs the dummy data to an SOI.
(Start of Image) An integrated circuit for image compression, which is inserted immediately after a marker. 4. The image compression integrated circuit according to claim 1, wherein the dummy insertion unit does not include a marker code used in the compressed image file. An image compression integrated circuit, wherein the dummy data is generated. 5. An image compression integrated circuit for compressing image data to generate a compressed image file, comprising: a buffer memory to which an application segment can be written from the outside; An integrated circuit for image compression, comprising: APP insertion means for inserting an application segment into an application segment position of an image file; and outputting a compressed image file in which the application segment is inserted via the APP insertion means. 6. An image compression integrated circuit according to claim 1, wherein information necessary for generating the dummy data is set in the image compression integrated circuit. An image compression apparatus comprising: APP information setting means; and APP overwriting means for overwriting an application segment on a compressed image file output from the image compression integrated circuit. 7. An image compression integrated circuit according to claim 5, and a buffer memory in the image compression integrated circuit.
An image compression apparatus comprising: an APP writing unit that writes an application segment.