JP2001127813A - Modulation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To read/write data outputting an optimal modulated signal to each of IC cards which can be accessed with respectively different amplitude transit modulated signals. SOLUTION: A modulation circuit 12 for an IC card reader/writer is provided with a driver DRV, a variable power source part 41, OR circuits OR1 and OR2 and an inverter INV. When a switching signal (b) is L, a 5 V voltage from the variable power source part 41 is impressed to the driver as a power supply voltage and the modulated signal of modulation factor 100% is outputted from the driver. When the switching signal (b) is H, on the other hand, the voltage of 5 V or 4.1 V corresponding to H/L of a transmitting code (a) is impressed from the variable power source part 41 to the driver as a power supply voltage, and the modulated signal of modulation factor 10% is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a modulation circuit for modulating the amplitude of a carrier signal according to an input signal.

[0002]

2. Description of the Related Art This type of modulation circuit shifts the amplitude of a carrier signal in accordance with binary information of an input signal. Such amplitude shift keying is performed by ASK (amplitt).
For example, type A modulation that shifts the amplitude of a carrier signal to a modulation factor of 100% according to “1” or “0” indicating binary information of an input signal, and a value of an input signal “ There is type B modulation in which the amplitude of a carrier signal is shifted to a modulation factor of 10% according to "1" and "0".

FIG. 5 is a waveform chart for explaining the principle of amplitude shift keying. The modulation factor of the amplitude shift keying can be expressed as: modulation factor = {(xy) / (x + y)} × 100 (%). Note that x is an input signal 2
For example, the amplitude voltage of the carrier signal when the value of the value signal is “1” is shown, and y indicates the amplitude voltage of the carrier signal when the value of the binary signal is “0”.

Here, if the carrier signal amplitude voltage y when the binary signal value is “0” is 0 V with respect to the carrier signal amplitude voltage x when the binary signal value is “1”, then the modulation degree = {(X−0) / (x + 0)} × 100 = 100
(%), And a type A modulation signal that shifts the amplitude of the carrier signal to a modulation factor of 100% is generated as shown in FIG. Further, the ratios of the carrier signal amplitude voltages x and y when the binary signal values are “1” and “0” are 100 and 8 respectively.
Assuming 1.8, from the above equation, the modulation degree = {(100-81.8) / (100 + 81.8)} x 100}
10 (%), and a type B modulated signal for shifting the amplitude of the carrier signal to a modulation factor of 10% is generated as shown in FIG. 5 (c).

Among the type A and type B modulation circuits, the type A modulation circuit that shifts the amplitude of a carrier signal to a modulation factor of 100% in accordance with the input signal value “1” or “0” is Is used for a non-contact IC card reader / writer for reading / writing data from / to an IC card. The non-contact IC card reader / writer writes data to the IC card and reads data from the IC card by transmitting the modulation signal of the modulation circuit to the IC card as a radio signal.

[0006]

In recent years, the amplitude of a carrier signal has been changed by a modulation factor of 1 in accordance with the input signal values "1" and "0".
A type B modulation circuit for shifting to 0% is mounted on a non-contact IC card reader / writer, and a modulation signal of the type B modulation circuit is transmitted to the IC card to read / write data from / to the IC card. That is being considered. However, an IC card reader / writer equipped with such a type B modulation circuit cannot access an IC card for a type A modulation signal already on the market. Therefore, a modulation circuit capable of accessing an IC card reader / writer for both an IC card accessed by a type A amplitude shift keying signal and an IC card accessed by a type B amplitude shift keying signal There is a demand that we want to arrange.

Accordingly, an object of the present invention is to output an optimum amplitude shift keying signal to each IC card which can be accessed by different amplitude shift keying signals, thereby enabling access.

[0008]

According to the present invention, there is provided a modulation circuit for shifting an amplitude voltage of a carrier signal in accordance with a value of a binary signal and outputting an amplitude shift keying signal. , A carrier signal and a binary signal, and a first switching signal for instructing the output of a first amplitude shift keying signal for shifting the amplitude voltage of the carrier signal by a first voltage, and the amplitude of the carrier signal. Driving means for selectively inputting a second switching signal for instructing output of a second amplitude shift keying signal for shifting the voltage by a second voltage smaller than the first voltage; A fourth voltage smaller than the third voltage;
And a control unit. The control unit applies the third voltage of the power supply unit to the driving unit as a power supply voltage when the driving unit is inputting the first switching signal. The first amplitude shift keying signal is output, and when the driving unit is inputting the second switching signal, the third unit of the power supply unit is output.
And a voltage corresponding to the value of the binary signal of the fourth voltage is generated and applied to the driving means as a power supply voltage to output a second amplitude shift keying signal. In this case, the control means receives the binary signal at one input terminal, receives one of the first and second switching signals at the other input terminal, and connects to the output terminal. An OR circuit for instructing generation of any one of a third voltage and a fourth voltage of the power supply unit, and a second switching signal by inverting the switching signal when a first switching signal is input. And an inverter circuit that, when a second switching signal is input, inverts the switching signal and outputs the inverted signal as a first switching signal to the OR circuit. In addition, when the first switching signal is input, the driving unit outputs / non-outputs the carrier signal according to the value of the binary signal and outputs the first amplitude shift keying signal. Further, one of the first and second switching signals is automatically output to the driving means.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 3 is a block diagram showing a configuration of a non-contact IC card reader / writer to which the modulation circuit according to the present invention is applied. In FIG. 3, a non-contact IC card reader / writer (hereinafter, IC card reader) 1 includes a control unit 11 for controlling the whole of the IC card reader 1 and a carrier signal described later into a data signal output from the control unit 11. A modulation circuit 12, a demodulation circuit 13, and a matching circuit 1
4, a resonance circuit 15, and a power supply unit 16 for supplying power to the above units.

Here, the matching circuit 14 receives the output signal from the modulation circuit 12 and outputs it to the resonance circuit 15, and this output signal is efficiently transmitted from the resonance circuit 15 to an I / O circuit described later.
The impedance is matched with the resonance circuit 15 so that the impedance can be transmitted to the C card. The resonance circuit 15
When an antenna coil L1 serving as an inductive element and a capacitive element C1 are connected in parallel, and a modulation signal is given from a modulation circuit 12 via a matching circuit 14, resonance starts to generate a radio signal from the antenna coil L1. The signal is transmitted as a wireless signal to an IC card electromagnetically coupled to the coil L1. The demodulation circuit 13 receives a modulation signal returned from the IC card via the resonance circuit 15 in response to the transmission of the wireless signal, demodulates the modulation signal, extracts data, and outputs the data to the control unit 11. .

The control unit 11 in the IC card reader 1 is connected to the host device 2 via a serial I / F (serial interface). The control unit 11 records data received from the host device 2 on the IC card by performing data communication with the host device 2 via the serial I / F, and transmits data read from the IC card to the host device 2. I do.

FIG. 4 is a block diagram showing the configuration of the IC card which is electromagnetically coupled with the IC card reader 1. FIG.
The IC card 3 has an antenna coil L2, a wireless interface 31, a control circuit 32, and a memory 33 in which an ID and information unique to the IC card are stored.

The wireless interface 31 of the IC card 3
When the antenna coil L1 of the IC card reader 1 and the antenna coil L2 of the IC card 3 are electromagnetically coupled, the IC
A power POWER is generated from the radio signal from the card reader 1 and supplied to the control circuit 32 and the memory 33, and a clock signal CLK is generated and supplied to the control circuit, and data DATA is extracted from the radio signal. This is output to the control circuit 32. The control circuit 32 of the IC card 3
When power POWER is supplied from the wireless interface 31, the wireless interface 3 is synchronized with the clock signal CLK.
1 is read, and if the data DATA is write data to the memory 33, it is recorded in the memory 33. If the data DATA is command data for reading data in the memory 33, the data in the memory 33 is read. The data is output to the wireless interface 31.

The operation of the IC card reader 1 and the IC card 3 will be described with reference to FIGS. IC card reader 1
Generates a carrier signal of a predetermined frequency from an oscillator 40 described later provided in the modulation circuit 12 and transmits it as a radio signal via the matching circuit 14 and the resonance circuit 15. Here, when the IC card 3 is placed at a predetermined place on the IC card reader 1, the antenna coils L2 and I
The antenna coil L1 of the C card reader 1 is electromagnetically coupled, and the power POWER is supplied to the IC card 3 by the radio signal of the IC card reader 1 as described above.

The control unit 11 of the IC card reader 1 transmits data from the host device 2 to the IC card 3 through a serial I / O.
When received via F, this data is output to modulation circuit 12. Upon receiving the data from the control unit 11, the modulation circuit 12 performs amplitude shift modulation on the carrier signal according to the input data value, and transmits the carrier signal as a radio signal via the matching circuit 14 and the resonance circuit 15.

When the radio interface 31 of the IC card 3 receives a radio signal from the IC card reader 1 via the antenna coil L2, it extracts data DATA from the radio signal as described above and sends it to the control circuit 32. Output. Here, the control circuit 32 records the received data DATA from the IC card reader 1 in the memory 33 when the data is write data to the memory 33. If the data DATA is command data for reading the data in the memory 33, the data in the memory 33 is sequentially read in synchronization with the above-mentioned clock signal CLK and output to the wireless interface 31 side.

Data sequentially read from the memory 33 of the IC card 3 is transmitted as a radio signal to the IC card reader 1 via the wireless interface 31 and the antenna coil L2. Resonant circuit 15 of IC card reader 1
Receives a radio signal from the IC card 3 and outputs the radio signal to the demodulation circuit 13 as a modulation signal. The demodulation circuit 13 extracts data from the modulated signal by demodulating the modulated signal, and outputs the extracted data in the memory 33 of the IC card 3 to the control unit 11. Control unit 11
Receives the data from the demodulation circuit 13 and transmits this data to the host device 2. In this manner, the IC card reader 1 can write data to the IC card 3 and read data written to the IC card 3.

FIG. 1 is a block diagram showing a configuration of a modulation circuit according to the present invention.
Is used as a modulation circuit. As shown in FIG. 1, the modulation circuit 12 includes an oscillator 40 that generates the above-described carrier signal c having a predetermined frequency, a variable power supply unit 41, and an OR circuit OR
1, OR2, an inverter circuit INV, and a driver circuit DRV. Here, the driving circuit 12A is configured by the OR circuit OR2 and the driver circuit DRV. The control means 12B is constituted by the OR circuit OR1 and the inverter circuit INV.

The modulation circuit 12 shifts the amplitude of the carrier signal in accordance with the binary information of the input signal, and modulates the amplitude of the carrier signal in accordance with the data values "1" and "0" by a modulation factor of 100. %, And Type B modulation, in which the amplitude of the carrier signal is shifted to a modulation factor of 10% in accordance with data values "1" and "0".

The operation of the modulation circuit 12 will be described with reference to FIG. In FIG. 1, a carrier signal c of an oscillator 40 is output to one input terminal of a driver circuit DRV. Also,
Control unit 1 consisting of data value "1" or data value "0"
1 is output to one input terminal of the OR circuit OR1 and a switching signal b from the control unit 11 is output.
Is inverted by the inverter circuit INV1 and the OR circuit O
It is output to the other input terminal of R1.

When the switching signal b is at "L" level, the switching signal b is inverted by the inverter circuit INV1 and supplied to the other input terminal of the OR circuit OR1 as an "H" level signal. Therefore, the level of the transmission code a input to one input terminal of the OR circuit OR1 is “H”,
Regardless of the level of “L” (data value “1”,
Regardless of “0”), the output of the OR circuit OR1 becomes “H” level, and the variable power supply unit 41 connected to the output terminal of the OR circuit OR1 generates a + 5V voltage. The + 5V voltage of the variable power supply 41 is always applied as the power supply voltage VDD of the driver circuit DRV.

On the other hand, when the switching signal b is at "L" level,
The "L" level switching signal b is output to one input terminal of the OR circuit OR2, and the transmission code a is output to the other input terminal of the OR circuit OR2. An “H” level and “L” level signal is output according to the “H” level and “L” level of “a”, and is applied to the other input terminal of the driver circuit DRV. As a result, the driver circuit DRV outputs the values “1” and “0” of the transmission code a (that is, the “H” level of the transmission code a,
A modulated signal that shifts the output amplitude of the carrier signal c to a modulation factor of 100% according to the “L” level) is output. That is,
The modulation circuit 12 operates as a type A modulation circuit when the switching signal b is at the “L” level.

Next, when the switching signal b is at the "H" level, the switching signal b at the "H" level is output to one input terminal of the OR circuit OR2, and the transmission code a is transmitted to the other terminal of the OR circuit OR2. , The OR circuit OR2 always outputs a signal of “H” level to the driver circuit D irrespective of the “H” level and “L” level of the transmission code a.
It outputs to the other input terminal of RV. Driver circuit D
Since the carrier signal c is output to one input terminal of the RV as described above, the driver circuit DRV can always output an inverted signal of the carrier signal c.

On the other hand, the "H" level switching signal "b" is inverted by the inverter circuit INV and supplied to the other input terminal of the OR circuit OR1 as a "L" level signal. Therefore, the OR circuit OR1 outputs "H" level and "L" level signals according to the "H" level and "L" level of the transmission code a of one input terminal, respectively. Thus, when the transmission code a is at the “H” level, the variable power supply unit 41 generates the above-mentioned + 5V voltage by the “H” level signal output from the OR circuit OR1, and applies the generated voltage to the driver circuit DRV as the power supply voltage VDD. . When the transmission code a is at the “L” level, the variable power supply unit 41 generates a voltage of about +4.1 V by the “L” level signal output from the OR circuit OR1, and applies the generated voltage as the power supply voltage VDD of the driver circuit DRV. I do.

As described above, when the switching signal b is at the “H” level, the power supply voltage VDD of the driver circuit DRV is set to +5 V and +4.1 V according to the “H” level and the “L” level of the transmission code a, respectively. Due to the fluctuation, the driver circuit DRV can output a modulation signal that shifts the output amplitude of the carrier signal c to a modulation factor of 10% according to the values “1” and “0” of the transmission code a. That is, the modulation circuit 12
Operates as a type B modulation circuit when the switching signal b is at the “H” level.

When outputting a switching signal b of either "H" or "L" level to the modulation circuit 12, the control section 11 outputs the switching signal b in accordance with an instruction from a switch (not shown). That is, when the changeover switch is instructing to output a modulation signal having a modulation factor of 10%, the modulation circuit 12 outputs “H”.
A switching signal of a level is output, and when the switching switch is instructing to output a modulation signal of a modulation factor of 100%, a switching signal of an “L” level is output to the modulation circuit 12.

The control section 11 can automatically output the switching signal b of either “H” or “L” to the modulation circuit 12. That is, first, an “H” level switching signal b is output to the modulation circuit 12 to
%, And when communication by this is not possible, an "L" level switching signal b is output to the modulation circuit 12 to communicate with a modulation signal having a modulation factor of 100%. Conversely, first, an "L" level switching signal b is output to the modulation circuit 12 to make it communicate with a modulation signal having a modulation factor of 100%. The level switching signal b is output and communication is performed using a modulation signal having a modulation factor of 10%.

FIGS. 2A to 2D are timing charts showing timings of operation waveforms of the respective parts of the modulation circuit 12 when the switching signal b shown in FIG. 1 is at the "L" level.
(E) to (h) are time charts showing timings of operation waveforms of respective parts of the modulation circuit 12 when the switching signal b is at “H” level. The operation of the main part of the modulation circuit 12 will be described in more detail with reference to the block diagram of FIG. 1 and the time chart of FIG.

First, the block diagram of FIG. 1 and FIGS.
The situation where the modulation circuit 12 operates as a type A modulation circuit according to the waveform diagram of (d) will be described. Here, FIG. 2A is a waveform of a carrier signal c having a predetermined frequency output from the oscillator 40, FIG. 2B is a waveform of a transmission code a output from the control unit 11, and FIG. FIG. 2D shows the waveform of the power supply voltage VDD of the circuit DRV, and FIG. 2D shows the waveform of the modulated wave signal d.

The carrier signal c shown in FIG. 2A is output to the input side of the driver circuit DRV. Here, when performing type A modulation, since the switching signal b is set to the “L” level as described above, the variable power supply unit 41 generates a + 5V voltage in the modulation circuit 12 of FIG.
The voltage is constantly supplied as the power supply voltage VDD of the driver circuit DRV as shown in FIG.

Here, when the transmission code shown in FIG. 2B is at the "H" level (data value "1"), the "H"
The level signal is supplied to the driver circuit DR via the OR circuit OR2.
2D, the driver circuit DRV is output as shown in FIG.
The inverted signal of the carrier signal c is output as shown in FIG. A signal obtained by inverting the carrier signal c becomes a modulated wave signal d and is supplied to the matching circuit 14.

The transmission code shown in FIG.
In the case of the level (data value “0”), the “L” level signal is output to the driver circuit DRV via the OR circuit OR2, and the driver circuit DRV receives the carrier signal c from the oscillator 40. Also outputs an "H" level signal without outputting the carrier signal c as shown in FIG. This “H” level signal becomes a modulated wave signal d and is provided to the matching circuit 14.

Therefore, when the switching signal b shown in FIG. 1 is at the "L" level and the transmission code a is at the "H" level, an inverted signal of the carrier signal c is output as the modulated wave signal d, and the transmission code a becomes " When the signal is at the “L” level, the “H” level signal is output as the modulated wave signal d. That is, when the value of the transmission code a is "1", the amplitude of the carrier signal c shifts by 100%, and when the value of the transmission code a is "0", the amplitude of the carrier signal c does not shift. 1
2 is a type A that shifts the amplitude of the carrier signal c from 100% to 0% according to the values “1” and “0” of the transmission code a.
Will function as a modulation circuit.

Next, the block diagram of FIG. 1 and FIGS.
The situation where the modulation circuit 12 operates as a type B modulation circuit will be described with reference to the waveform diagram of (h). 2E shows the waveform of the carrier signal c, FIG. 2F shows the waveform of the transmission code a, FIG. 2G shows the waveform of the power supply voltage VDD of the driver circuit DRV, and FIG. Each waveform of the wave signal d is shown.

When the switching signal b shown in FIG. 1 is at the "H" level, the switching signal b at the "H" level is output to the driver circuit DRV via the OR circuit OR2. "H" of the transmission code b shown in 2 (f)
Regardless of the level and the “L” level, the carrier signal c from the oscillator 40 is inverted and output as shown in FIG.

On the other hand, since the "L" level switching signal b inverted by the inverter circuit INV1 is output to the OR circuit OR1 shown in FIG. 1, the OR circuit OR1 outputs the "H" level of the transmission code a. "H" according to "L" level
And outputs an L level signal. As a result, as described above, the variable power supply unit 41 supplies the + 5V voltage and the + 5V voltage in accordance with the “H” level and the “L” level of the transmission code a, respectively.
Generate a 4.1V voltage. Accordingly, when the transmission code a is at the “H” level, the +5 V voltage of the variable power supply unit 41 is applied as the power supply voltage VDD of the driver circuit DRV,
When the transmission code a is at the “L” level, the +4.1 V voltage of the variable power supply unit 41 is equal to the power supply voltage VDD of the driver circuit DRV.
Is applied.

That is, as shown in FIGS. 2 (f) and 2 (g), the power supply voltage VDD of the driver circuit DRV is changed from 5V to 4.0 in accordance with the "H" level and "L" level of the transmission code a. The voltage fluctuates to 1 V, and the fluctuation potential difference ΔV becomes 0.9 V. Therefore, the driver circuit DRV outputs the transmission code a
Carrier signal c according to the “H” level and “L” level of
A modulated wave signal d as shown in FIG. 2H in which the amplitude voltage shifts by ΔV is output to the matching circuit 14. Here, the amplitude voltage of the carrier signal c when the transmission code a is at the “L” level is 81.8% of the amplitude voltage of the carrier signal c when the transmission code a is at the “H” level. If the power supply voltage VDD of the driver circuit DRV is changed,
The amplitude of the carrier signal c is changed from 100% to 81.8% according to the “H” level and the “L” level of the transmission code a 18.2.
A modulated wave signal d shifted by% can be output, and thus the modulation circuit 12 functions as a type B modulation circuit.

In this embodiment, the degree of modulation is 100%
Although the modulation circuit that combines the above-mentioned modulation and the modulation with the modulation factor of 10% has been described, a modulation signal having a modulation factor other than the above can be generated by changing the power supply voltage of the driver circuit DRV as necessary. . In addition, the modulation degree 100
% In addition to the modulation signal having the modulation factor of 10% and the modulation signal having the modulation factor of
One or more different modulation schemes can be supported. Further, in this embodiment, an example in which the modulation circuit is applied to an IC card reader has been described, but the invention can be similarly applied to all devices having the modulation circuit.

[0039]

As described above, according to the present invention, in a modulation circuit for shifting the amplitude voltage of a carrier signal according to the value of a binary signal and outputting an amplitude shift keying signal, the carrier signal and the binary signal A first switch signal for inputting a signal and outputting a first amplitude shift keying signal for shifting the amplitude voltage of the carrier signal by a first voltage, and changing the amplitude voltage of the carrier signal to a first voltage. Driving means for selectively inputting a second switching signal for instructing output of a second amplitude shift keying signal for shifting by a second voltage smaller than a voltage, a third voltage and the third voltage A power supply unit that generates a smaller fourth voltage; and a control unit, wherein the control unit supplies a third voltage of the power supply unit to the driving unit when the driving unit is inputting the first switching signal. Apply as power supply voltage and output first amplitude shift keying signal In addition, when the driving means is inputting the second switching signal, a voltage corresponding to the value of the binary signal among the third and fourth voltages of the power supply section is generated and applied to the driving means as the power supply voltage. Since the second amplitude shift keying signal is output, if the present modulation circuit is mounted on a non-contact IC card reader, it is possible to accurately control each IC card accessible by a different amplitude shift keying signal. Data can be read / written by outputting an amplitude shift keying signal.

Also, the control means may be configured such that a binary signal is input to one input terminal, one of the first and second switching signals is input to the other input terminal, and the output terminal is An OR circuit instructing generation of one of the third and fourth voltages of the power supply unit connected to the power supply unit;
When the first switching signal is input, the switching signal is inverted and output to the OR circuit as a second switching signal. When the second switching signal is input, the switching signal is inverted and the first switching signal is inverted.
And an inverter circuit that outputs the switching signal to the OR circuit. Therefore, an accurate amplitude shift keying signal can be output with a simple and economical configuration. When the driving means receives the first switching signal, the driving means 2
Since the carrier signal is output / non-output in accordance with the value of the value signal and is output as the first amplitude shift keying signal, the driving means can output an accurate 100% amplitude shift keying signal. . Also, since either one of the first and second switching signals is automatically output to the driving means, the modulation circuit automatically outputs an accurate amplitude shift keying signal suitable for each IC card. Can output.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a modulation circuit according to the present invention.

FIG. 2 is an operation waveform diagram of each section of the modulation circuit.

FIG. 3 is a block diagram of a non-contact IC card reader / writer to which the modulation circuit is applied.

FIG. 4 is a block diagram of an IC card on which data is read / written by a non-contact IC card reader / writer.

FIG. 5 is an explanatory diagram of amplitude shift keying.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1: Non-contact IC card reader, 2: Upper device, 3: IC
Card, 11 control unit, 12 modulation circuit, 12A driving means, 12B control means, 13 demodulation circuit, 14 matching circuit, 15 resonance circuit, 31 wireless interface, 3
2 ... control circuit, 33 ... memory, 40 ... oscillator, 41 ... variable power supply unit, OR1, OR2 ... OR circuit, INV ... inverter circuit, DRV ... driver circuit, C1 ... capacitance element, L
1, L2 ... antenna coil.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Mineo Saito 2-3-2 Shimomeguro, Meguro-ku, Tokyo F-term in Tamura Electric Co., Ltd. 5B058 CA15 KA21 5K004 AA03 DA03 DA04 DD01

Claims (4)

[Claims] 1. A modulation circuit for outputting an amplitude shift keying signal by shifting an amplitude voltage of a carrier signal according to a value of a binary signal, wherein the carrier signal and the binary signal are input and at least the A first instruction for outputting a first amplitude shift keying signal for shifting the amplitude voltage of the carrier signal by a first voltage
And a second switching signal instructing to output a second amplitude shift keying signal for shifting the amplitude voltage of the carrier signal by a second voltage smaller than the first voltage. Driving means for performing at least a third voltage and a fourth voltage smaller than the third voltage.
And a third voltage of the power supply unit is applied as a power supply voltage to the driving unit when at least the driving unit is inputting a first switching signal, and a first amplitude shift is performed. A modulation signal is output, and when the driving unit is receiving the second switching signal, a voltage corresponding to the value of the binary signal is generated among the voltages of the power supply unit, and the power supply voltage is supplied to the driving unit. And a control means for outputting the second amplitude shift keying signal by applying the control signal. 2. The control device according to claim 1, wherein the control unit receives the binary signal at one input terminal,
One of the first and second switching signals is input to the other input terminal, and one of the third and fourth voltages of the power supply unit connected to the output terminal An OR circuit for instructing the occurrence of the first switching signal, and when the first switching signal is input, the switching signal is inverted and output to the OR circuit as a second switching signal, and when the second switching signal is input, the switching is performed. An inverter circuit for inverting a signal and outputting the inverted signal as a first switching signal to the OR circuit. 3. The first amplitude shifter according to claim 1, wherein, when the first switching signal is input, the driving unit outputs / non-outputs the carrier signal according to a value of a binary signal. A modulation circuit for outputting as a modulation signal. 4. The modulation circuit according to claim 1, further comprising a switching signal output unit that automatically outputs one of the first and second switching signals to the driving unit.