JP2001127156A - Manufacturing method for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To correct a bowing shape of a fine contact hole having a high aspect ratio to prevent a burying failure of an upper layer wiring layer. SOLUTION: After a fine opening part 12 reaching an underlayer wiring layer 9 is formed in an interlayer insulation film 10 by anisotropic etching by using a resist mask 11, a buried resist film 13 is formed within the opening part 12 to etch back the entire surface of the interlayer insulation film 10, whereby an upper part having a bowing shape of the opening part 12 is cut off to form a contact hole 14.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a contact hole.

[0002]

2. Description of the Related Art A conventional method for forming a contact hole in a semiconductor device will be described below with reference to FIG. First, an interlayer insulating film 3 made of a silicon oxide film is formed on the entire surface of a semiconductor substrate 1 on which an element is formed and a wiring layer 2 is formed (FIG. 7A), and a photoresist is formed on the entire surface of the interlayer insulating film 3. Membrane 4
Is applied and patterned using a lithography technique. Using the resist pattern 4 as a mask, the underlying interlayer insulating film 3 is etched and removed by, for example, anisotropic etching such as RIE to form an opening 5 reaching the wiring layer 2 in a predetermined region of the interlayer insulating film 3. (FIG. 7 (b)). Thereafter, the photoresist film 4 is removed to complete the contact hole (opening) 5.

In recent years, with the miniaturization and high integration of semiconductor elements, contact holes have become finer and have higher aspect ratios. In order to form such a contact hole with good dimensional controllability, first, a resist pattern 4 having high dimensional accuracy is formed by a thin photoresist film 4, and when the interlayer insulating film 3 is etched using the resist pattern 4 as a mask, the resist pattern By suppressing the retreat of the thin resist pattern 4 by etching at a relatively high selectivity with 4,
An opening 5 that is fine and has a high aspect ratio is opened (see FIG. 7).

[0004]

However, according to the conventional method for forming a contact hole, when etching the interlayer insulating film 3 with a relatively high selectivity with respect to the resist pattern 4, as shown in FIG. The diameter L1 is narrowed by the etching deposit below relatively (opening diameter L), and conversely, in the middle of the opening below, ions obliquely penetrating into the plasma in the opening 5 A phenomenon occurs in which the diameter L2 is expanded by hitting the side wall. Such a contact hole 5 called a bowing shape
It has been confirmed that the shape of frequently occurs when the opening diameter is 0.4 μm or less. When the contact hole 5 is formed in such a bowing shape, it is difficult to form an upper wiring layer connected to the wiring layer 2 via the contact hole 5 in a later step with good coverage. As shown in FIG. 8, it is difficult to completely bury the upper wiring layer 6 in the contact hole 5, and a cavity 7 is easily generated in the center of the upper wiring layer 6 in the contact hole 5. This cavity 7 is exposed to the surface layer, particularly when a plug is formed in the contact hole 5, and allows penetration of a wet liquid or the like, thereby significantly impairing device characteristics.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and eliminates the bowing shape of a fine contact hole so that an upper wiring layer can be formed without a cavity. It is an object of the present invention to obtain a semiconductor device which is formed with a proper coverage and has improved device characteristics and reliability.

[0006]

Means for Solving the Problems Claim 1 according to the present invention.
The method of manufacturing a semiconductor device according to the present invention includes a first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on a surface thereof, and a step of using a resist mask in a predetermined region of the interlayer insulating film. A second step of forming an opening reaching the surface of the conductive layer by anisotropic etching, forming a buried resist film to a predetermined height only in the opening, and etching the entire surface of the interlayer insulating film to a predetermined thickness. And a third step of backing.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on a surface thereof; A second step of forming an opening reaching the surface of the conductive layer by anisotropic etching using a resist mask in a predetermined region, removing the resist mask, and filling the opening again with a resist film. And then patterning to form a buried resist film having a predetermined height in the opening and a resist pattern having an opening slightly wider than the opening on the interlayer insulating film. A third step of etching and removing the above-mentioned opening peripheral region by a predetermined thickness from the film surface.

According to a third aspect of the present invention, in the method for manufacturing a semiconductor device according to the second aspect, the opening of the resist pattern formed in the third step has a diameter larger than that of the opening of the interlayer insulating film. It is 0.01 to 0.05 μm wider.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to third aspects.
In the third step, the etching of the interlayer insulating film is performed by anisotropic dry etching, and is performed to a height that does not lower the height of the buried resist film in the opening.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to third aspects.
In the third step, the interlayer insulating film is etched by isotropic wet etching, and is etched to a position equal to or lower than the height of the buried resist film in the opening.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to fifth aspects.
The diameter of the opening of the interlayer insulating film formed in the second step tends to decrease from the opening surface to a predetermined depth position A, and increases from the position A to a predetermined depth B. This is because the etching of the interlayer insulating film in the third step is performed to a depth exceeding the position A.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the etching of the interlayer insulating film in the third step is performed beyond the position A to near the position B. .

According to a eighth aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an interlayer insulating film over the entire surface of the semiconductor substrate having the conductive layer formed on the surface thereof; A resist mask is formed thereon, and an opening reaching the conductive layer surface is formed in a predetermined region of the interlayer insulating film by first anisotropic etching with a high selectivity to the resist mask. And a third step of again performing a second anisotropic etching process having a low selectivity with respect to the resist mask on the inner wall of the opening of the interlayer insulating film by using the resist mask again. Is provided.

According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device according to the ninth aspect, the opening of the interlayer insulating film formed in the second step is positioned at a predetermined depth A from the opening surface. Up to the predetermined position B from the position A, the diameter tends to increase.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the eighth or ninth aspect.
The surface layer of the conductive layer at the bottom of the opening of the interlayer insulating film is removed by the second anisotropic etching in the step.

In the method of manufacturing a semiconductor device according to the present invention, the conductive layer is a metal wiring layer and the surface layer is an antireflection film in lithography.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, Embodiment 1 of the present invention will be described in detail with reference to the drawings. 1 to 3
FIG. 4 is a sectional view showing a method for forming a contact hole according to the first embodiment of the present invention. First, an interlayer insulating film 10 such as TEOS or BPSG is formed on the entire surface of a semiconductor substrate 8 on which an element is formed and a wiring layer 9 as a conductive layer is formed on the surface.
It is formed with a thickness of 5 to 2.0 μm (FIG. 1). Next, a photoresist film 11 is applied on the entire surface of the interlayer insulating film 10 and is patterned using a lithography technique. Using this resist pattern 11 as a mask, the underlying interlayer insulating film 10
Is removed by anisotropic etching such as RIE with a relatively high selectivity to the resist pattern 11,
An opening 12 reaching the wiring layer 9 is formed in a predetermined region of the interlayer insulating film 10 with, for example, an opening diameter L of about 0.3 μm. As a result, the opening 12 is narrowed by the etching deposit below the opening surface (opening diameter dimension L), and conversely, ions obliquely penetrating obliquely into the plasma in the lower middle of the opening. To form a bowing shape that spreads out, that is, a depth position A (diameter L
The diameter dimension tends to decrease until 1), and the diameter dimension tends to increase from the position A to a depth position B (diameter dimension L2) in the middle of the opening (FIG. 2).

Next, the photoresist film 11 is removed, and a new photoresist film is again applied to the entire surface of the interlayer insulating film 10 by burying the opening 12 and exposed to the whole surface and developed, or anisotropically etched. By etching back or the like, a buried resist film 13 is formed leaving only a predetermined height only in the opening 12 (FIG. 3A).
Subsequently, the entire surface of the interlayer insulating film 10 is etched back to the vicinity of the depth position B where the diameter of the opening 12 is increased by anisotropic dry etching. At this time, if the etching is performed to a position lower than the height of the buried resist film 13, an etching residue adheres to the exposed side wall of the buried resist film 13 and adversely affects a subsequent process. At the position, complete etch back is completed. This is because if the buried resist film 13 in the previous step is formed beforehand to a height position equal to or lower than a desired end position (in this case, near the depth position B) in the entire surface etch back of the interlayer insulating film 10. good. By etching back the entire surface of the interlayer insulating film 10, the opening 12
Is only the portion below the depth position B (diameter L2),
The bowing shape is corrected, and the upwardly or vertically shaped contact hole 14 whose radial dimension tends to increase upward is completed (FIG. 3B). Thereafter, the buried resist film 13 in the contact hole 14 is removed, an upper wiring layer (not shown) connected to the wiring layer 9 via the contact hole 14 is formed, and a predetermined process is performed to complete a semiconductor device. I do.

In this embodiment, the interlayer insulating film 10 having the bowed opening 12 formed therein is formed by forming a buried resist film 13 in the opening 12 and etching back the entire surface to a predetermined thickness. A contact hole 14 is formed by cutting off the upper part where the diameter of the opening 12 is reduced. As a result, the bowing shape is corrected, and the upper wiring layer connected to the wiring layer 9 via the contact hole 14 in a later step can be formed with good coverage without causing poor filling or the like in the hole.

The entire surface of the interlayer insulating film 10 can be etched back by isotropic wet etching. In this case, the buried resist film 13 is formed beforehand to a height position equal to or higher than a desired end position in the entire surface etchback of the interlayer insulating film 10. This is because the etching progresses isotropically even from the inside of the opening 12 in the wet etching. Therefore, if the height of the buried resist film 13 is lower than the entire etch-back end position of the interlayer insulating film 10, the opening of the contact hole 14 is stopped. This is because there is an inconvenience that the bore size is greatly expanded.

In this embodiment, the interlayer insulating film 1
Since the entire etch back of 0 is set to the vicinity of the depth position B where the diameter of the opening 12 is increased, the contact hole 14 having an upward slope or a vertical shape is formed. On this occasion,
Since the thickness of the interlayer insulating film 10 is reduced, the interlayer insulating film 10
Is formed in consideration of the amount at the time of formation. In addition, although the variation in the film thickness increases, the interlayer insulating film 10 may be etched back to a lower position beyond the depth position B. Further, the etch back of the interlayer insulating film 10 can be performed to a position higher than the depth position B. In this case,
Etching is performed to a lower position beyond the depth position A (diameter L1) where the diameter is reduced. As a result, the diameter of the formed contact hole 14 does not become narrower than the opening surface at the upper portion, which is effective in improving the coverage in forming the upper wiring layer in a later step.

Embodiment 2 FIG. Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a sectional view showing a method for forming a contact hole according to the second embodiment of the present invention. First, similarly to the first embodiment, TEOS or BP is formed on the entire surface of the semiconductor substrate 8 on which the wiring layer 9 is formed.
An interlayer insulating film 10 such as SG is formed, and a resist mask 11 is formed.
The opening 12 reaching the wiring layer 9 is formed in the same bowing shape as in the first embodiment by anisotropic etching using (see FIGS. 1 and 2).

Next, the photoresist film 11 is removed, and a new photoresist film 15 is again applied to the entire surface of the interlayer insulating film 10 by filling the opening 12 and patterned by lithography. As a result, the photoresist film 15 immediately above the opening 12 is removed, and a buried resist film 15 a having a predetermined height is formed in the opening 12, and an opening slightly larger than the opening 12 (opening diameter L) is formed on the interlayer insulating film 10. Is formed. The mask used in this patterning may be the same as the mask used for the photoresist film 11 for forming the opening 12 in the previous step, but in this case, the opening of the resist pattern 15b may be changed by changing the exposure conditions, heating, or the like. Try to spread it slightly. Although it depends on the degree of density of the openings 12, it is desirable that the openings be larger in diameter by about 0.01 to 0.05 μm than the openings 12. The height of the buried resist film 15a can be controlled by setting the exposure time and the development time during patterning (FIG. 4A).

Subsequently, using the interlayer insulating film 10 as a mask with the photoresist films 15a and 15b as, for example, CHF ₃ / CF ₄
Anisotropic dry etching using a gas such as / Ar or CF ₄ / O ₂ removes the area around the opening 12 of the interlayer insulating film 10 from the film surface to the vicinity of the depth position B where the diameter dimension is increased. I do. Also in this case, similarly to the first embodiment, the formation of the buried resist film 15a in the previous process is
By setting the height up to a desired end position (in this case, near the depth position B) in the etching of the region around the opening 12 of the interlayer insulating film 10, the height equal to or higher than the height of the embedded resist film 15 a At the position, the etching of the interlayer insulating film 10 is completed. As a result, the opening 12 has its periphery expanded at a portion where the diameter is smaller than the depth position B (diameter L2), and the contact hole 16 whose bowing shape has been corrected is completed. (FIG. 4 (b)). Thereafter, the photoresist films 15a and 15b are removed, an upper wiring layer (not shown) connected to the wiring layer 9 through the contact hole 16 is formed, and a predetermined process is performed to complete a semiconductor device.

In this embodiment, the photoresist film 15
The interlayer insulating film 10 in the region around the opening 12 is removed by etching to the vicinity of the depth position B using the masks a and 15b as a mask. Then, a contact hole 16 is formed. As a result, the bowing shape is corrected, and the upper wiring layer connected to the wiring layer 9 via the contact hole 16 in a later step can be formed with good coverage without causing poor filling or the like in the hole. In addition, there is no variation in the thickness of the interlayer insulating film 10 and the opening 1
By using the resist pattern 15b having an opening slightly larger than 2 (opening diameter L), the diameter of the upper part of the opening 12 can be increased with controllable fine dimensions.
The contact hole 16 whose bowing shape has been corrected can be formed with high reliability.

In the second embodiment, as in the first embodiment, the height of the buried resist film 15a may be increased to etch the interlayer insulating film 10 by isotropic wet etching. it can. In that case, for example, a hydrofluoric acid solution of about 10: 1 is used. Also, as in the first embodiment, the etching end position of the interlayer insulating film 10 may be set to a position lower than the depth position B, or the depth position A (diameter dimension L1) and B may be different. It is good also as a position between.

Further, the contact holes 14,
Numeral 16 is provided on the same semiconductor substrate 8 in large numbers.
When the diameter size increases, the depth position B also becomes a lower lower position. Therefore, the etching end position of the interlayer insulating film 10 in the following first and second embodiments is set based on the contact holes 14 and 16 having the largest hole diameters. I do. At this time, since a contact hole having a diameter dimension exceeding about 0.4 μm does not have a bowing shape, if such a contact hole exists, the other hole diameters are about 0.4 μm.
The maximum value below μm is used as a reference.

Embodiment 3 Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 5 is a sectional view showing a method for forming a contact hole according to the third embodiment of the present invention. First, similarly to the first embodiment, TEOS or BP is formed on the entire surface of the semiconductor substrate 8 on which the wiring layer 9 is formed.
An interlayer insulating film 10 such as SG is formed, and a resist mask 11 is formed.
The opening 12a reaching the wiring layer 9 is formed by a first anisotropic etching such as RIE using GaN. At this time, for example, using a high-density plasma with a gas such as C ₄ F ₈ / O ₂ / CO / Ar, the interlayer insulating film 10 is formed with a relatively high selectivity such that the selectivity exceeds 5 with respect to the resist pattern 11.
Is etched, and in a predetermined region of the interlayer insulating film 10,
For example, a bowing-shaped opening 12a having an opening diameter L of about 0.3 μm is placed at a depth position A (diameter L
The diameter dimension is decreasing until 1), and the diameter dimension is formed to increase from the position A to the depth position B (diameter dimension L2) in the middle of the opening (FIG. 5A).

Next, using the resist mask 11 again, the interlayer insulating film 10 is subjected to an etching process by second anisotropic etching such as RIE. At this time, for example, C ₄ F ₈ / O
Using a gas such as ₂ / Ar, etching with a relatively low selectivity to the resist pattern 11 and high sputterability is performed to remove a portion of the inner wall of the opening 12a where the radial dimension in the interlayer insulating film 10 is reduced. Then, the contact hole 17 whose bowing shape has been corrected is completed. (FIG. 5 (b)).
Thereafter, the photoresist film 11 is removed, an upper wiring layer (not shown) connected to the wiring layer 9 via the contact hole 17 is formed, and a predetermined process is performed to complete a semiconductor device.

In this embodiment, the resist mask 11
After performing first etching with a high selectivity to the resist pattern 11 using the same resist mask 11, second etching with a low selectivity and high sputterability is performed using the same resist mask 11. First
In this etching, relatively large amount of fluorocarbon deposits are deposited on the inner side wall of the opening 12a. In the second etching, the above-mentioned deposits are small and the sputterability is set high. In the first etching, since the selectivity with the photoresist film 11 is high, fluctuations in the film thickness and the opening dimension L of the thin photoresist film 11 are suppressed, and the bowing shape of the opening 12a generated by the second etching is reduced to the second shape. It can be corrected by etching. This second etching is performed in the opening 1
Only a short process of correcting the bowing shape of the inner wall 2a is required, and the resist pattern 11 is hardly affected even if the selectivity with respect to the resist pattern 11 is low.

In addition, the thickness of the interlayer insulating film 10 does not fluctuate, the diameter of the upper portion of the opening 12a can be increased with a fine size with good controllability, and the contact hole 17 whose bowing shape is corrected can be formed with high reliability. The upper wiring layer connected to the wiring layer 9 via the contact hole 17 in a later step can be formed with good coverage without causing poor filling or the like in the hole.

If the diameter L2 at the depth B in the middle of the opening 12a becomes larger than the diameter L of the opening in the first etching, the photoresist film 11 in the second etching is removed. Etching is performed so that retreat occurs. This can be achieved by, for example, setting such that the O ₂ concentration is increased in a gas of C ₄ F ₈ / O ₂ / Ar.

Embodiment 4 FIG. Next, a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 6 is a sectional view showing a method for forming a contact hole according to the fourth embodiment of the present invention. In this embodiment, it is assumed that a wiring layer 9 made of aluminum or the like and an antireflection film 18 made of TiN or the like are formed on the surface. The anti-reflection film 18 prevents reflection of exposure light in lithography when patterning the wiring layer 9 and performs patterning with good dimensional control. An interlayer insulating film 10 is formed on a semiconductor substrate 8 on which such a wiring layer 9 is formed, and the fifth embodiment is described.
After the first etching with a high selectivity to the resist pattern 11 is performed by using the resist mask 11 in the same manner as in (1) (FIG. 6A), the sputtering is performed at a low selectivity using the same resist mask 11. The contact hole 17 is formed by performing a second etching with a high etching rate. In the second etching, the bowing shape of the contact hole 17 is corrected and the antireflection film 18 at the bottom of the contact hole 17 is removed (FIG. 6B).

In the first etching with a high selectivity to the resist pattern 11, not only the resist pattern 11 but also
The anti-reflection film 18 is not removed by etching because the surface of the wiring layer 9 at the etching point also has a high selectivity, but the second etching with a low selectivity and a high sputter property is performed, so that the bottom of the contact hole 17 is reflected. Prevention film 1
8 can be removed. Thereby, the anti-reflection film 18 having a relatively high resistance is removed at the contact portion, and the contact resistance between the upper wiring layer and the wiring layer 9 formed in a later step is reduced, thereby improving the reliability of the semiconductor device.

In this embodiment, the antireflection film 18 on the surface of the wiring layer 9 is removed by the second etching. However, the present invention is not limited to this, and the surface layer of the wiring layer 9 may be removed. It is possible. For example, if the surface of the wiring layer 9 at the bottom of the contact hole 17 is damaged and deteriorated by the first etching or the like or an etching product is attached, the surface layer of the wiring layer 9 is subjected to the second etching. By doing so, a highly reliable semiconductor device can be obtained.

[0036]

As described above, the method of manufacturing a semiconductor device according to the first aspect of the present invention comprises the first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on its surface. A second step of forming an opening reaching the surface of the conductive layer by anisotropic etching using a resist mask in a predetermined region of the interlayer insulating film, and a resist embedded to a predetermined height only in the opening. A third step of forming a film and etching back the entire surface of the interlayer insulating film with a predetermined thickness, so that a contact hole having a good shape can be formed;
The upper wiring layer connected to the conductive layer can be formed with good coverage without causing poor filling or the like in the hole,
A semiconductor device with improved device characteristics and reliability can be obtained.

According to a second aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on a surface thereof; A second step of forming an opening reaching the surface of the conductive layer by anisotropic etching using a resist mask in a predetermined region, removing the resist mask, and filling the opening again with a resist film. And then patterning to form a buried resist film having a predetermined height in the opening and a resist pattern having an opening slightly wider than the opening on the interlayer insulating film. And a third step of etching and removing the above-mentioned opening peripheral region from the film surface by a predetermined thickness, so that a contact hole having a good shape can be formed without changing the thickness of the interlayer insulating film. The upper wiring layer connected to the conductive layer can be formed with good coverage without causing such defective filling in the holes, the semiconductor device with improved device characteristics and reliability can be obtained.

According to a third aspect of the present invention, in the method for manufacturing a semiconductor device according to the second aspect, the opening of the resist pattern formed in the third step has a diameter larger than that of the opening of the interlayer insulating film. Because it is 0.01-0.05 μm wide,
The diameter of the upper portion of the opening can be enlarged with a fine size with good controllability, and a contact hole with a good shape can be formed with high reliability.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to third aspects.
In the third step, the etching of the interlayer insulating film is performed by anisotropic dry etching, and the etching is performed to a height that does not lower the height of the buried resist film in the opening. Holes can be formed.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to third aspects.
In the third step, the interlayer insulating film is etched by isotropic wet etching, and is etched to a position equal to or lower than the height of the buried resist film in the opening, so that reliable and reliable good etching is performed. A contact hole having a shape can be formed.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the first to fifth aspects.
The diameter of the opening of the interlayer insulating film formed in the second step tends to decrease from the opening surface to a predetermined depth position A, and increases from the position A to a predetermined depth B. Since the etching of the interlayer insulating film in the third step is performed to a depth exceeding the position A, the shape of the opening formed in the second step can be corrected in the third step. A contact hole having a shape can be formed.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the sixth aspect, the etching of the interlayer insulating film in the third step is performed beyond the position A to near the position B. The shape of the opening formed in the second step can be corrected in the third step, and a contact hole having a better shape can be formed.

According to a eighth aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an interlayer insulating film over the entire surface of the semiconductor substrate having the conductive layer formed on the surface thereof; A resist mask is formed thereon, and an opening reaching the conductive layer surface is formed in a predetermined region of the interlayer insulating film by first anisotropic etching with a high selectivity to the resist mask. And a third step of again performing a second anisotropic etching process having a low selectivity with respect to the resist mask on the inner wall of the opening of the interlayer insulating film by using the resist mask again. Therefore, a contact hole having a good shape can be formed without changing the thickness of the interlayer insulating film, and the upper wiring layer connected to the conductive layer can be buried in the hole without causing poor coverage. In can forming a semiconductor device with improved device characteristics and reliability can be obtained.

According to a ninth aspect of the present invention, in the method for manufacturing a semiconductor device according to the ninth aspect, the opening of the interlayer insulating film formed in the second step is positioned at a predetermined depth A from the opening surface. Since the diameter dimension is decreasing and the diameter dimension is increasing from the position A to a predetermined position B which is deeper, the opening shape formed in the second step can be corrected in the third step. A contact hole having a good shape can be formed.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the eighth aspect, wherein
By removing the surface layer of the conductive layer at the bottom of the opening of the interlayer insulating film by the second anisotropic etching in the step, the contact resistance can be reduced and the reliability of the semiconductor device can be further improved.

In the method of manufacturing a semiconductor device according to the present invention, the conductive layer is a metal wiring layer and the surface layer is an antireflection film in lithography. , The contact resistance with the metal wiring layer can be reduced, and the reliability of the semiconductor device can be further improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a first step of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a second step of the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a sectional view showing a third step of the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 4 is a sectional view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention;

FIG. 5 is a sectional view illustrating a method of manufacturing a semiconductor device according to a third embodiment of the present invention;

FIG. 6 is a sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 8 is a cross-sectional view illustrating a problem in a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

Reference Signs List 8 semiconductor device, 9 wiring layer as conductive layer, 10 interlayer insulating film, 11 resist pattern, 12 and 12a opening, 13 buried resist film, 14 contact hole, 15 resist film, 15a buried resist film, 15b resist pattern, 16 , 17 contact holes, 18 anti-reflection film.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 BB02 CC01 DD08 DD09 DD16 DD19 HH13 5F004 AA09 AA11 AA12 DA00 DA01 DA16 DA23 DA26 DB03 DB26 EA10 EA22 EA27 EA28 EB01 EB03 5F033 KK08 KK33 MM05 NN29 QQQ Q19 Q19 QQQ RR04 RR15 WW01 XX02

Claims (11)

[Claims] A first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on its surface; and an anisotropic etching using a resist mask in a predetermined region of the interlayer insulating film. A second step of forming an opening reaching the surface of the conductive layer by etching, and forming a buried resist film up to a predetermined height only in the opening and etching back the entire surface of the interlayer insulating film to a predetermined thickness. And a method for manufacturing a semiconductor device. 2. A first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on its surface, and an anisotropic etching using a resist mask on a predetermined region of the interlayer insulating film. A second step of forming an opening reaching the conductive layer surface, removing the resist mask, forming a resist film again over the entire surface by embedding the opening, and then patterning the resist film to form a predetermined portion in the opening. A buried resist film having a height of 10 mm and a resist pattern having an opening slightly wider than the opening on the interlayer insulating film, and etching the opening surrounding region of the interlayer insulating film with a predetermined thickness from the film surface. And a third step of removing. 3. The opening of the resist pattern formed in the third step has a diameter of 0.1 mm more than the opening of the interlayer insulating film.
3. The method for manufacturing a semiconductor device according to claim 2, wherein the width is from 01 to 0.05 [mu] m. 4. In the third step, the etching of the interlayer insulating film is performed by anisotropic dry etching,
4. The method of manufacturing a semiconductor device according to claim 1, wherein etching is performed to a height that does not lower the height of the buried resist film in the opening. 5. In the third step, the etching of the interlayer insulating film is performed by isotropic wet etching, and the etching is performed to a position equal to or lower than the height of the buried resist film in the opening. The method for manufacturing a semiconductor device according to claim 1. 6. The diameter of the opening of the interlayer insulating film formed in the second step tends to decrease from the opening surface to a predetermined depth position A, and from the position A to a predetermined deeper position B. 6. The semiconductor device according to claim 1, wherein the diameter dimension is increasing, and the etching of the interlayer insulating film in the third step is performed to a depth exceeding the position A. Production method. 7. The method for manufacturing a semiconductor device according to claim 6, wherein the etching of the interlayer insulating film in the third step is performed over the position A and near the position B. 8. A first step of forming an interlayer insulating film over the entire surface of a semiconductor substrate having a conductive layer formed on a surface thereof, and forming a resist mask on the interlayer insulating film; A second step of forming an opening reaching the surface of the conductive layer in a predetermined region of the interlayer insulating film by first anisotropic etching at a specific ratio, and then again using the resist mask to form the interlayer insulating film; A third step of performing a second anisotropic etching process having a low selectivity to the resist mask on the inner wall of the opening at a low selectivity and having a sputtering property. 9. The diameter of the opening of the interlayer insulating film formed in the second step tends to decrease from the opening surface to a predetermined depth A, and from the position A to a predetermined depth B deeper. 9. The method according to claim 8, wherein the diameter is increasing.
The manufacturing method of the semiconductor device described in the above. 10. The surface layer of the conductive layer at the bottom of the opening of the interlayer insulating film is removed by the second anisotropic etching in the third step.
The manufacturing method of the semiconductor device described in the above. 11. The method according to claim 10, wherein the conductive layer is a metal wiring layer, and the surface layer is an antireflection film in lithography.