JP2001125829A - コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法 - Google Patents

コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法

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Publication number
JP2001125829A
JP2001125829A JP30660599A JP30660599A JP2001125829A JP 2001125829 A JP2001125829 A JP 2001125829A JP 30660599 A JP30660599 A JP 30660599A JP 30660599 A JP30660599 A JP 30660599A JP 2001125829 A JP2001125829 A JP 2001125829A
Authority
JP
Japan
Prior art keywords
request
command
storage device
cancel
speculative
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30660599A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001125829A5 (enExample
Inventor
Atsushi Kanamaru
淳 金丸
Hideo Asano
秀夫 浅野
Akira Kihashi
昭 木橋
Koichi Kushida
弘一 櫛田
Takahiro Saito
高裕 齋藤
Uu Chichen
ウー チチェン
Kao Kelvin
カオ ケルビン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PROMISE TECHNOLOGY Inc
International Business Machines Corp
Original Assignee
PROMISE TECHNOLOGY Inc
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PROMISE TECHNOLOGY Inc, International Business Machines Corp filed Critical PROMISE TECHNOLOGY Inc
Priority to JP30660599A priority Critical patent/JP2001125829A/ja
Priority to US09/698,344 priority patent/US6721854B1/en
Publication of JP2001125829A publication Critical patent/JP2001125829A/ja
Publication of JP2001125829A5 publication Critical patent/JP2001125829A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/387—Information transfer, e.g. on bus using universal interface adapter for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
JP30660599A 1999-10-28 1999-10-28 コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法 Pending JP2001125829A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP30660599A JP2001125829A (ja) 1999-10-28 1999-10-28 コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法
US09/698,344 US6721854B1 (en) 1999-10-28 2000-10-27 Controller device, disk controller, auxiliary storage, computer device, and method for controlling auxiliary storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30660599A JP2001125829A (ja) 1999-10-28 1999-10-28 コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法

Publications (2)

Publication Number Publication Date
JP2001125829A true JP2001125829A (ja) 2001-05-11
JP2001125829A5 JP2001125829A5 (enExample) 2007-07-12

Family

ID=17959096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30660599A Pending JP2001125829A (ja) 1999-10-28 1999-10-28 コントローラ装置、ディスクコントローラ、補助記憶装置、コンピュータ装置、および補助記憶装置の制御方法

Country Status (2)

Country Link
US (1) US6721854B1 (enExample)
JP (1) JP2001125829A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7191308B2 (en) 2003-04-14 2007-03-13 Renesas Technology Corp. Memory device with preread data management
JP2010128887A (ja) * 2008-11-28 2010-06-10 Fujitsu Ltd 記憶装置，記憶システム及び制御方法
JP2013020697A (ja) * 2003-06-26 2013-01-31 Koninkl Philips Electronics Nv ライトワンス記憶媒体に情報を記録するレコーダ及び方法
JP2013061790A (ja) * 2011-09-13 2013-04-04 Toshiba Corp メモリデバイス
US9053056B2 (en) 2007-12-27 2015-06-09 Fujitsu Limited Control apparatus, storage system, and memory controlling method

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7346724B1 (en) 2002-06-28 2008-03-18 Cypress Semiconductor Corp. Enabling multiple ATA devices using a single bus bridge
US7206989B2 (en) 2002-11-20 2007-04-17 Intel Corporation Integrated circuit having multiple modes of operation
US7543085B2 (en) * 2002-11-20 2009-06-02 Intel Corporation Integrated circuit having multiple modes of operation
US7427027B2 (en) * 2004-07-28 2008-09-23 Sandisk Corporation Optimized non-volatile storage systems
US8341360B2 (en) 2005-12-30 2012-12-25 Intel Corporation Method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response
US20130151755A1 (en) 2011-12-12 2013-06-13 Reuven Elhamias Non-Volatile Storage Systems with Go To Sleep Adaption
US9411721B2 (en) 2013-11-15 2016-08-09 Sandisk Technologies Llc Detecting access sequences for data compression on non-volatile memory devices
JP2015203980A (ja) * 2014-04-14 2015-11-16 キヤノン株式会社 情報処理装置およびその制御方法、並びにプログラム
KR102680273B1 (ko) 2019-02-12 2024-07-01 삼성전자주식회사 서스펜드 모드를 제어하는 방법 및 이를 포함하는 메모리 컨트롤러

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6101577A (en) * 1997-09-15 2000-08-08 Advanced Micro Devices, Inc. Pipelined instruction cache and branch prediction mechanism therefor
US6134633A (en) * 1997-10-31 2000-10-17 U.S. Philips Corporation Prefetch management in cache memory
US6016533A (en) * 1997-12-16 2000-01-18 Advanced Micro Devices, Inc. Way prediction logic for cache array
JP3071752B2 (ja) * 1998-03-24 2000-07-31 三菱電機株式会社 ブリッジ方法、バスブリッジ及びマルチプロセッサシステム
US6446143B1 (en) * 1998-11-25 2002-09-03 Compaq Information Technologies Group, L.P. Methods and apparatus for minimizing the impact of excessive instruction retrieval

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7191308B2 (en) 2003-04-14 2007-03-13 Renesas Technology Corp. Memory device with preread data management
US7552311B2 (en) 2003-04-14 2009-06-23 Renesas Technology Corp. Memory device with preread data management
JP2013020697A (ja) * 2003-06-26 2013-01-31 Koninkl Philips Electronics Nv ライトワンス記憶媒体に情報を記録するレコーダ及び方法
US9053056B2 (en) 2007-12-27 2015-06-09 Fujitsu Limited Control apparatus, storage system, and memory controlling method
JP2010128887A (ja) * 2008-11-28 2010-06-10 Fujitsu Ltd 記憶装置，記憶システム及び制御方法
JP2013061790A (ja) * 2011-09-13 2013-04-04 Toshiba Corp メモリデバイス

Also Published As

Publication number Publication date
US6721854B1 (en) 2004-04-13

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