JP2001111357A - Signal synthesizing circuit and lsi for communications - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal synthesizing circuit for synthesizing an analog signal with a pulse signal. SOLUTION: This signal synthesizing circuit is provided with input resistors 77 and 78 for receiving an analog signal, first switches A1 and A2 for supplying the analog signal received through the input resistances to an operational amplifier 81, first constant current sources 11-14, second switches P1-P4 for supplying a pulse signal to the inversion input terminal of the operational amplifier, and a second constant current source 15 serially connected through the second switch to the first constant current source. Thus, the analog signal received through the input resistors is supplied to the inversion input terminal of the operational amplifier, and the pulse signal is supplied to the inversion input terminal of the operational amplifier circuit so that the synthesis of the analog signal and the pulse signal can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a signal synthesizing circuit for synthesizing a pulse signal and an analog signal, and a communication LSI including the same.

[0002]

2. Description of the Related Art A voice communication terminal device includes an antenna, a duplexer, a receiving circuit, a transmitting circuit, a speaker, and a microphone. A high-frequency signal received by the antenna is input to a receiving system circuit via a duplexer, where the signal is processed, whereby an audio signal is extracted, and a speaker is driven by the audio signal. Further, the audio signal input from the microphone is taken into the transmission system circuit and subjected to signal processing. After being converted into a high-frequency signal, the signal is transmitted to an antenna via a duplexer and emitted. The receiving system circuit is configured as follows.

An amplifier for amplifying a high-frequency signal taken in through a duplexer, a frequency converter for converting a high-frequency signal output from the amplifier to a low frequency,
A pre-filter for filtering the output signal of the frequency converter; and an AD converter for converting the output signal of the pre-filter to a digital signal. An equalizer for equalizing the output signal of the AD converter and a channel decoding circuit for performing a channel decoding process on the output signal of the equalizer are provided. Further, a speech decoding circuit that performs a speech decoding process on an output signal of the channel decoding circuit,
A digital filter for filtering an output signal of the speech decoding circuit, an audio DA converter for converting an output signal of the digital filter into an analog signal, and an amplifier for amplifying an output signal of the audio DA converter Is provided.

[0004] As an example of a document describing a voice communication terminal device, see "Mobile Communication Handbook (No. 1)" issued by Ohm Co., Ltd. on November 15, 1995.
05-).

[0005]

SUMMARY OF THE INVENTION In the above-mentioned voice communication terminal device, it has been required to synthesize and output a voice analog signal and a pulse signal for a doorbell.

However, in the conventional voice communication terminal device, since it is not necessary to sound the voice and the doorbell simultaneously, a circuit for synthesizing the analog signal and the pulse signal is not mounted.

The inventor of the present application has studied a circuit for synthesizing an analog signal and a pulse signal, and found that the analog signal and the pulse signal can be synthesized by adding the analog signal and the pulse voltage using an operational amplifier. However, in the case of the above voltage addition, a plurality of types of voltages having different levels are required, and an operational amplifier and a voltage dividing resistor circuit are indispensable as circuits for generating such voltages. It has been found that the occupied area increases.

An object of the present invention is to provide a signal synthesizing circuit for synthesizing an analog signal and a pulse signal.

Another object of the present invention is to reduce the chip occupation area of a signal combining circuit for combining an analog signal and a pulse signal.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

The following is a brief description of an outline of a typical invention among the inventions disclosed in the present application.

That is, an operational amplifier for amplifying an input signal, an input resistor for receiving an analog signal,
A first switch for supplying an analog signal captured via the input resistor to an inverting input terminal of the operational amplifier, a first constant current source for flowing a predetermined current, and the first constant current source. By intermittently coupling to the inverting input terminal of the operational amplifier, a second switch for supplying a pulse signal to the inverting input terminal of the operational amplifier is connected to the first constant current source via the second switch. The second connected in series
A signal synthesizing circuit includes the constant current source.

According to the above means, the analog signal taken in through the input resistor is supplied to the inverting input terminal of the operational amplifier, and the first constant current source is intermittently connected to the inverting input terminal of the operational amplifier. , A pulse signal is supplied to the inverting input terminal of the operational amplifier, and current addition of the input signal is performed. This achieves the synthesis of the analog signal and the pulse signal. Further, in such a configuration, the voltage dividing resistor indispensable for voltage addition and the operational amplifier for supplying a predetermined voltage thereto are not required, so that the chip occupation area can be reduced accordingly.

At this time, a pulse output mode for outputting only a pulse signal, an analog output mode for outputting an analog signal, and a combined output of a pulse signal and an analog signal are provided by a combination of ON and OFF of the first switch and the second switch. A switch control circuit for forming a combined pulse / analog output mode can be provided.

The constant current source and the second switch corresponding to the constant current source are provided in a plurality of systems, and can be individually turned on / off.

Further, a DA converter for converting a received signal into an analog signal, signal synthesizing means for synthesizing an output signal of the DA converter and a pulse signal, and an output signal of the DA converter When a communication LSI is configured to include a first driver for driving an external load on the basis of the above, and a second driver for driving an external load based on an output signal of the signal synthesizing means, As the signal combining means, a signal combining circuit can be applied.

[0017]

FIG. 1 shows a configuration example of a signal synthesizing circuit according to the present invention.

Input resistors 77, 78 having the same resistance value
Are connected in series. The analog signal is taken into the signal synthesis circuit 16 via the input resistor 77. Input resistance 77, 7
8 and the switch A at the other end of the resistor 78.
1, A2 are combined. When the switch A1 is turned on, an analog signal is taken in through the input resistor 77. However, when the switch A2 is turned on, the input resistance value is doubled, so that the input current is reduced by half. Become. An operational amplifier 81 for forming an inverting amplifier circuit is provided, and when the switch A1 or A2 is turned on, the audio DA is turned on.
The output signal of the converter 185 can be taken into the operational amplifier 81. A feedback resistor 82 is provided between the inverting input terminal and the output terminal of the operational amplifier 81. A predetermined analog reference voltage AVref is supplied to a non-inverting input terminal of the operational amplifier 81. Four constant current sources 11 to 14 are provided, and switches P1 to P4 for selectively coupling the constant current sources 11 to an inverting input terminal of the operational amplifier 81 are provided.

A constant current source 11 and a switch P1 are connected in series, a constant current source 12 and a switch P2 are connected in series,
The constant current source 13 and the switch P3 are connected in series, and the constant current source 14 and the switch P4 are connected in series. The constant current source 15 is connected in series to the switches P1 to P4, and the other end of the switches A1 and A2 and the inverting input terminal of the operational amplifier 81 are connected to this series connection point.

Although not particularly limited, the resistors 77, 7
The value of 8,82 is "R".

A switch control circuit 25 is provided for controlling the operations of the switches A1, A2, P1 to P4 to form a pulse output mode, an analog output mode, and a pulse / analog composite output mode. Although this switch control circuit 25 is not particularly limited, the communication LS
It includes a frequency dividing circuit for dividing the frequency of a pulse signal generated by an oscillator such as a crystal oscillator arranged outside I, and a logic circuit for obtaining various logical conditions.

FIG. 2 shows the output mode of the signal synthesizing circuit 187 and the switches A1, A2, P1, P at that time.
2, the states of P3 and P4 are shown.

In the pulse output mode, switch A
In the state where the switches A1 and A2 are turned off, the switch P1
P4 are simultaneously turned on and off by a pulse signal of a predetermined frequency. As a result, a pulse signal is output from the operational amplifier 81.

In the analog output mode, a current of I3 = I0 × 2 is always supplied to the ground GN from the inverting input terminal of the operational amplifier 81 for outputting the low level of the pulse signal.
D is flowing. The switches P1 and P2 are turned on in order to cancel the current I3. To set the input resistance value as viewed from the analog input terminal Ain to R, the switch A1 is turned on.
Switches P3, P4, and A2 are turned off.

When a composite signal of a pulse signal and an analog signal is output, only the switches P1 and P2 are controlled on / off by a pulse signal of a predetermined frequency. At this time,
When the switch P3 is turned on and the switch P4 is turned off, the pulse signal has a half amplitude around the analog center voltage. Similarly, for an analog signal from the analog input terminal Ain, the switch A1 is turned off and the switch A
By turning on 2 to make the input resistance 2R,
Assume that the amplitude of the analog signal is １ ／.

FIG. 3 shows the signal synthesizing circuit 1 shown in FIG.
6 shows a circuit to be compared.

The signal synthesizing circuit 36 shown in FIG. 3 includes an operational amplifier 37, a voltage dividing resistor 38, and switches P11 to P14 for coupling taps of the voltage dividing resistor 38 to a non-inverting input terminal of the operational amplifier 81; A switch P15 for supplying the analog reference voltage AVref to the non-inverting input terminal of the operational amplifier 81 is provided. The switch control circuit controls the operation of the switches A1, A2, P11 to P15.

FIG. 4 shows the output mode of the signal synthesizing circuit 36 and the switches A1, A2, P11, P at that time.
12, P13, P14, and P15 are shown.

The combination of switches forms a pulse output mode, an analog output mode, and a pulse / analog combined output mode. In particular, switches P12, P
13 is turned on / off by an input pulse signal, and a voltage obtained by the on / off control is transmitted to a non-inverting input terminal of the operational amplifier 81.

However, in the configuration shown in FIG.
The operational amplifier 37 and the voltage dividing resistor 38 generate a plurality of types of voltages having different levels from each other,
Since Vref is selected by the switches P11 to P15, the operational amplifier 37 and the voltage dividing resistor 38 must be provided, so that the chip occupied area of that portion is inevitably increased.

On the other hand, in the circuit configuration shown in FIG. 1, a circuit for realizing the pulse output mode includes constant current sources 11 to 14 and switches P1 to P4. Since the addition with the analog signal is performed by the current addition, the components corresponding to the operational amplifier 37 and the voltage dividing resistor 38 shown in FIG. 3 are not required. Therefore, the area occupied by the chip can be reduced, and the current consumption can be reduced.

Next, a case where the above-described signal synthesis circuit is applied to a communication LSI will be described.

FIG. 5 shows a voice communication terminal device including a communication LSI according to the present invention.

Although the voice communication terminal device shown in FIG. 5 is not particularly limited, the antenna 143, the duplexer 14
4, a receiving system circuit 141, a transmitting system circuit 142, speakers 145 and 150 as external loads, and a microphone 146. The high-frequency signal received by the antenna 143 is input to the reception system circuit 141 via the duplexer 144, where signal processing is performed, and the speakers 145, 150 are driven based on the processing result. The audio signal input from the microphone 146 is transmitted to the transmission circuit 1
The signal is taken in by 42 and processed. After being converted into a high-frequency signal, the signal is transmitted to the antenna 143 via the duplexer 144 and emitted.

The receiving circuit 141 is configured as follows.

An amplifier (LNA) 147 for amplifying the high-frequency signal taken in through the duplexer 144;
A frequency converter 149 for converting a high-frequency signal output from the amplifier 147 to a low frequency, two pre-filters 148 for filtering an output signal of the frequency converter 149, and two pre-filters Two systems of AD converters 171 and 172 for converting the output signal of 148 into a digital signal are provided. Then, an equalizer 181 for equalizing the output signals of the two AD converters 171 and 172, and a channel decoding circuit 182 for performing a channel decoding process on the output signals of the equalizer 181
Is provided. Further, a speech decoding circuit 183 for performing a speech decoding process on an output signal of the channel decoding circuit 182, a digital filter 184 for performing a filtering process on an output signal of the speech decoding circuit 183, and an output of the digital filter 184. An audio D / A converter (DAC) 185 for converting a signal into an analog signal, and a speaker 14 based on an output signal of the audio D / A converter 185
186, a signal synthesizing circuit 187 for synthesizing the output signal of the audio DA converter 185 and the pulse signal, and a driver for driving the speaker 150 based on the output signal of the signal synthesizing circuit. 188 are provided.

The A / D converters 171 and 172 have the same configuration. Each of the A / D converters 171 and 172 has an A / D converter (ADC) 10 for converting an analog signal into a digital signal. And an offset canceling circuit 21 for canceling the offset voltage of the AD converter 10 based on the output signal of the digital filter 20.

Although not particularly limited, the receiving circuit 141 and the transmitting circuit 142 are formed on a single semiconductor substrate such as a single crystal silicon substrate by a known semiconductor integrated circuit manufacturing technique.

FIG. 6 shows a configuration example of the audio DA converter 185 and the audio synthesizing circuit 187.

The audio DA converter 185 is configured as follows.

P-channel type MOS transistors 68 and 69 for forming a constant current source, a switch 70 which is turned on / off according to transmitted digital data, an n-channel type MOS transistor 73 for forming a constant current source,
74 are connected in series. Operational amplifier 7 for taking in the drain electrode of n-channel MOS transistor 73
5 are provided. The output signal DAo of the operational amplifier 75
ut is transmitted to the driver 186 shown in FIG.
A feedback resistor 76 is connected to the output terminal and the inverting input terminal of the operational amplifier 75, and the analog reference voltage AVref is connected to the non-inverting input terminal of the operational amplifier 75.
Is supplied.

The signal synthesizing circuit 187 is configured as follows.

The input resistors 77 and 78 are connected in series. One end of the input resistor 77 is coupled to the output terminal of the audio DA converter 185. Where the input resistors 77 and 78 are connected in series,
Switches A1 and A2 are coupled to the other end of the resistor 78. An operational amplifier 81 is provided, and the output signal of the audio DA converter 185 can be taken into the operational amplifier 81 with the switch A1 or A2 turned on. The operational amplifier 8 forms an inverting amplifier circuit. A feedback resistor 82 is provided between an inverting input terminal and an output terminal of the operational amplifier 81, and a predetermined analog reference voltage AVref is supplied to a non-inverting input terminal of the operational amplifier 81.

The p-channel MOS transistor 84,
88 and a switch P1 are connected in series, p-channel MOS transistors 85 and 89 and a switch P2 are connected in series, and p-channel MOS transistors 86 and 9 are connected.
0 and the switch P3 are connected in series to form a p-channel type MO.
S transistors 87 and 91 and switch P4 are connected in series. P-channel type MOS transistors 84 and 8
8, 85, 89, 86, 90, 87 and 91 form first constant current sources 11 to 14, respectively. The n-channel MOS transistors 79 and 80 are connected in series to the switches P1 to P4. The other ends of the switches A1 and A2 and the inverting input terminal of the operational amplifier 81 are connected to the series connection.

Although not shown in FIG. 5, a bias circuit 190 for supplying a bias current to the audio DA converter 185 is provided. In this example, the bias current of the bias circuit 190 is also supplied to the signal synthesis circuit 187. That is, the signal synthesis circuit 187
Instead of providing a new dedicated bias circuit,
The bias circuit 190 for the A converter 185 is also used in the signal synthesis circuit 187. As described above, the bias circuit 190 is shared by the audio DA converter 185 and the signal synthesizing circuit 187, thereby preventing an increase in circuit scale.

The bias circuit 190 is configured as follows.

An operational amplifier 61 and a depletion type n-channel MOS transistor 62 whose operation is controlled by an output signal of the operational amplifier 61 are provided. The drain electrode of the n-channel MOS transistor 62 is coupled to the high potential power supply Vdd via the p-channel MOS transistor 65, and
The source electrode of the S transistor 65 is connected to the ground GND via the resistor 63. p-channel type MOS
A p-channel MOS transistor 66 is current mirror-coupled to transistor 65. The p-channel MOS transistor 66 is connected to a p-channel MOS
Transistor 67 is connected in series, and n-channel MOS transistor 72 is further connected in series. A differential circuit 64 for driving the p-channel MOS transistor 67 according to the potential difference between the drain electrodes of the p-channel MOS transistors 65 and 66 is provided. The n-channel MOS transistor 74 in the audio DA converter 185 is current mirror-coupled to the n-channel MOS transistor 72. A differential circuit 71 for driving the n-channel MOS transistor 73 according to the potential difference between the drain electrodes of the n-channel MOS transistors 72 and 74 is provided.

The p-channel type MOS transistors 68, 69, 84, 88, 85,
89, 86, 90, 87 and 91 are connected in parallel to the p-channel MOS transistors 66 and 67, so that the p-channel MOS transistors 66 and
A current equal to the current flowing through 67 flows. Similarly, the n-channel MOS transistors 79 and 80 constituting the constant current sources are connected in parallel to the n-channel MOS transistors 73 and 74, respectively.
A current equal to the current flowing through the device flows.

FIG. 7 shows the output mode of the signal synthesizing circuit 187 and the switches A1, A2, P1, P at that time.
2, the states of P3 and P4 are shown. FIG. 8 shows operation waveforms of main parts.

As shown in FIG. 7, the signal synthesizing circuit 18
The output modes in 7 include a pulse output mode, an analog output mode, a pulse / analog combined output mode, and a reference voltage output mode. The various modes are formed by the switches A1, A2, P1 to P4 being operation-controlled by the switch control circuit 25.

In the pulse output mode, switch A
1 and A2 are turned off, the switch P
1 and P2 are on / off controlled by a pulse signal 801 at a frequency A, and switches P3 and P4 are on / off controlled by a pulse signal 802 at a frequency B. Since the switches A1 and A2 are turned off, the audio DA converter 18
5 is not input to the signal synthesis circuit 187. The switches P1 and P2 are on / off controlled by the pulse signal of the frequency A, and the switches P3 and P4 are on / off controlled by the pulse signal of the frequency B. The pulse signal output from the operational amplifier 81 is indicated by 804 in FIG. As in the pulse signal 80
1,802 are combined.

In the analog output mode, the switch A1 is turned on, and the switches P1 and P2 are turned on. Switches A2, P3 and P4 are turned off. In this state, when the analog signal (sine wave) 803 from the audio DA converter 185 is input, the output signal from the operational amplifier 81 becomes a sine wave analog signal 805.

In the pulse / analog composite output mode, the switch P2 is turned on, the signal 801 of the frequency A is input to the switch P1, and the frequency B is input to the switch P1.
Is input. The switch A1 is turned off, and the switch A2 is turned on. In this case, the output from the operational amplifier 81 is a pulse signal 804
And the analog signal 803 are combined.

In the reference voltage output mode, the switches P1, P3, A1, A2 are turned off and the switches P2, P4 are turned on. In this mode, a certain amount of current flows in the circuit, and the mode can be promptly changed from this mode to the pulse output mode or the analog output mode.

According to the above example, the following functions and effects can be obtained.

An analog signal fetched via the input resistor 77 or 78 is supplied to the inverting input terminal of the operational amplifier 81, and the constant current sources 11 to 14 are intermittently coupled to the inverting input terminal of the operational amplifier 81. Then, the pulse signal is supplied to the inverting input terminal of the operational amplifier 81, and the current of the input signal is added. Thereby, synthesis of the analog signal and the pulse signal is performed. Further, at this time, since the voltage dividing resistor 38 indispensable for voltage addition and the operational amplifier 37 for supplying a predetermined voltage thereto are not required, the chip occupation area of the communication LSI is reduced accordingly. be able to.

Although the invention made by the inventor has been specifically described above, the present invention is not limited to this, and it goes without saying that various modifications can be made without departing from the gist of the invention.

In the above description, the case where the invention made by the present inventor is mainly applied to a communication LSI which is a field of application as a background has been described. However, the present invention is not limited to this, and various types of semiconductors can be used. It can be applied to integrated circuits.

The present invention can be applied on condition that at least an analog signal and a pulse signal are input.

[0060]

The effects obtained by typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, the analog signal captured via the input resistor is supplied to the inverting input terminal of the operational amplifier,
The first constant current source is coupled to the inverting input terminal of the operational amplifier according to the pulse signal, so that the analog signal and the pulse signal can be synthesized. In such a circuit, since the current addition of the input signal is performed, a voltage dividing resistor and an operational amplifier for supplying a predetermined voltage to the voltage dividing resistor are not required, and the chip occupied area is accordingly reduced. Reduction can be achieved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram illustrating a configuration example of a signal synthesis circuit according to the present invention.

FIG. 2 is an explanatory diagram of output modes and switch states in the signal processing circuit shown in FIG.

FIG. 3 is a circuit diagram showing a configuration example of a circuit to be compared with the circuit shown in FIG. 1;

FIG. 4 is an explanatory diagram of an output mode and a switch state in the circuit shown in FIG. 3;

FIG. 5 is a block diagram illustrating a configuration example of a voice communication terminal device to which the communication LSI according to the present invention is applied;

FIG. 6 is a circuit diagram illustrating a configuration example of a main part of the communication LSI.

FIG. 7 is an explanatory diagram of an output mode and a switch state in the circuit shown in FIG. 6;

8 is an operation waveform diagram of a main part in the circuit shown in FIG.

[Explanation of symbols]

 77, 78 Input resistance 11 to 14 Constant current source 15 Constant current source 81 Operational amplifier P1 to P4 Switch A1, A2 switch

Continued on the front page (72) Inventor Shigetoshi Aoki 1-1 Nishiyokote-cho, Takasaki-shi, Gunma F-term in Hitachi Eastern Semiconductor Co., Ltd. 5J092 AA03 AA11 AA47 AA51 AA57 CA92 FA18 HA39 KA01 TA01 TA02 TA06 VL03 VL04 5K027 AA04 AA10 AA11 BB14 DD14 DD16 FF29 HH19 MM04

Claims (4)

[Claims] 1. A signal synthesizing circuit for synthesizing an analog signal and a pulse signal, comprising: an operational amplifier for amplifying an input signal; an input resistor for receiving an analog signal; A first switch for supplying a fetched analog signal to an inverting input terminal of the operational amplifier, a first constant current source for flowing a predetermined current, and an inverting input of the operational amplifier for the first constant current source. A second switch for supplying a pulse signal to an inverting input terminal of the operational amplifier, and the first switch via the second switch.
A second constant current source connected in series to the constant current source. 2. A signal synthesizing circuit for synthesizing an analog signal and a pulse signal, comprising: an operational amplifier for amplifying an input signal; an input resistor for receiving an analog signal; A first switch for supplying a fetched analog signal to an inverting input terminal of the operational amplifier, a first constant current source for flowing a predetermined current, and an inverting input of the operational amplifier for the first constant current source. A second switch for supplying a pulse signal to an inverting input terminal of the operational amplifier, and the first switch via the second switch.
A second constant current source connected in series to a constant current source, a pulse output mode for outputting only a pulse signal by a combination of ON and OFF of the first switch and the second switch, an analog output mode for outputting an analog signal, and a pulse signal And a switch control circuit for forming a pulse / analog combined output mode for combining and outputting a combined analog signal. 3. The first constant current source and the second switch corresponding thereto are provided in a plurality of systems, and when the switches are turned on, the corresponding first constant current sources are connected in parallel with each other. The signal synthesis circuit according to claim 1. 4. A DA converter for converting a received audio signal into an analog signal, and signal synthesizing means for synthesizing the analog signal output from the DA converter and a pulse signal for a doorbell. A first driver for driving an external load based on an output signal of the DA converter;
A second driver for driving an external load based on the output signal of the signal synthesizing means.
4. A communication LSI comprising the signal combining circuit according to claim 1 as said signal combining means.