JP2001110763A5 - - Google Patents

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JP2001110763A5
JP2001110763A5 JP1999287682A JP28768299A JP2001110763A5 JP 2001110763 A5 JP2001110763 A5 JP 2001110763A5 JP 1999287682 A JP1999287682 A JP 1999287682A JP 28768299 A JP28768299 A JP 28768299A JP 2001110763 A5 JP2001110763 A5 JP 2001110763A5
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Japan
Prior art keywords
semiconductor wafer
grindstones
polishing tool
circular
grindstone
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JP1999287682A
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Japanese (ja)
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JP2001110763A (en
JP3847500B2 (en
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Priority to JP28768299A priority Critical patent/JP3847500B2/en
Priority claimed from JP28768299A external-priority patent/JP3847500B2/en
Publication of JP2001110763A publication Critical patent/JP2001110763A/en
Publication of JP2001110763A5 publication Critical patent/JP2001110763A5/ja
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Publication of JP3847500B2 publication Critical patent/JP3847500B2/en
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Claims (6)

半導体基板の表面にパターンを形成した半導体ウェハに研磨加工具を押し付け前記半導体ウェハと前記研磨加工具を相対運動させ平坦化する工程において、上記半導体ウェハをウェハ保持具に保持し酸化セリウム砥粒と前記砥粒を結合するための物質からなる円形またはリング形状の、2つまたはそれ以上の砥石を含む研磨加工具を同心円状に配置し、上記同心円状の砥石の内の少なくとも一つの砥石は他の砥石と回転方向が異なるように同時かつ独立に運動させ、上記半導体ウェハの表面には少なくとも2つ以上の上記同心円状の砥石が接触するようにして平坦化研磨を行うことを特徴とする半導体装置の製造方法。In the step of planarizing is relative motion between the semiconductor wafer pressed against the polishing tool to the semiconductor wafer the polishing tool to form a pattern on the surface of the semiconductor substrate, the semiconductor wafer held in the wafer holder, the cerium oxide abrasive grains And a circular or ring-shaped polishing tool comprising two or more grindstones made of a substance for binding the abrasive grains, are arranged concentrically, and at least one grindstone among the concentric grindstones is It is simultaneously and independently moved so that the rotation direction is different from that of the other grindstones, and at least two or more of the concentric grindstones are in contact with the surface of the semiconductor wafer to perform planarization polishing. A method for manufacturing a semiconductor device . 半導体基板の表面にパターンを形成した半導体ウェハに研磨加工具を押し付け前記半導体ウェハと前記研磨加工具とを相対運動させ平坦化する工程において、上記半導体ウェハをウェハ保持具に保持し、酸化セリウム砥粒と前記砥粒を結合するための物質からなる円形状の、2つまたはそれ以上の砥石を含む研磨加工具を回転定盤上に配置し、上記円形状の砥石を上記回転定盤の回転方向と逆方向に回転させ、上記半導体ウェハの表面には少なくとも2つ以上の上記円形状の砥石が接触するようにして平坦化研磨を行うことを特徴とする半導体装置の製造方法。 In the step of pressing the polishing tool against the semiconductor wafer having a pattern formed on the surface of the semiconductor substrate and causing the semiconductor wafer and the polishing tool to move relative to each other and planarize the semiconductor wafer, the semiconductor wafer is held by the wafer holder, and the cerium oxide abrasive A polishing tool including two or more circular grindstones made of a substance for bonding grains and the abrasive grains is disposed on a rotating platen, and the circular grindstone is rotated by the rotating platen. A method of manufacturing a semiconductor device, comprising: rotating in a direction opposite to the direction and performing planarization polishing so that at least two or more of the circular grindstones are in contact with the surface of the semiconductor wafer . 上記半導体ウェハについて、その直径が200mm以上であることを特徴とする上記請求項1または2記載の半導体ウェハ平坦化加工方法。 3. The semiconductor wafer flattening method according to claim 1, wherein the semiconductor wafer has a diameter of 200 mm or more. 上記半導体ウェハを研磨加工具へ押しつける圧力が150g/cm2以上であることを特徴とする上記請求項1または2記載の半導体ウェハ平坦化加工方法。 3. The semiconductor wafer flattening method according to claim 1, wherein a pressure for pressing the semiconductor wafer against a polishing tool is 150 g / cm 2 or more. 表面にパターンを形成した半導体ウェハに研磨加工具を押し付け前記半導体ウェハと前記研磨加工具を相対運動させ、上記パターンを平坦化する装置において、上記半導体ウェハを保持するウェハ保持具と、酸化セリウム砥粒と前記砥粒を結合するための物質からなる円形またはリング形状の、2つまたはそれ以上の砥石を同心円状に配置した研磨加工具とからなり、上記同心円状の砥石の少なくとも一つの砥石は他の砥石と回転方向が異なるように同時かつ独立に回転を行い、上記半導体ウェハの表面には少なくとも2つ以上の上記同心円状の砥石が接触するよう上記同心円状の砥石を配置したことを特徴とする半導体ウェハの平坦化加工装置。In an apparatus for pressing a polishing tool against a semiconductor wafer having a pattern formed on the surface thereof and causing the semiconductor wafer and the polishing tool to move relative to each other to flatten the pattern, a wafer holder for holding the semiconductor wafer, and a cerium oxide abrasive A polishing tool in which two or more circular or ring-shaped grindstones made of a substance for binding the grains and the abrasive grains are arranged concentrically, and at least one grindstone of the concentric grindstone is Rotating simultaneously and independently so that the direction of rotation differs from that of the other grindstones, and arranging the concentric grindstones so that at least two or more of the concentric grindstones contact the surface of the semiconductor wafer. A semiconductor wafer flattening apparatus. 表面にパターンを形成した半導体ウェハに研磨加工具を押し付け前記半導体ウェハと前記研磨加工具を相対運動させ、上記パターンを平坦化する装置において、上記半導体ウェハを保持するウェハ保持具と、酸化セリウム砥粒と前記砥粒を結合するための物質からなる円形状の、2つまたはそれ以上の砥石を回転定盤上に配置した研磨加工具とからなり、上記円形状の砥石を上記回転定盤の回転方向と逆方向に上記円形状の砥石の中心軸を中心に回転させ、上記半導体ウェハの表面には少なくとも2つ以上の上記円形状の砥石が接触するよう上記円形状の砥石を上記回転定盤上に配置したことを特徴とする半導体ウェハの平坦化加工装置。 In an apparatus for pressing a polishing tool against a semiconductor wafer having a pattern formed on the surface thereof and causing the semiconductor wafer and the polishing tool to move relative to each other to flatten the pattern, a wafer holder for holding the semiconductor wafer, and a cerium oxide abrasive A polishing tool in which two or more circular grindstones made of a substance for bonding the grains and the abrasive grains are arranged on a rotating platen, and the circular grindstone of the rotating platen The circular grindstone is rotated about the central axis of the circular grindstone in a direction opposite to the rotation direction, and the circular grindstone is rotated and fixed so that at least two or more circular grindstones are in contact with the surface of the semiconductor wafer. A flattening apparatus for a semiconductor wafer, which is arranged on a board .
JP28768299A 1999-10-08 1999-10-08 Semiconductor wafer flattening processing method and flattening processing apparatus Expired - Fee Related JP3847500B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28768299A JP3847500B2 (en) 1999-10-08 1999-10-08 Semiconductor wafer flattening processing method and flattening processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28768299A JP3847500B2 (en) 1999-10-08 1999-10-08 Semiconductor wafer flattening processing method and flattening processing apparatus

Publications (3)

Publication Number Publication Date
JP2001110763A JP2001110763A (en) 2001-04-20
JP2001110763A5 true JP2001110763A5 (en) 2005-02-17
JP3847500B2 JP3847500B2 (en) 2006-11-22

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JP28768299A Expired - Fee Related JP3847500B2 (en) 1999-10-08 1999-10-08 Semiconductor wafer flattening processing method and flattening processing apparatus

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JP (1) JP3847500B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5676832B2 (en) * 2001-06-08 2015-02-25 エルエスアイ コーポレーション Defect density reduction method and slurry flow rate control method in chemical mechanical polishing of semiconductor wafer
CN112091809B (en) * 2014-10-03 2022-11-29 株式会社荏原制作所 Processing assembly and processing method
JP7317532B2 (en) * 2019-03-19 2023-07-31 キオクシア株式会社 Polishing device and polishing method

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