JP2001103076A - Analyzing method for ieee1394 bus and interface circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To analyze events on an IEEE1394 serial bus that is set between electronic equipment of a system which is actually used. SOLUTION: A physical layer LSI 37, which is connected to the IEEE1394 bus, is prepared together with a data capturing circuit 22X which is connected to the layer LSI 37 via a signal line and captures the data included in signals existing on the signal line for analyzing the data and a coupling tool (a plug or socket) 38 which is connected to the layer LSI 37 and also connected to a coupling tool (plug or socket) 39, where a physical layer LSI of an IEEE1394 bus interface 10 is mounted. Then both tools 39 and 38 are connected and the data included in the signals which are transferred between nodes 10 and 13 are captured by the circuit 22X and analyzed by an IEEE1394 bus analyzer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to a bus analysis method and an interface circuit.

[0002]

2. Description of the Related Art A high-speed serial bus of the IEEE 1394 standard (hereinafter referred to as a 1394 bus) is used to connect electronic devices, for example, a computer and its peripheral devices with a small number of wires and transfer data at a high speed. Used.

[0003] For example, as shown in FIG.
Computer 10 and digital video camera 11 for transferring data between
1394 bus interface circuit (node)
12 and 13 are connected, and a 1394 cable 1 is connected between them.
4 are connected. The configurations of the 1394 bus interface circuits 12 and 13 differ depending on the configurations of the interface circuits mounted on the computer 10 and the digital video camera 11, respectively. When developing the 1394 bus interface circuit 13, it is necessary to capture data on the 1394 cable 14 and analyze the data.

Conventionally, as shown in FIG. 9, a 1394 bus analysis interface circuit 15 is arranged between the 1394 bus interface circuits 12 and 13, and the interface circuits 13 and 15 are connected by a 1394 cable 14A.
1394 cable 14B is connected to 1394 bus analysis interface circuit 15 by connecting 1394 cable 14B between interface circuits 12 and 15;
The validity of the data on four buses was verified.

[0005]

However, since the 1394 bus analysis interface circuit 15 is connected between the 1394 bus interface circuits 12 and 13, events different from events on the bus in the actual system are analyzed. Is done.

An object of the present invention is to provide an IEEE 1394 bus analysis method and an interface circuit capable of analyzing an event on a bus between electronic devices of a system actually used in view of such a problem. .

[0007]

According to the present invention, there is provided an IEEE 1394 bus analysis method.
A signal is received from the signal line of the IEEE 1394 bus interface circuit including a physical layer circuit connected to the H.94 bus, and a link layer circuit connected to the physical layer circuit via a signal line and transmitting / receiving a signal. The contained data is stored in a storage device, and the stored data is analyzed.

According to the IEEE 1394 bus analysis method, the portion that receives a signal from the signal line is not a node, so that the IEEE 1394 bus in the same system as the actual system is used.
Events on the bus can be analyzed.

In the IEEE 1394 bus analysis interface circuit, a physical layer circuit connected to the IEEE 1394 bus is connected to the physical layer circuit via a signal line, and is included in a signal on the signal line for data analysis. And a second coupler connected to the physical layer circuit and coupled to a first coupler to which a physical layer circuit of another IEEE 1394 bus interface circuit is mounted.

According to the IEEE 1394 bus analysis interface circuit, since the circuit does not become a node, data on the IEEE 1394 bus in the same system as the actual system can be analyzed. Also, by this connection,
There is no need to draw out the test signal line from the physical layer circuit of the other IEEE 1394 bus interface circuit.

According to a third aspect of the present invention, in the second aspect, the data acquisition circuit is a link layer circuit.

According to a fourth aspect of the present invention, in the IEEE 1394 bus analysis interface circuit according to the second aspect, the data acquisition circuit has a memory, and a control circuit for acquiring the data on the signal line in the memory and storing the data in the memory. .

In the IEEE 1394 bus analysis interface circuit according to a fifth aspect, in the fourth aspect, the control circuit includes: a storage unit for setting a type of data to be captured; and a storage unit for storing the type of data on the signal line in the storage unit. It has a determination unit for determining whether or not it matches the set one, and a writing circuit for storing the data in the memory when the match is determined.

[0014] Other objects, configurations and effects of the present invention will become apparent from the following description.

[0015]

Embodiments of the present invention will be described below with reference to the drawings.

[First Embodiment] FIG. 1 shows an IEEE 1394 bus analysis system according to a first embodiment of the present invention.

The computer 10 and the digital video camera 11 are connected by an IEEE 1394 serial bus as in FIG. That is, 1394 bus interface circuits (nodes) 12 and 13 are connected to the computer 10 and the digital video camera 11, respectively, and both are connected by a 1394 cable 14.
Computer 10, digital video cameras 11 and 13
A console (not shown) is connected to the 94 bus analyzer 16. The 1394 bus analyzer 16 is, for example, a computer.

The 1394 cable 14 has four or six wires. In the case of four wires, there are a TPA cable pair for data signal transmission and a TPB cable pair for strobe signal transmission. Further, for example, it has a 12V bus power supply line and a ground line.

The 1394 bus interface circuit 12
Physical layer circuit 1 to which one end of 1394 cable 14 is connected
7 and a link layer circuit 19 which is an interface with the PCI bus interface circuit 18 of the computer 10. A link between the physical layer circuit 17 and the link layer circuit 19 and a link between the link layer circuit 19 and the computer 10 are provided. They are connected by wires 20 and 21, respectively.

Similarly, the 1394 bus interface circuit 1
Reference numeral 3 denotes a physical layer circuit 27 to which the other end of the 1394 cable 14 is connected, and a link layer circuit 29 which is an interface between the physical layer circuit 27 and the PC card 28 of the digital video camera 11.
The wiring 30 and 31 connect the physical layer circuit 27 and the link layer circuit 29 and the link layer circuit 29 and the digital video camera 11 respectively.

The configurations of the link layer circuits 19 and 29 differ from those of the PCI bus interface circuit 18 and the PC card 28, respectively. In the development of the 1394 bus interface circuit 13, in order to capture data on the bus and analyze the data, the wiring 20 of the 1394 bus interface circuit 12 is connected to the interface circuit of the 1394 bus analyzer 16 via the 1394 bus analysis interface circuit 15A. 32, for example, a PCI bus interface circuit. The 1394 bus analysis interface circuit 15A receives a signal on the wiring 20 transmitted and received between the physical layer circuit 17 and the link layer circuit 19, and converts the signal into data conforming to the standard of the interface circuit 32. It is. The data received by the interface circuit 32 is stored in a memory in the 1394 bus analyzer 16 and analyzed by the MPU according to a bus analysis program.

Thus, since the 1394 bus analysis interface circuit 15A does not become a node, events on the IEEE 1394 bus in the same system as the actual system can be analyzed.

The physical layer circuit 17 and the link layer circuit 19
May be separate LSIs or integrated LSIs. In the latter case, a part of the output terminal of the LSI is connected to the link layer circuit 22.

[Second Embodiment] In the system shown in FIG. 1, signals on the wiring 20 are transmitted to the 1394 bus interface circuit 12.
Although it is necessary to provide a means for extracting the information from the system, this means is preferably used only in the development stage.

FIG. 2 is a diagram showing an IEEE standard according to a second embodiment of the present invention.
1 shows a 1394 bus analysis system.

In this system, a physical layer circuit 37 connected between the 1394 cable 14 and the link layer circuit 22, a circuit 37 A connector 38 for connecting to the link layer circuit 19, wherein the physical layer circuit 17 is separated from the connector 39;
In addition, a fitting 38 is fitted to connect the two. By this connection, the physical layer circuit 37 performs the function of the physical layer circuit 17 of the 1394 bus interface circuit 12, and the 1394 bus interface circuit 12 performs the same operation as that of FIG. That is, the physical layer circuit 37 includes a circuit having at least the same function as the physical layer circuit 17. The physical layer circuit 37 may be the same as the physical layer circuit 17 or may have a special circuit for the link layer circuit 22 added thereto. The link layer circuit 22
A signal which is the same as the signal on the wiring 20 or which is processed by the additional circuit is received.

According to the second embodiment, since the 1394 bus analysis interface circuit 15B does not become a node, it is possible to analyze an event on the IEEE 1394 bus in the same system as the actual system.

Third Embodiment FIG. 3 shows an IEEE 1394 bus analysis system according to a third embodiment of the present invention.

1394 bus analysis interface circuit 15
The data capture circuit 22A of C is connected to the data capture circuit 40 and F
An IFO memory 41 is provided. Data capture circuit 40
Captures data of a predetermined type among the data included in the signal on the wiring 20 and writes the data into the FIFO memory 41. The written data is stored in the memory in the 1394 bus analyzer 16 via the interface circuit 32.

Setting data indicating the type of data to be captured by the data capturing circuit 40 is written from the 1394 bus analyzer 16 to the FIFO memory 41 before the test, and the data capturing circuit 40 reads the data and reads out the data based on the setting data. To determine the data to be captured.

The other points are the same as in the second embodiment.

[Fourth Embodiment] FIG. 4 shows an IEEE 1394 bus analyzer according to a fourth embodiment of the present invention.

This device is used in place of the corresponding devices 15C and 16 in FIG.

1394 bus analysis interface circuit 15
The D data capture circuit 22B includes components 41 to 45. The hard disk device 46 is connected to the 1394 bus analyzer 16, and an input device 47 and a display device 48 are connected as consoles.

The serial / parallel conversion circuit 42 is connected to the wiring 2 shown in FIG.
The signal on 0 is received via the coupler 38 and converted to parallel data. Since this data is DS (data strobe) encoded, the determination circuit 43 decodes the data and then determines whether or not the data is data to be captured by referring to the data set in the setting register file 44. I do. The setting register file 44 is set by the 1394 bus analyzer 16 via the interface circuit 32 based on the operation of the input device 47 before the test. When the determination circuit 43 makes a positive determination, the write control circuit 45 writes the data into the FIFO memory 41.

The 1394 bus analyzer 16 reads data from the FIFO memory 41 via the interface circuit 32, stores it in the internal memory, and then stores it in the hard disk device 46. The 1394 bus analyzer 16
The data stored in the internal memory or the hard disk device 46 is analyzed, and the result is displayed on the display device 48.

FIG. 5 schematically shows the appearance of the IEEE 1394 bus analysis system according to any of the second to fourth embodiments. FIG. 6 is a perspective view of FIG. 5, and FIG.
3 shows more details of a couple of fasteners attached to a substrate.

Reference numeral 22X denotes the link layer circuit 22 shown in FIG.
Data capture circuit 22A of FIG. 4 or data capture circuit 22 of FIG.
B and 15X are the 1394 bus analysis interface circuit 15B in FIG. 2, the 1394 bus analysis interface circuit 15C in FIG. 3, or the 1394 bus analysis interface circuit 15D in FIG.

Connectors 141 and 142 are attached to one end and the other end of the 1394 cable 14, respectively. The connector 141 is fitted to a connector 143 fixed to the board of the 1394 bus analysis interface circuit 15X, and the connector 142 is fitted to a connector 144 fixed to the board of the 1394 bus interface circuit 13. A coupler 38 is fixed to the back surface of the board of the 1394 bus analysis interface circuit 15X, corresponding to the physical layer LSI 37 mounted on the front surface of the board. When the coupler 38 is fitted to the coupler 39, the physical layer L
The SI 37 is connected to the link layer LSI via the coupling tools 38 and 39.
19 and is electrically connected.

The connector 145 fixed to the board of the computer 10 has a connector 38 for actual use.
Is detached from the coupling tool 39, and the connector 141 is fitted.

Each of the fittings 38 and 39 in FIG. 7 is a known one. The fittings 38 and 39 are fixed to each other with screws (not shown) after fitting. The coupling tools 38 and 38 have a relationship between a socket and a plug, and the coupling tool 39 is a socket in relation to the physical layer LSI 17.

The physical layer circuit 17 and the link layer circuit 19
May be an integrated LSI.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an IEEE 1394 bus analysis system according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating an IEEE 1394 bus analysis system according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing an IEEE 1394 bus analysis system according to a third embodiment of the present invention.

FIG. 4 is a block diagram illustrating an IEEE 1394 bus analyzer according to a fourth embodiment of the present invention.

FIG. 5 is a diagram illustrating an IEEE 1 according to any one of the second to fourth embodiments.
It is an outline appearance figure of a 394 bus analysis system.

FIG. 6 is a schematic perspective view of the IEEE 1394 bus analysis system of FIG. 5;

FIG. 7 is a perspective view showing the details of the coupling pair attached to the substrate in FIG. 6;

FIG. 8 is a block diagram showing a conventional system connected by an IEEE 1394 bus.

FIG. 9 is a block diagram showing a conventional IEEE 1394 bus analysis system.

[Explanation of symbols]

10, 16 Computer 11 Digital video camera 12, 13 1394 bus interface circuit 15, 15A to 15D, 15X 1394 bus analysis interface circuit 14, 14A, 14B 1394 cable 17, 27, 37 Physical layer circuit 19, 22, 29 Link layer circuit 18, 32 PCI bus interface circuit 20, 21, 30, 31 Wiring 22A, 22B Data capture circuit 28 PC card 38, 39 Coupling device 40 Data capture circuit 41 FIFO memory 42 Serial / parallel conversion circuit 43 Judgment circuit 44 Setting register file 45 Write control circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5K032 DB04 DB19 EA02 EA06 5K034 DD03 HH21 KK04 KK21 SS01 TT02 5K035 BB03 CC08 DD01 JJ05

Claims (5)

[Claims] 1. An IEEE 1394 bus interface circuit comprising: a physical layer circuit connected to an IEEE 1394 bus; and a link layer circuit connected to the physical layer circuit via a signal line to transmit and receive a signal. Receiving the data, storing the data included in the received data in a storage device, and analyzing the stored data.
Bus analysis method. 2. A physical layer circuit connected to the IEEE 1394 bus, a data capturing circuit connected to the physical layer circuit via a signal line, and capturing data included in a signal on the signal line for data analysis. An IEEE 1394 bus analysis interface circuit, comprising: a second coupler connected to the physical layer circuit and connected to a first coupler to which a physical layer circuit of another IEEE 1394 bus interface circuit is mounted. 3. The IEEE 1394 according to claim 2, wherein said data acquisition circuit is a link layer circuit.
Bus analysis interface circuit. 4. The IEEE 13 according to claim 2, wherein the data capturing circuit includes: a memory; and a control circuit that captures data on the signal line in the memory and stores the data in the memory.
94 bus analysis interface circuit. 5. The control circuit according to claim 1, wherein: a storage unit in which the type of data to be captured is set; and a determination whether the type of data on the signal line matches the type set in the storage unit. 5. The IEEE 13 according to claim 4, further comprising: a write unit that stores the data in the memory when the match is determined.
94 bus analysis interface circuit.