JP2001102882A - High frequency amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a gain variable width as large as possible while maintaining the desired linearity. SOLUTION: This device is provided with plural stages of amplifying part Q1, Q2 and Q3 respectively composed of source ground circuits, first bypass attenuator ATT1 connecting the drain terminal to a connecting node between an input terminals IN of the amplifying part and the input terminal of the source ground circuit of the first stage, grounding the source terminal in the manner of high frequency, applying a prescribed DC voltage and connecting the gate to a control terminal to which a control voltage is applied, and second bypass attenuator ATT2 connecting the drain terminal to a connecting node between the output terminal of the source ground circuit of the first stage and the input terminal of the source ground circuit of the second stage, applying the prescribed DC voltage and connecting the gate to the control terminal, and the threshold voltage of a transfer gate FET composing of the first bypass attenuator is set negative rather than the threshold voltage of a transfer gate FET composing of the second bypass attenuator.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency amplifier capable of continuously changing a gain by a control signal while maintaining high linearity.

[0002]

2. Description of the Related Art In the field of mobile communications, TDMA
(Time Division Multiple A
access) and CDMA (Code Division)
Digital communication systems such as Multiple Access have become mainstream. In these digital systems, when the distance between the base station and the mobile communication terminal changes, a so-called near-far problem that the code error rate deteriorates due to an increase in adjacent channel leakage power due to input fluctuations at the base station poses a problem. . To avoid this perspective problem, it is necessary to adjust the transmission output of the mobile communication terminal, and a high-frequency amplifier having a continuously variable gain function is required.

One type of gain control method is a bypass type attenuator. This is an attenuator composed of a transfer gate FET in which the drain is connected to the RF signal line, the source is grounded at a high frequency, and the gate is connected to the control terminal through a high resistance, and the control potential is controlled. Is used to control the gain.

FIG. 6 shows the configuration of a conventional high-frequency amplifier having a continuously variable gain function having this bypass attenuator. This high-frequency amplifier 60 has an FE whose source is grounded.
A common source circuit Q ₁ , Q ₂ , Q ₃ made of T is provided, and each of these common source circuits Q ₁ , Q ₂ , Q ₃ forms an amplifier. The gate terminal of the source grounding circuit Qi (i = 1,... 3) of each stage and the ground power supply GND
Is provided with a stabilizing resistor R _{st i} .

The input terminal I of the high-frequency amplifier 60
And N, together with the capacitor C ₁ is provided between the gate terminal of the source ground circuit Q _1, the bypass type attenuator ATTN is provided. The bypass type attenuator ATTN is composed of a plurality of transfer gate FETs connected in cascade, and one end is provided at the input terminal IN.
And a constant DC voltage Vdd is applied to the other end. The control voltage Vc is applied to the gate of each of the FETs constituting the attenuator ATTN via a high resistance.
Is applied.

Further, a source grounded circuit Q _i (i = 1, 2)
The drain terminal constant DC voltage through the inductor L _i is applied. Then, the common source circuit Q _i (i = 1,
The capacitor C _{i + 1} is provided between the drain terminal of 2) and the gate terminal of the subsequent source ground circuit Q _{i + 1} . The inductor L ₁ and capacitor C ₂ constitute a matching circuit between the first and second stages of the amplifier 60, the matching circuit between the second and third stages of the amplifier 60 by the inductor L ₂ and capacitor C ₃ Is composed.

The capacitor C ₁ is connected to the attenuator A
The DC potential of the two terminals other than the control terminal of TTN to set to Vdd, in which an input terminal IN of the gate terminal and the amplifier 60 of the source circuit Q ₁ provided for the purpose of DC isolated. The capacitor C ₁ is connected to the input terminal I
It also functions as a part of an input matching circuit to be provided in a stage preceding N.

[0008] The output of the amplifier 60 is output from the drain terminal OUT of the source circuit Q _3.

[0009]

The bypass type attenuator has the following two problems.

The first problem is that the transfer gate FE
Linearity is degraded in a bias potential region where T transitions from an off state to an on state. This will be described with reference to FIG. FIG. 7 shows the power gain of the common source circuit in which the bypass
It shows the control voltage dependency of the next-order intermodulation distortion factor IM3. When the control voltage Vc is low, the bypass attenuator is off, and the gain of the common source circuit itself is obtained. As the control voltage Vc is increased, the transfer gate FET constituting the bypass type attenuator transitions from the off state to the on state, and starts attenuating the gain. However, IM3 degradation occurs in this transition region. This is because the transfer gate FET operates non-linearly in the vicinity where the bias potential Vgs-Vth of the transfer gate FET becomes zero. When Vc is further increased, the transfer gate FET operates linearly and IM3 decreases.

To overcome this problem, the transfer gate FET is connected in multiple stages, or a bypass type attenuator is provided at the input stage of the amplifier as shown in FIG. 6 to apply a voltage between the drain and source of the transfer gate FET. It is effective to reduce the applied voltage amplitude.

A second problem of the bypass type attenuator is that, when mounting in a plastic package or the like is assumed, the gain variable width cannot actually be made very large.

Now, for simplicity, it is assumed that the input impedance of the common source circuit is a pure resistance Rin. The common source circuit usually has a resistor R for stabilization between the gate and the source.
Since st is added, and Rst is often smaller than the gate-source impedance of the FET, this assumption is valid as an approximation.

Here, it is assumed that an input matching circuit is provided before the bypass type attenuator, and the bypass FE
Assuming that matching is achieved when the source-drain resistance Rc of T is infinite, the voltage attenuation ratio K is given by the following equation.

K = (2Rc) / (2Rc + Rin) From the above equation, if Rc → 0, then K → 0 and the bypass FE
If the on-resistance of T approaches 0, ideally the decay rate (1
/ K) is infinite. But it is a bypass FET
Is completely grounded at a high frequency, and in practice, there is an upper limit to the achievable attenuation due to the presence of the inductance of the wires and the leads of the package.

For example, a gain variable width of about 35 dB is required. However, assuming that a normal plastic package is used, a conventional bypass attenuator has a maximum of 20 dB.
Only a B-level attenuator can be formed.

As described above, the conventional variable gain high-frequency amplifier using the bypass attenuator has a problem that the variable gain required for adjusting the transmission output of the portable terminal cannot be realized.

The present invention has been made in view of the above circumstances, and has as its object to provide a high-frequency amplifier having a gain variable width as large as possible while maintaining desired linearity.

[0019]

SUMMARY OF THE INVENTION A high frequency amplifier according to the present invention comprises a plurality of stages of amplifying sections each having a grounded source circuit, a transfer gate FET, and a drain terminal connected to an input terminal of the amplifying section and a first stage source. A first bypass connected to a connection node with an input terminal of the grounding circuit, a source terminal grounded at a high frequency, a predetermined DC voltage applied, and a gate connected to a control terminal to which a control voltage is applied Type attenuator and transfer gate F
ET, a drain terminal is connected to a connection node between an output terminal of the first-stage grounded source circuit and an input terminal of the second-stage grounded source circuit, and the source terminal is grounded at a high frequency and the predetermined DC voltage is A second bypass-type attenuator having a gate connected to the control terminal, wherein a threshold voltage of a transfer gate FET constituting the first bypass-type attenuator is equal to that of the second bypass-type attenuator. It is characterized in that it is set to a negative side with respect to the threshold voltage of the transfer gate FET to be constituted.

As described above, the threshold voltage V of the transfer gate FET constituting the first bypass type attenuator is
th1 is set to be more negative than the threshold voltage Vth2 of the transfer gate FET constituting the second bypass type attenuator. Therefore, when the control voltage is increased,
At a certain potential (V ₁ ), attenuation by the first attenuator starts first, and when the control voltage becomes V ₁ + (Vth2−Vth1), attenuation by the second attenuator starts.
Here, by setting Vth2−Vth1 to a sufficiently large value, the first attenuator starts decreasing at the time when the attenuation of the second attenuator starts.
The attenuation of the attenuator becomes larger, and the distortion factor becomes smaller than the maximum distortion factor.

Note that the gain attenuation of the first bypass type attenuator at the control voltage at which the transfer gate FET constituting the second bypass type attenuator switches from the off state to the on state is equal to the gain of the first stage grounded source circuit. It is preferable that the setting is made larger than the above.

Further, with this configuration, the voltage amplitude applied to the second attenuator at the time when the second attenuator starts to attenuate becomes the first voltage at the time when the first attenuator starts to attenuate. Is smaller than the voltage amplitude applied to the second attenuator, and the deterioration of the linearity due to the second attenuator does not matter.

[0023]

Embodiments of the high-frequency amplifier according to the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of the high-frequency amplifier according to the first embodiment of the present invention. The high-frequency amplifier 10 of this embodiment includes a common-source circuit Q ₁ , Q ₂ , Q ₃ composed of a grounded source FET, a bypass-type attenuator A
TT1 and ATT2 are provided, and these source ground circuits Q ₁ , Q ₂ and Q ₃ form an amplification unit. The FETs forming these common source circuits Q ₁ , Q ₂ , Q ₃ are GaAs FETs in the present embodiment, but may be other FETs such as SiMOSFETs.

A common source circuit Qi (i = 1, 2, 2, 3) at each stage
A stabilizing resistor Rsti is provided between the gate terminal of 3) and the ground power supply GND.

The input terminal I of the high-frequency amplifier 10
And N, together with the capacitor C ₁ is provided between the first-stage gate terminal of the source circuit Q ₁ is provided, the bypass-type attenuator ATT1 is provided. The bypass type attenuator ATT1 is composed of a plurality of (four in the drawing) transfer gate FETs connected in cascade, one end of which is connected to the input terminal IN, and the other end of which is grounded in high frequency, that is, the capacitor C Grounded via ₄ . A constant DC voltage Vdd is applied to the other end. Each of the FETs constituting the attenuator ATT1 is commonly connected to a control terminal via a high resistance.

Moreover the constant DC voltage drain terminal via an inductor L _i of the source grounded circuit _Q i (i = 1,2) is applied. Then, the common source circuit Q _i (i = 1,
The capacitor C _{i + 1} is provided between the drain terminal of 2) and the gate terminal of the subsequent source ground circuit Q _{i + 1} . Incidentally, the inductor L ₁ and capacitor C ₂ constitute a matching circuit between the first and second stages of the amplifier 10, the inductor L ₂ and capacitor C ₃ constitute a matching circuit between the second and third stages ing.

[0028] One end of a bypass-type attenuator ATT2 is connected to the drain terminal of the source circuit Q _1. The other end of the attenuator ATT2 is grounded at high frequencies, that is, a constant DC voltage is grounded via the capacitor C ₅ is applied. The gate terminal of the transfer gate FET constituting the attenuator ATT2 is commonly connected to the control terminal of the attenuator ATT1 via a resistor. A control voltage Vc is applied to this control terminal.

The capacitor C ₁ is connected to the attenuator A
The DC potential of the two terminals other than the control terminal TT1 to set to Vdd, those provided for the purpose of separating the input terminal IN of the gate terminal and the amplifier 10 of the common source circuit Q ₁ in a DC manner.

The capacitor C ₁ is connected to the input terminal IN
Also functions as a part of an input matching circuit that should be provided in the preceding stage.

[0031] The output of the amplifier 10 is output from the drain terminal OUT of the source circuit Q _3.

In this embodiment, the attenuator A
TT1 and ATT2 are each connected in multiple stages of transfer gate FETs in order to suppress the deterioration of linearity due to the attenuator. The threshold voltage Vth1 of the transfer gate FET forming the attenuator ATT1 is set to -1.9V, and the threshold voltage Vth2 of the transfer gate FET forming the attenuator ATT2 is set to -1.5V. That is, it is set so that Vth1 <Vth2.

Further, in the present embodiment is configured such that the gain attenuation amount of ATT1 rain in the control voltage attenuator ATT2 transitions to the ON state is larger than the gain of the common source circuit to Q ₁ stage.

The high-frequency characteristics of this embodiment will be described with reference to FIG.

FIG. 2 shows the control voltage Vc of the bypass attenuator on the horizontal axis, the power gain and the third-order intermodulation distortion IM on the vertical axis.
3 is a characteristic graph in which No. 3 is plotted. When the control voltage Vc exceeds 1.1 V, the attenuator ATT1 is turned on, and the attenuation of the gain starts. Also, attenuator AT
The control voltage Vc corresponding to the transition region of T1 is 1.1 to 1.3.
Although the third-order intermodulation distortion IM3 deteriorates at V, the linearity reference IM3 <−40 dB set in the present embodiment.
c is satisfied. Attenuator ATT1 By a series-connected things and four stages provided in front of the first-stage source circuit Q _1, the voltage amplitude between the drain and source of each transfer gate FET is small, I by attenuator ATT1
The image of M3 is suppressed to about 6 dB.

When Vc further increases and becomes about 1.5 V, a kink occurs in the curve of the power gain because the attenuation by the attenuator ATT2 in addition to the attenuator ATT1 starts. At this time, IM3 again
However, this is sufficiently smaller than the worst value of IM3 (−40 dBc) and poses no problem.

The reason will be described below. Vc = 1.5V
Is about 10 dB, which is provided only by the attenuator ATT1. In this embodiment, the power gain of the _first- stage source grounded circuit Q1 is about 6d.
B, the second-stage source grounding circuit Q ₂
Is about 4 dB smaller than at the maximum gain (Vc = 0.5 V). Therefore, the distortion generated in the attenuator ATT2 is small and does not cause any problem.

As described above, when the control region of the control voltage Vc is set from 0.5 V to 2.5 V, the gain variable width in this region is 36 dB. As described above, according to the present embodiment, a large gain variable width can be realized while maintaining linearity.

On the other hand, the conventional high-frequency amplifier 60 shown in FIG.
Even if T2 is provided, the threshold voltages of the attenuators ATT1 and ATT2 are not set as in this embodiment, and the gain attenuation characteristics of the attenuators ATT1 and AAT2 and the gain of the first-stage source ground circuit are not set. Since the setting is not made as in the present embodiment, the deterioration of the linearity due to the attenuator ATT2 greatly affects the distortion factor of the entire amplifier, and the linearity reference value cannot be satisfied. Therefore, in order to satisfy the linearity criterion, only a gain variable function using only the attenuator ATT1 can be added, and only a gain variable width of about 15 dB can be realized.

FIG. 3 shows the configuration of a second embodiment of the high-frequency amplifier according to the present invention. The high-frequency amplifier 20 of this embodiment differs from the first embodiment shown in FIG. 1 in that a DC potential Vatt different from the DC potential Vdd is added to one of two terminals other than the control terminals of the attenuators ATT1 and ATT2. The configuration is as follows. Since the DC voltage Vdd is applied to the drain terminals of the common source circuits Q ₁ and Q ₂ via the inductors L ₁ and L ₂ , respectively, the other terminal of the attenuator ATT2 and the drain terminal of the first-stage common source circuit Q ₁ capacitor C ₂₁ is provided between the.

The high-frequency amplifier according to the second embodiment has the same effect as the first embodiment.

FIG. 4 shows the configuration of a third embodiment of the high-frequency amplifier according to the present invention. The high-frequency amplifier 30 according to the third embodiment differs from the high-frequency amplifier according to the first embodiment shown in FIG. 1 in that a DC potential added to one of the two terminals other than the control terminals of the attenuators ATT1 and ATT2. Is set to the same value as the gate potential Vgg of the common source circuits Q ₁ , Q ₂ and Q ₃ . Thus, the capacitor C ₁ between the gate terminal of the other terminal of the attenuator ATT1 and source circuit Q ₁ is not required. In addition, the source ground circuit Q ₁ drain terminal and the attenuator ATT
Since between the two other terminal must be DC isolated occurring and has a configuration in which the capacitor C ₃₁ is provided. In addition,
When the DC potential Vgg is 0 V or a negative potential is applied, the control potential Vc should be set in a negative region.

The third embodiment has the same effect as the first embodiment.

Next, a case where the high-frequency amplifier according to the present invention is used in a radio apparatus, for example, a mobile communication terminal will be described with reference to FIG. An overview of the mobile communication terminal 100 is shown in FIG.
FIG. 5A shows the configuration, and FIG.

The mobile communication terminal 100 includes an antenna 101 and a high-frequency switch device 10 as shown in FIG.
2, a low-noise amplifier 103, high-frequency amplifiers 104 and 107 with a variable gain function, a receiving circuit 105, a transmitting circuit 106, and a power amplifier 108. The high-frequency amplifiers of the above-described first to third embodiments are used for the high-frequency amplifiers 104 and 107.

In the mobile communication terminal 100, the received signal received via the antenna 101 is sent to the resistance noise amplifier 103 by the high frequency switch device 102, and then sent to the receiving circuit 105 via the high frequency amplifier 104. The transmission signal output from the transmission circuit 106 is transmitted to the power amplifier 108 via the high-frequency amplifier 107 and amplified, and then transmitted to the high-frequency switch device 102, and thereafter transmitted via the antenna 101. In addition,
The high-frequency amplifier 104 on the receiving side may be omitted.

[0047]

As described above, according to the present invention, it is possible to obtain a gain variable width as large as possible while maintaining desired linearity.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a first embodiment of a high-frequency amplifier according to the present invention.

FIG. 2 is a graph showing characteristics of a power gain and IM3 with respect to a control voltage according to the first embodiment.

FIG. 3 is a circuit diagram showing a configuration of a second embodiment.

FIG. 4 is a circuit diagram showing a configuration of a third embodiment.

FIG. 5 is a diagram showing a configuration of a mobile communication terminal using the high-frequency amplifier of the present invention.

FIG. 6 is a circuit diagram showing a configuration of a conventional high-frequency amplifier.

FIG. 7 is a graph showing characteristics of a power gain and IM3 with respect to a control voltage of a conventional high-frequency amplifier.

[Explanation of symbols]

Q _i (i = 1,2,3) Common source circuit C _i (i = 1,... 5) Capacitor Rsti (i = 1,2,3) Stabilizing resistor L _i (i = 1,2) Inductor ATT1 Attenuator ATT2 Attenuator Vc Control voltage Vdd DC potential

Claims (3)

[Claims] 1. A multi-stage amplifying section in which each stage comprises a common source circuit, and a transfer gate FET, and a drain terminal is connected to a connection node between an input terminal of the amplifying section and an input terminal of a first-stage common source circuit. A source terminal is grounded in a high-frequency manner, a predetermined DC voltage is applied, and a gate comprises a first bypass-type attenuator connected to a control terminal to which a control voltage is applied; a transfer gate FET; A terminal is connected to a connection node between an output terminal of the first-stage source grounded circuit and an input terminal of the second-stage source grounded circuit, the source terminal is grounded at a high frequency, the predetermined DC voltage is applied, and the gate is A second bypass-type attenuator connected to the control terminal; and a transformer constituting the first bypass-type attenuator. A high-frequency amplifier, wherein the threshold voltage of the transfer gate FET is set to be more negative than the threshold voltage of the transfer gate FET constituting the second bypass attenuator. 2. A control voltage at which a transfer gate FET constituting the second bypass attenuator switches from an off state to an on state, wherein the gain attenuation of the first bypass attenuator is equal to the gain of the first stage grounded source circuit. 2. The high-frequency amplifier according to claim 1, wherein the high-frequency amplifier is set to be larger than the high-frequency amplifier. 3. A mobile communication terminal using the high-frequency amplifier according to claim 1 as an amplifier on a transmission side.