JP2001102575A - Semiconductor device and temperature detection method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a load control semiconductor device where a temperature detection Zener diode is formed on the same semiconductor substrate. SOLUTION: A p-type P well diffusion layer 3 is formed on the surface of an epitaxial layer 2. P-type high impurity concentration P+ anode diffusion layers 7b and 7c and an n-type high impurity concentration N+ cathode diffusion layer 8b are formed in the P-well diffusion layer 3. An anode electrode 10b and a cathode electrode 10c, which are formed of aluminum, are formed on the P+ anode diffusion layer 7b and the N+ cathode diffusion layer 8b. Thus, a Zener diode 30 is formed, and a semiconductor substrate temperature can be detected by using the yield voltage temperature characteristic of the Zener diode 30. When the temperature rises to an abnormal level, load current is interrupted and a semiconductor device can be protected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a temperature detecting function is added to a power semiconductor element for controlling power to prevent abnormal overheating.

[0002]

2. Description of the Related Art A power semiconductor device includes a semiconductor element for controlling a load current. At a junction of the semiconductor elements, heat is generated by the flow of the load current. For this reason, when a load is short-circuited, an excessive load current flows through the semiconductor element, the temperature of the junction increases abnormally, and the semiconductor element may be thermally damaged. In order to solve such a point, there is known a semiconductor device in which a temperature detecting element is formed on a semiconductor substrate and the semiconductor element is turned off when the detected temperature becomes abnormal.

FIGS. 6 and 7 show examples of a conventional semiconductor device. As shown in these figures, the semiconductor device has a DMO
It has a structure in which a semiconductor element of an SFET 31 (double diffusion type field effect transistor) and diodes 50 and 51 for temperature detection are formed on a semiconductor substrate. FIG. 8 shows an example of use of a semiconductor device. In FIG. 8, the portions surrounded by the dotted lines are the DMOSFET 31 and the diodes 50 and 51 shown in FIG. 6 or FIG.

When a constant current flows in the forward direction of the diode 50, the forward voltage at that time and the reference voltage Vref are compared by the comparator 32. When the temperature of the semiconductor device rises and the forward voltage becomes lower than the reference voltage Vref. , The output of the comparator 32 becomes High and the MOSFET 33
Turns on, the gate voltage of the DMOSFET 31 becomes zero, and the DMOSFET 31 is turned off. DMOSFE
The temperature at which T31 is turned off is set by the reference voltage Vref.

In the semiconductor device shown in FIG. 6, a diode 50 for detecting temperature is provided with a p-type diode so that a parasitic element does not operate.
An n-type N-well diffusion layer 18 is formed in a P-type diffusion layer 3 of the type, the N-well diffusion layer 18 is used as a cathode diffusion layer, and the P-well diffusion layer 3 and the N-well diffusion layer 18 are used as cathodes. It is electrically connected by the electrode 10d.
The p-type high impurity concentration P + diffusion layer 7d and the n-type high impurity concentration N + diffusion layer 8c are for improving the electrical connection with the cathode electrode 10d. An anode diffusion layer 7e having a p-type high impurity concentration is formed in the N well diffusion layer 18, and an anode electrode 10e is formed on the anode diffusion layer 7e. The P + diffusion layer 7d and the anode diffusion layer 7e
It can be formed in the same diffusion step as the diffusion step of the P + base diffusion layer 7a of the SFET. The N + diffusion layer 8c
+ Source diffusion layer 8a can be formed in the same diffusion step as the diffusion step.

[0006] In the semiconductor device shown in FIG.
Impurities are diffused into polycrystalline silicon used as a gate of the ET31 to form a diode for temperature detection. The N + polycrystalline silicon layer 8d of an n-type high impurity is an N + source diffusion layer of a DMOSFET. 8a, the p-type impurity P-polysilicon layer 6b is formed in the same diffusion step as the p-base diffusion layer 6a, and the p-type high impurity concentration P + poly layer is formed. The crystalline silicon layer 7f is formed in the same diffusion step as the P + base diffusion layer 7a, and a cathode electrode 10f and an anode electrode 10g are formed on the N + polycrystalline silicon layer 8d and the P + polycrystalline silicon layer 7f. This semiconductor device has DMOSFE
There is an advantage that the diode 51 for temperature detection can be formed without adding a new process to the manufacturing process of T31, and no parasitic element is formed.

[0007]

However, in the semiconductor device shown in FIG.
The FET 31 cannot be formed unless a new process is separately added to the manufacturing process. If the P-well diffusion layer 3 is shallow, punch-through breakdown of the npn junction by the N-well diffusion layer 18, the P-well diffusion layer 3, and the silicon epitaxial layer 2 occurs, and the breakdown voltage is reduced.

On the other hand, to make the P-well diffusion layer 3 deep,
If the heat treatment at the time of forming the well diffusion layer 3 is increased, the amount of the n-type impurity of the semiconductor substrate 1 diffused to the silicon epitaxial layer 2 side is increased, and the breakdown voltage is reduced due to reach-through. Although it is necessary to increase the thickness, if the thickness of the silicon epitaxial layer 2 is increased, the on-resistance of the DMOSFET 31 increases.

In the semiconductor device shown in FIG. 7, the temperature detecting diode 51 has a poor thermal conductivity (the thermal conductivity of the silicon oxide film is about one hundredth of the thermal conductivity of the silicon substrate) on the oxide film 4b. And is not in the silicon substrate (semiconductor substrate 1 and epitaxial layer 2) on which the DMOSFET 31 is formed. Therefore, heat transfer from the DMOSFET 31 to the temperature detecting diode 51 is slow,
It is conceivable that the rapid heat generation of the FET 31 cannot be detected promptly and the DMOSFET 31 is thermally destroyed.

Japanese Utility Model Application Laid-Open No. 5-15421 discloses that overheat protection is performed by using the temperature characteristics of the breakdown voltage of a Zener diode. Since the second n-type diffusion layer in which the diode is formed is not used as an anode or a cathode and is open, the breakdown voltage between the collector and the Zener diode is determined by the LVCEO breakdown voltage of the bipolar transistor, and the breakdown voltage decreases. There were drawbacks. In the future, MOs with a wide safe operation area
Protection with SFETs is desired.

According to the present invention, a temperature detecting element is formed on the same semiconductor substrate of a power semiconductor device without adding a new process to a manufacturing process of a power semiconductor device. A main object of the present invention is to provide a temperature detecting element capable of detecting a temperature even with rapid heat generation of a power semiconductor device.

[0012]

In order to achieve the above object, a semiconductor device according to the present invention comprises a transistor for load control and a Zener diode formed on a semiconductor substrate, and a breakdown voltage of the Zener diode and a predetermined setting. The values are compared with each other to determine whether or not the semiconductor substrate temperature has reached a predetermined temperature.

Further, the Zener diode has a structure in which p-type and n-type high impurity diffusion layers are formed in a reverse conductivity type diffusion layer formed on a conductive substrate, and the load control transistor is a DMOSFET, IGBT or IGBT. In the case of a bipolar transistor, a Zener diode for temperature detection is formed using the same process as that for manufacturing the load control transistor, without adding a new process. Further, an oxide film having low thermal conductivity is not interposed between the load control transistor and the Zener diode. As a result, even if the load control transistor suddenly generates heat,
Temperature can be detected quickly.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below.

FIG. 1 is a sectional view showing one embodiment of a semiconductor device according to the present invention. A DMOSFET 31 as a load control transistor and a Zener diode 30 for temperature detection are formed on a semiconductor substrate 1. I have. FIG.
Is an example of use of the present invention. In the drawings, the same portions are denoted by the same reference numerals, and duplicate description will be omitted.

The semiconductor substrate 1 is an n + type silicon substrate and serves as a drain of a DMOSFET 31 (double diffusion field effect transistor). A drain electrode 11 is formed on the back surface of the semiconductor substrate 1, and an n − type silicon epitaxial layer 2 is formed on the upper surface. A p-type P-well diffusion layer 3 and a P-base diffusion layer 6a are formed on the surface of the epitaxial layer 2, and a p-type high impurity concentration P + base diffusion layer 7a for suppressing the parasitic bipolar transistor operation of the DMOSFET is formed. It is formed in the P base diffusion layer 6a. On the other hand, P + anode diffusion layers 7b and 7c are formed in P well diffusion layer 3 by the same diffusion step as that of P + base diffusion layer 7a.

Since the DMOSFET 31 is of the N-channel type, the P + anode diffusion layers 7b and 7c are formed. However, if the DMOSFET 31 is of the P-channel type, a cathode diffusion layer may be formed.

Next, in the P base diffusion layer 6a, a DMOS
An n-type high impurity concentration N + source diffusion layer 8a serving as a source of the FET is formed.
In the same diffusion step as that of the + source diffusion layer 8a, N
+ Cathode diffusion layer 8b is formed. The breakdown voltage of the Zener diode is determined by the impurity concentrations of the P + anode diffusion layer 7c and the N + cathode diffusion layer 8b.

Since the DMOSFET 31 is of an N-channel type, the N + cathode diffusion layer 8b is formed in the same diffusion step as that for the N + source diffusion layer 8a.
When the SFET 31 is a P-channel type, an anode diffusion layer may be formed.

Further, a gate oxide film 4a and an oxide film 4b are formed on the surface of the epitaxial layer 2, a polysilicon layer 5 serving as a gate is formed via the gate oxide film 4a, and the polysilicon layer 5 is covered. An interlayer insulating film 9 is formed. On the interlayer insulating film 9, a source electrode 10a, an anode electrode 10b and a cathode electrode 10c made of aluminum are formed. Thus, the DMOSFE on the left side of FIG.
At T31, a Zener diode 30 is formed on the right side.

For example, the P + base diffusion layer 7a and the P + anode diffusion layers 7b and 7c are formed with an impurity dose of 4 × 10
¹⁵ cm ⁻² and a depth of 1.5 μm, and the N + source diffusion layer 8 a and the N + cathode diffusion layer 8 b
When formed at a depth of 0.3 μm at × 10 ¹⁶ cm ⁻² , the breakdown voltage Vz is slightly less than 1 V, and the temperature characteristic of the breakdown voltage is −
A zener diode of 2 mV / ° C. is formed. With such a configuration, the forward voltage VF (about 0.
A characteristic equivalent to that of a conventional temperature detecting diode utilizing the temperature characteristic of (6 V) (-2 mV / ° C.) can be obtained. The upper limit of the breakdown voltage of the Zener diode 30 is set to 3V.

FIG. 2 shows an example of use of the semiconductor device according to the present invention. The portions surrounded by dotted lines are the DMOSFET 31 and the Zener diode 30 described above. It has a MOSFET 33 as a protection control circuit. DMMOSF
A load current flows through ET31. Further, a constant current is supplied from the constant current source 35 to the Zener diode 30, and the breakdown voltage at that time is compared with the reference voltage Vref by the comparator 32. When the temperature of the semiconductor device rises and the breakdown voltage of the Zener diode 30 becomes lower than the reference voltage Vref, the output of the comparator 32 becomes High,
The FET 33 is turned on, the gate voltage of the DMOSFET 31 becomes zero, and the DMOSFET 31 is turned off. D
The temperature at which the MOSFET 31 turns off depends on the reference voltage Vref.
Is set as appropriate. In the above example, DM
Although only the OSFET 31 and the Zener diode 30 are integrated, all the circuits shown in FIG. 2 may be integrated in a semiconductor substrate.

As described above, the DMOSFET 31
Zener diode 3 having characteristics equivalent to a temperature detection diode without adding a new process to the manufacturing process
0 can be formed. Also, the pn of the Zener diode 30
The oxide film 4b having a low thermal conductivity (the thermal conductivity of the silicon oxide film is about one hundredth of the thermal conductivity of the silicon substrate)
Since the DMOSFET 31 is not located above but in the silicon substrate (semiconductor substrate 1 and epitaxial layer 2) on which the DMOSFET 31 is formed, heat transfer from the DMOSFET 31 to the Zener diode 30 is fast, and even if the DMOSFET 31 generates heat rapidly, This has the effect that the temperature difference between the Zener diodes 30 is small.

In the above embodiment, the load control transistor is a DMOSFET. However, the load control transistor can be applied to an IGBT (insulated gate bipolar transistor), and the N + type silicon substrate of the semiconductor substrate 1 can be replaced with a P + type silicon substrate. By changing to a substrate, the DMOSFET
Can be changed to T.

In the above embodiment, the load control transistor is applied to the DMOSFET, but the load control transistor can be applied to a bipolar transistor. The configuration is shown in FIG.

In FIG. 3, the semiconductor substrate 1 is formed of an n + type silicon substrate and serves as a collector of the bipolar transistor 41. The collector electrode 17 is formed on the back surface of the semiconductor substrate 1. On the upper surface side of the semiconductor substrate 1,
An n − type silicon epitaxial layer 2 is formed. On the surface of the epitaxial layer 2, a base diffusion layer 13a of the bipolar transistor 41 and a P-type diffusion layer 13b in the Zener diode region are formed.
An n-type high impurity concentration N + emitter diffusion layer 14a serving as an emitter is formed in a. In the P-type diffusion layer 13b, an N + cathode diffusion layer 14b is formed in the same diffusion step as that for the N + emitter diffusion layer 14a.

P-type high impurity concentration P + base diffusion layer 1 for improving ohmic contact between base diffusion layer 13a and base electrode 16a of bipolar transistor 41
5a is formed in base diffusion layer 13a, and P + anode diffusion layer 15b is formed in P-type diffusion layer 13b in the same diffusion step as that for P + base diffusion layer 15a. The breakdown voltage of the Zener diode is determined by the impurity concentrations of the P + anode diffusion layer 15b and the N + cathode diffusion layer 14b. Further, a base electrode 16a, an emitter electrode 16b, an anode electrode 16c, and a cathode electrode 16d made of the oxide film 12 and aluminum are formed on the surface of the epitaxial layer 2.

Thus, similarly to the case of the DMOSFET, the Zener diode 40 having the same characteristics as the temperature detecting diode can be formed without adding a new process to the manufacturing process of the bipolar transistor 41.

FIG. 4 shows an example of use of the semiconductor device according to the present invention. The portions surrounded by dotted lines are the bipolar transistor 41 and the Zener diode 40 described above. A constant current source 35 is connected to the Zener diode 40.
From which the breakdown voltage and the reference voltage Vre
f is compared by the comparator 32, and when the temperature of the semiconductor device rises and the breakdown voltage becomes smaller than the reference voltage Vref, the output of the comparator 32 becomes High and the MOS
The FET 33 turns on, the base current of the bipolar transistor 41 becomes zero, and the bipolar transistor 41
Off. The temperature at which the bipolar transistor 41 turns off is set by the reference voltage Vref. Further, all the circuits shown in FIG. 4 may be integrated in a semiconductor substrate.

In each of the above embodiments, a plurality of Zener diodes can be connected in series. The P-well diffusion layer 3 in FIG. 1 or the P-type diffusion layer 13b in FIG. 3 may be divided into a plurality of parts, a zener diode may be formed in each of them, and electrodes may be connected in series. One embodiment is shown in FIG. FIG. 5 shows that the Zener diode 30 in FIG.
With this configuration, the temperature coefficient of the withstand voltage of the zener diode 30 connected in series is twice that of a single Zener diode 30, the amount of change in withstand voltage with respect to temperature increases, and the temperature detection accuracy increases. Can be done.

The present invention is not limited to the above embodiments, and each embodiment can be appropriately modified within the scope of the technical idea of the present invention.

[0032]

According to the temperature detecting method of the present invention, the temperature of a semiconductor device can be detected accurately and quickly.

According to the semiconductor device of the present invention, since the load control transistor and the Zener diode are formed on the semiconductor substrate, the semiconductor substrate temperature can be detected by utilizing the breakdown voltage temperature characteristics of the Zener diode. When the temperature rises abnormally, the load current can be cut off to protect the semiconductor device.

In addition, since the Zener diode is formed by p-type and n-type high impurity diffusion layers in a reverse conductivity type diffusion layer formed on a semiconductor substrate, it can be used in a manufacturing process of a load control transistor. In particular, it is possible to form a Zener diode for temperature detection without adding a new step.

Further, since no oxide film having low thermal conductivity is interposed between the load control transistor and the Zener diode, rapid heat generation of the load control transistor can be detected with a small time difference.

[Brief description of the drawings]

FIG. 1 is a chip cross-sectional view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a view showing a usage example of the semiconductor device according to the first embodiment of the present invention;

FIG. 3 is a chip sectional view of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a view showing an example of use of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a sectional view of a chip of a semiconductor device according to a third embodiment of the present invention.

FIG. 6 is a cross-sectional view of a chip of a conventional semiconductor device.

FIG. 7 is a cross-sectional view of a chip of a conventional semiconductor device.

FIG. 8 is a diagram illustrating an example of use of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 epitaxial layer 3 P well diffusion layer 4a gate oxide film 4b oxide film 5 polycrystalline silicon layer 6a P base diffusion layer 6b P polycrystalline silicon layer 7a P + base diffusion layer 7b P + anode diffusion layer 7c P + anode diffusion layer 7d P + diffusion layer 7e Anode diffusion layer 7f P + polycrystalline silicon layer 8a N + source diffusion layer 8b N + cathode diffusion layer 8c N + diffusion layer 8d N + polycrystalline silicon layer 9 Interlayer insulating film 10a Source electrode 10b Anode electrode 10c Cathode electrode 10d Cathode electrode 11 Drain electrode 12 Oxide film 13a Base diffusion layer 13b P type diffusion layer 14a N + emitter diffusion layer 14b N + cathode diffusion layer 15a P + base diffusion layer 15b P + anode diffusion layer 16a base electrode 16b emitter electrode 16c anode electrode 1 d cathode 17 collector electrode 18 N well diffusion layer 30, 40 Zener diode 31 DMOSFET 32 comparator 33 MOSFET 35 constant current source 41 bipolar transistors 50 and 51 diode

Claims (9)

[Claims] 1. A semiconductor device comprising: a load control transistor and a Zener diode formed on a semiconductor substrate; comparing a breakdown voltage of the Zener diode with a preset value; and detecting the semiconductor substrate temperature by the comparison. A method for detecting a temperature of a semiconductor device, comprising: 2. A semiconductor device comprising: a load control transistor on a semiconductor substrate; and a Zener diode provided in close proximity to the load control transistor, and compares a preset value with a breakdown voltage of the Zener diode. And determining a temperature of the semiconductor substrate. 3. The semiconductor device according to claim 2, wherein said transistor is a DMOSFET (double diffusion field effect transistor). 4. The diffusion layer of the Zener diode (the D layer) in the same diffusion step as the high impurity concentration base diffusion layer for suppressing the operation of the parasitic bipolar transistor of the DMOSFET.
Anode diffusion layer when MOSFET is N-channel type,
4. The semiconductor device according to claim 3, wherein a cathode diffusion layer is formed in the case of a P-channel type. 5. The diffusion layer of the Zener diode in the same diffusion step as the diffusion step of the source diffusion layer of the DMOSFET (a cathode diffusion layer when the DMOSFET is an N-channel type, and an anode diffusion layer when the DMOSFET is a P-channel type). The semiconductor device according to claim 3, wherein the semiconductor device is formed. 6. A judging means for comparing a breakdown voltage value of said Zener diode with a preset set value to judge whether or not the temperature of said semiconductor substrate has exceeded a predetermined value. 6. The semiconductor device according to claim 2, further comprising: an overheat protection control circuit that shuts off operation of the load control transistor when it is determined that the temperature of the substrate has exceeded a predetermined value. . 7. The semiconductor device according to claim 6, wherein said judging means and said overheat protection control circuit are built in said semiconductor substrate. 8. The Zener diode has a breakdown voltage of 3V.
The semiconductor device according to claim 2, wherein: 9. The semiconductor device according to claim 2, wherein a plurality of said Zener diodes are connected in series.