JP2001094256A - Multilayer printed wiring board and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board and the manufacture thereof wherein a conductive resin compound such as conductive pastes, etc., is used for interconnecting layers, and the layer interconnection is more strongly made in laminating them. SOLUTION: In use of conductive resin compounds 6, 7 as layer interconnecting materials of a multilayer printed wiring board to be formed, without using through-holes, layer insulation films 3, 3' are set to 50 μm or less and metal foils for forming wiring layers 2, 4, 5, as required, are set to 18 μm or less in order to make the layer interconnection more strong in laminating. The absolute value of a stress exerted in a direction to peel bumps off from wiring patterns formed on the top and bottom of a layer insulation film composed of an organic insulation film on a multilayer printed board with layers interconnected with use of a conductive resin compound for bumps in the condition of keeping the temperature during coating or mounting can be reduced by decreasing the thickness of the layer insulation film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a multilayer printed wiring board which is used for a printed wiring board and has a high reliability at a high temperature and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, a multilayer printed wiring board called a build-up wiring board is applied to a flip-chip type semiconductor device formed by connecting a printed wiring board or a semiconductor element. In particular, for example, a conductive paste such as a silver paste is printed on a metal foil such as copper to form connection bumps (hereinafter, referred to as bumps), and the bumps are penetrated by an organic insulating film to perform electrical connection between layers. method, B ² it method (Buried Bump Interconnect
An abbreviation of ion technology, which means an interlayer connection technology using bumps. ).
This method will be described with reference to FIGS. The figure shows
All are cross-sectional views of a manufacturing process of a conventional multilayer printed wiring board. The wiring board 101 uses, for example, a double-sided copper-clad laminate in which conductive foils are bonded on both sides. The conductor foil of a double-sided copper-clad laminate in which a 1.2 mm-thick glass cloth is impregnated with a bismaleimide-type polyimide resin has a thickness of, for example, 35 μm.
The first and second wiring layers 104 and 105 are formed on both surfaces by patterning these. First
The wiring layer 104 and the second wiring layer 105 are electrically connected by a bump 106 which is a connection wiring formed from a conductive paste such as a silver paste (FIG. 9).
(A)).

On the other hand, an electrolytic copper foil 102 having a thickness of 35 μm is prepared, and a bump 107 as a connection wiring arranged in a predetermined pattern using a conductive paste such as a silver paste is prepared.
Print multiple times. The bump 107 has a substantially conical shape and a bottom diameter of about 0.4 mm (FIG. 9B). Next, bump 1
07 formed in a predetermined pattern
2, an uncured organic insulating film 103 is laminated, and a bump 107
To expose the head. Organic insulating film 103
For example, an epoxy-modified polyimide resin film is used. The copper foil 102 and the organic insulating film 103 are integrated by pressing with a roller or the like. At this time, the copper foil 10
2 and an organic insulating film 103
Is plastically deformed so as to crush the head of the bump 107 exposed from the surface. Then, it is preferable that the organic insulating film 103 is pressed under the temperature and pressure conditions that maintain the semi-cured state without being cured (FIG. 9C).

Next, a wiring board 101 is laminated on a laminate of the copper foil 102 and the organic insulating film 103. At this time, the first wiring layer 104 formed on the first surface of the wiring board 101
These are laminated so as to face the bump 107 formed on the copper foil 102. These laminates are sandwiched from both upper and lower sides by a press plate 109 via a cushion material 108,
In this state, pressure is applied while heating. The organic insulating film 103 is cured and cured by heating and pressing. At this time, the bump 107 on the copper foil 102 is connected to the opposing first wiring layer 104 of the wiring board 101 while being plastically deformed (FIG. 10A). The press plate 109 used for pressing is
A metal plate such as a stainless steel plate or a brass plate with small dimensional change or deformation, a heat-resistant resin plate with small dimensional change or deformation such as a polytetrafluoroethylene resin plate or a polyimide resin plate is used. The laminate is removed from the press plate 109, and the copper foil 102 is etched into a predetermined pattern by a known etching technique to form a third wiring layer. Through the above steps, a multilayer printed wiring board having each wiring layer having a large number of via contacts by bumps is formed. Thereafter, surface finishing such as solder resist processing, component masking processing, gold plating processing, and solder coating is appropriately performed to complete a multilayer printed wiring board (FIG. 10).
(B)). The connection resistance of the wiring circuit of the multilayer printed wiring board thus formed is small, and the bonding state is good.
In addition, it becomes possible to make it thinner than before. Further, interlayer connection by the through-hole can be minimized, so that high-density mounting can be supported.

[0005]

In the multilayer printed wiring board described above, the organic insulating film 103 is larger than the silver paste used for the bump 107 in comparison with the linear expansion coefficient of the organic insulating film 103. For example, the silver paste is 2.2 × 10 ⁻⁵ (2
5 ° C.), 3.0 × 10 ⁻⁵ (200 ° C.), FR-4
(Prepreg made by Toshiba Chemical Co., Ltd.) is 5.0 × 10 ^-5 (2
5 ° C.) and 1.5 × 10 ⁻⁴ (200 ° C.). Moreover,
In the case of FR-1 constituting the organic insulating film, the linear expansion coefficient sharply increases when the temperature exceeds the glass transition point (see FIG. 4. Change in expansion coefficient due to TMA). Due to this difference in linear expansion rate,
A process of coating a multilayer printed wiring board with solder (peak temperature of 230 ° C at the time of Super Jaffite), semiconductor devices,
In the process of mounting circuit components such as passive elements on a multilayer printed wiring board (peak temperature of about 230 ° C. at the time of solder reflow), there is a high possibility of disconnection between layers. Also, the reliability test (solder heat resistance test 260 ° C, 20 seconds, hot oil test 260 ° C, 10 seconds -20 ° C, 20 seconds, 100 cycles, both tests do not pass the resistance change rate within ± 10% after the test) Things sometimes came out. The present invention has been made in view of such circumstances, and provides a multilayer printed wiring board that uses a conductive resin compound such as a conductive paste for interlayer connection, and further strengthens interlayer connection when laminated, and a method of manufacturing the same. I do.

[0006]

SUMMARY OF THE INVENTION The present invention is to provide a multilayer printed wiring board formed without using through-holes, in which a conductive resin compound is used as an interlayer connection material. 50 μm interlayer insulating film
It is characterized in that the thickness of the metal foil constituting the wiring layer is made 18 μm or less as required. With reference to FIG. 1 to FIG. 3, the action of stress at the time of manufacturing a multilayer printed wiring board will be described. At the time of forming temperature by the laminating press in the manufacturing process of the multilayer printed wiring board (generally 150
It is as high as ~ 200 ° C. 2), a wiring pattern (wiring layer) 11 made of a metal foil such as a copper foil is formed above and below an interlayer insulating film 12 made of an organic insulating film constituting a multilayer printed wiring board in which no stress is applied to each layer. ing. The upper and lower wiring patterns 11 are electrically connected by bumps 13 penetrating the interlayer insulating film 12 and made of a conductive resin compound such as a conductive paste (FIG. 1). However, when the stacking process is completed and the temperature is returned to normal temperature, the interlayer insulating film 12 contracts more than the bump 13 because the organic insulating film has a higher linear expansion coefficient than the conductive resin compound. 3 is subjected to stress in the direction in which it is pushed from the wiring patterns 1 formed above and below (FIG. 2).

When the temperature is higher than the molding temperature, the organic insulating film expands more than the conductive resin compound, and a stress acts in a direction in which the bump 13 is peeled off from the wiring pattern formed above and below. At this time, if the peeling force is large, the wiring pattern 11 may be peeled off from the bump 13 to cause a disconnection (FIG. 3). In order to prevent disconnection at a temperature higher than the molding temperature, it is important to suppress the expansion of the insulating resin. If the thickness of the insulating resin layer is small, the absolute value of the amount of extension of the insulating resin layer at high temperatures is reduced, so that the peeling force is reduced. If the temperature during solder coating or component mounting is constant, the peeling force decreases as the temperature during molding increases. The present invention focuses on these, and reduces the thickness of an interlayer insulating film made of an organic insulating film of a multilayer printed wiring board that performs interlayer connection using a conductive resin compound as a bump, so that it can be used during solder coating or mounting. With the temperature maintained, the absolute value of the stress applied in the direction in which the bump is peeled off from the wiring pattern formed above and below the interlayer insulating film can be reduced. Also,
The temperature at which the stress is balanced can be increased by raising the molding temperature of the multilayer printed wiring board higher than before. This makes it possible to reduce the absolute value of the stress applied in the direction in which the bump is peeled off from the wiring pattern formed above and below the interlayer insulating film while maintaining the temperature during solder coating or mounting.

[0010] As shown in FIG. 4, looking at the elongation-temperature characteristic curve of the interlayer insulating film, the interlayer insulating film has a glass transition temperature, and in the case of FR-4 shown here, 1
27.11 ° C. The thermal expansion coefficient of this interlayer insulating film is
It is small below the glass transition temperature and large above it. On the other hand, although not shown, the bump made of a conductive resin compound also has a thickness elongation-temperature characteristic curve. This curve has no glass transition temperature. That is, the coefficient of thermal expansion does not change with temperature. In any case, the characteristic curve moves up and down depending on the film thickness. In order to prevent the stress from acting on the interlayer insulating film and the bump, the same coefficient of linear expansion should be used, or the stress should not be applied in the peeling direction (see FIG. 3). I just need. Such an intersection, that is, the temperature at which the elongation in the height direction (film thickness) with respect to the temperature of the bump and the elongation with respect to the temperature in the thickness direction (film thickness) of the interlayer insulating film are equal to or higher than the glass transition temperature of the interlayer insulating film Then, the difference in thermal expansion between the two becomes small in a wide temperature range.

That is, a multilayer printed wiring board according to the present invention comprises an insulating substrate, a first wiring pattern formed on at least one surface of the insulating substrate, and the insulating wiring so as to cover the first wiring pattern. An interlayer insulating film formed on a substrate, a second wiring pattern formed on the interlayer insulating film, and a conductive paste embedded in the interlayer insulating film and formed of a conductive paste; At least one for electrically connecting the second wiring patterns;
And two connection bumps, and the thickness of the interlayer insulating film is 5
The first feature is that it is 0 μm or less. Also,
A multilayer printed wiring board according to the present invention is formed on an insulating substrate, a first wiring pattern formed on at least one surface of the insulating substrate, and the insulating substrate so as to cover the first wiring pattern. A first interlayer insulating film, a second wiring pattern formed on the first interlayer insulating film,
A second interlayer insulating film formed on the first interlayer insulating film so as to cover the second wiring pattern;
A third wiring pattern formed on the first interlayer insulating film and a conductive paste embedded in the first interlayer insulating film and formed between the first wiring pattern and the second wiring pattern. At least one first connection bump that is electrically connected to the second wiring pattern and a conductive paste embedded in the second interlayer insulating film, and electrically connects the second wiring pattern and the third wiring pattern. And at least one second connection bump for electrically connecting the first and second interlayer insulating films, and the second feature is that the first and second interlayer insulating films have a thickness of 50 μm or less.

The multilayer printed wiring board according to the present invention comprises an insulating substrate, a first wiring pattern formed on a first surface of the insulating substrate, and a second wiring pattern formed on a second surface of the insulating substrate. And a first wiring pattern formed on the first surface of the insulating substrate so as to cover the first wiring pattern.
, A third wiring pattern formed on the first interlayer insulating film, and a third wiring pattern formed on the second surface of the insulating substrate so as to cover the second wiring pattern. 2
And a fourth wiring pattern formed on the second interlayer insulating film, and a first wiring pattern embedded in the first interlayer insulating film and made of a conductive paste. And at least one first connection bump for electrically connecting between the third wiring patterns;
At least one second connection bump embedded in the interlayer insulating film and made of a conductive paste, and electrically connecting the second wiring pattern and the fourth wiring pattern. A third feature is that the thickness of the first and second interlayer insulating films is 50 μm or less. The first, second, third and fourth wiring patterns are:
It is made of copper foil, and the thickness of this copper foil may be 18 μm or less.

The method for manufacturing a multilayer printed wiring according to the present invention comprises:
A step of printing bumps in a predetermined arrangement pattern using a conductive paste on one main surface of the metal foil, a step of mounting an uncured organic insulating film on the metal foil such that the bumps penetrate, and an insulating substrate Are laminated on the metal foil with the organic insulating film interposed therebetween such that the first wiring pattern formed on the main surface of the insulating substrate is in contact with the bump, and the laminate is heated and pressed to form the organic layer. A step of curing an insulating film; and a step of etching the metal foil to form the second wiring pattern, wherein the first wiring pattern and the second wiring pattern are electrically connected by the bumps. The connected and cured organic insulating film is an interlayer insulating film for insulating between the first and second wiring patterns, and the thickness of the interlayer insulating film is 50 μm or less. The first and second wiring patterns may be made of copper foil, and the thickness of the copper foil is 18 μm.
m or less.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. The first embodiment will be described with reference to FIGS. 1 to 3 are cross-sectional views for explaining stress concentration at the interface of each part of the printed wiring board, characteristic diagrams for explaining temperature dependence of expansion of an insulating film due to expansion, and FIG. FIGS. 6 and 7 are cross-sectional views showing a manufacturing process for forming a multilayer printed wiring board.
FIG. 8 is a characteristic diagram illustrating that stress is affected by the thickness of the copper foil used for the wiring layer. As shown in FIG.
This multilayer printed wiring board has a four-layer wiring structure in which interlayer insulating films 3 and 3 'are formed on both surfaces of a wiring substrate 1 serving as a core, and two upper and lower wiring layers are formed on both surfaces. As shown in FIG. 6, the wiring board 1 uses, for example, a double-sided copper-clad laminate in which conductor foils are bonded on both sides. This laminated board is formed by impregnating a glass cloth having a thickness of 0.3 mm with a bismaleimide-type polyimide resin, for example. The conductor foil of the double-sided copper-clad laminate is made of, for example, an electrolytic copper foil having a thickness of 18 μm, and the conductor foil is patterned to form first and second wiring layers 4 and 5 on both sides. First wiring layer 4 and second wiring layer 4
Are electrically connected by bumps 6 which are connection wirings formed from a conductive paste such as a silver paste.

On the other hand, a first electrolytic copper foil 2 and a second electrolytic copper foil 2 'each having a thickness of 18 μm are prepared, and are connected to each other by using a conductive paste such as a silver paste and connecting wiring arranged in a predetermined pattern. A plurality of bumps 7, 7 'are printed. The bumps 7, 7 'have a substantially conical shape and a bottom diameter of about 0.4 mm. Next, uncured first and second organic insulating films (prepregs) 3, 3 'each having a thickness of 40 .mu.m are laminated on the copper foil 2 on which the bumps 7, 7' are arranged in a predetermined pattern. , The bumps 7, 7 'are penetrated to expose the heads. The first and second organic insulating films 3 are made of, for example, an epoxy-modified polyimide resin film. First and second copper foils 2, 2 'and first and second organic insulating films 3, 3'
Are integrated by pressing with a roller or the like. At this time, the laminated body of the first and second copper foils 2, 2 'and the first and second organic insulating films 3, 3' is exposed from the first and second organic insulating films 3, 3 '. The bumps 7 and 7 ′ are plastically deformed so as to crush the heads. The first and second organic insulating films 3 and 3 'are pressed under the conditions of temperature and pressure that maintain the semi-cured state without being cured (FIG. 6).

Next, the first copper foil 2 and the first organic insulating film 3
And a second laminated body composed of the second copper foil 2 'and the second organic insulating film 3' are laminated so that the wiring board 1 is sandwiched therebetween. At this time, the first wiring layer 4 formed on the first surface of the wiring board 1 faces the bump 7 formed on the first copper foil 2 and the second wiring layer 4 formed on the second surface. The layer 5 is laminated so as to oppose the bumps 7 'formed on the second copper foil 2'. These laminates are pressed from both upper and lower sides via cushioning materials 8 and 8 ',
9 ′, and pressurized while heating at 175 ° C. in this state. The first and second organic insulating films 3, 3 'are hardened and cured by heating and pressurization to become the first and second interlayer insulating films 3, 3'. At this time, the bumps 7 on the first copper foil 2 are plastically deformed while the first
Bump 7 'on the second copper foil 2'
Is connected to the second wiring layer 5 (FIG. 7). Press plates 9 and 9 'used for pressing are metal plates with small dimensional change and deformation such as stainless steel plate and brass plate, and heat resistant resin plates with small dimensional change and deformation such as polytetrafluoroethylene resin plate and polyimide resin plate. Is used. The laminate is removed from the press plates 9 and 9 ′, and the first and second copper foils 2 and 2 ′ are etched into a predetermined pattern by a known etching technique to form a third wiring on the first interlayer insulating film 3. A layer 2 is formed, and a fourth wiring layer 2 'is formed on the second interlayer insulating film 3'.
Through the above steps, a multilayer printed wiring board having each wiring layer having a large number of via contacts by bumps is formed.

Thereafter, surface finishing such as solder resist processing, component masking processing, gold plating processing, and solder coating is appropriately performed to complete a multilayer printed wiring board (see FIG. 5). The multilayer printed wiring board of the present invention is not limited to a structure in which an interlayer insulating film is formed on both surfaces of a wiring board as in this embodiment. For example, a structure in which an interlayer insulating film is provided only on one surface of a wiring board described in the related art may be used, and the number of stacked wiring layers can be increased by further overlapping the interlayer insulating film. In the first embodiment, a multilayer printed wiring board was manufactured by using the B ² it method as described above. The characteristics of this multilayer printed wiring board will be described in comparison with Comparative Examples 1 and 2. The multilayer printed wiring board of the comparative example is
The four-layer wiring structure is the same as in the first embodiment. The copper foil of each layer is 18 μm thick, and the wiring substrate serving as the core is 0.3 m thick.
m FR-4 (TLC-551 manufactured by Toshiba Chemical Corporation)
Was used. The prepreg used for the interlayer insulating film is shown in Table 1 below.
It is as follows.

[0016]

[Table 1]

Using these prepregs, a multilayer printed wiring board for each test is manufactured. The lamination (molding) temperature is 175 ° C. Hot oil test of completed multilayer printed wiring board (260 ° C, 10 seconds to 20 ° C, 20 seconds, 3
0 cycle), the multilayer printed wiring board of Comparative Example 1 showed no change in resistance after the 30-cycle test, whereas the multilayer printed wiring board of Comparative Example 2 exhibited 10% or more (30 (Within a cycle of 10%). On the other hand, in the multilayer printed wiring board of this example, the hot oil test was extended up to 100 cycles, but the resistance change rate was kept within 10%. With a material having a large coefficient of linear expansion in the Z-axis direction, a very high effect can be obtained by reducing the thickness of the interlayer insulating film. The prepreg used here uses a glass cloth as an epoxy resin filler, but other usable resins include phenol resin, polyester resin, polyimide resin, and the like.
Acrylic resin and the like can be mentioned. In addition to glass cloth, usable fillers include paper, nonwoven fabric, glass beads, aerosil and the like. The thermal expansion coefficient of these insulating resins in the Z-axis direction (perpendicular to the plane of the multilayer printed wiring board) increases in the order of aerogel = glass beads <paper = nonwoven fabric <glass cloth. Conversely, the coefficients of thermal expansion in the X and Y axes (parallel to the plane of the multilayer printed wiring board) are exactly in reverse order. This indicates that as a result of suppressing the expansion in the X and Y directions by the fibers, the fibers expand greatly in the Z-axis direction (thickness direction).

In the case of a multilayer printed wiring board in which interlayer connection is made by using a bump made of a conductive resin compound as in the present invention, copper foil of the wiring layer, organic insulator of the interlayer insulating film, and conductive resin compound of the bump are used. The concentration of stress at the interface between the three substances is based on a simulation (see FIGS. 1 to 3) modeling the connection portion.
It is clear from the deformation diagram when the temperature is raised from 250C to 250C.
According to the simulation, the following two facts can be further understood. First, stress concentration can be prevented if the angle formed between the interface of the wiring pattern and the interface between the interlayer connection portion and the organic insulating layer is an acute angle. Second, it is known that the thicker the copper foil is, the more the stress cannot be released due to the bending of the copper foil, so that the stress at the interface increases (see JP-A-10-93).
242).

FIG. 8 shows a wiring pattern of copper (Cu).
FIG. 4 is a characteristic diagram showing a stress distribution at a bonding interface between a foil, an interlayer insulating film, and a bump. The vertical axis indicates stress (stress) (MP
a), and the horizontal axis represents the distance (mm) from the interface (interface end = 0) between the copper foil and the interlayer insulating film to the center of the bump. Curve A is a stress curve when a copper foil having a thickness of 0.005 mm is used, curve B is a stress curve when a copper foil having a thickness of 0.018 mm is used, and curve C is a stress curve when a copper foil having a thickness of 0.035 mm is used. 3 shows a stress curve when a copper foil is used. Thickness 0.035
It can be seen that when a copper foil of mm is used, the stress is applied to the inside. In the case of a copper foil having a thickness of 0.018 mm or less, the influence can be reduced. In addition, it is known from the evaluation results so far for a multilayer printed wiring board by the conventional B ² it method that the thicker the organic insulating film that is the interlayer insulating film, the larger the conductive bump having a larger diameter is required. This is because the difference in thermal expansion coefficient between the conductive resin compound (bump) and the organic insulating film becomes larger as the organic insulating film becomes thicker, so that the absolute value of elongation in the direction perpendicular to the bump becomes larger as the organic insulating film becomes thicker. As a result, the stress acts strongly. For this reason, the diameter of the conductive bump is increased, and the stress is dispersed along the periphery of the bump to reduce the stress per unit length.

The demand for high dimensional accuracy of multilayer printed wiring boards used for printed wiring boards and the like today has resulted in an increase in the necessity of glass cloth, but has resulted in an increase in the coefficient of thermal expansion in the Z-axis direction. In order to make full use of glass cloth in printed wiring boards that perform interlayer connection using conductive resin compounds, use glass cloth that is as thin as possible so that the difference in thermal expansion coefficient between the conductive resin compound and the insulating resin does not appear. This is necessary, and in the present invention, this can increase connection reliability. The copper foil thinner than the currently used copper foil of 18 μm is expensive and difficult to handle, but is necessary to reduce the concentration of stress. Next, characteristics of a prepreg, which is an uncured organic insulating film used in a method for manufacturing a multilayer printed wiring board and used as an interlayer insulating film thereof, will be described.

The prepreg (FR-4) used here is
Glass cloth impregnated with epoxy resin.
Sample 1 has a glass cloth thickness of 60 μm, a prepreg film thickness of 56.4 μm, and a resin amount of 58% by weight. Sample 2
Has a glass cloth thickness of 60 μm and a prepreg film thickness of 6
Sample 3 had a glass cloth thickness of 40 μm and a prepreg film thickness of 46.6 μm.
m, the resin amount is 78% by weight. Table 2 below shows the thermal expansion coefficients and the like of these samples in the Z-axis direction (thickness direction).

[0022]

[Table 2] Here, t is a prepreg film thickness, R is a resin amount, α2
Represents the coefficient of thermal expansion, and V represents the amount of expansion per 1 ° C. in the α2 region.

Samples 1 and 2 use the same model glass cloth. The coefficient of thermal expansion (α2) is 2
It is measured at 00 to 250 ° C. Looking at the above,
As the amount of resin increases, the coefficient of thermal expansion also increases,
It cannot be said that the use of a thin glass cloth will result in a low coefficient of thermal expansion. However, when compared only in the region of α2 exceeding the stress equilibrium point, the expansion amount per 1 ° C. was the smallest for the 40 μm prepreg, even though the resin amount was considerably increased. From these results, it is best to select the smallest organic insulating resin film by comparing the amount of expansion per 1 ° C at a temperature exceeding the stress equilibrium (more than the molding temperature), but with the same amount of resin. If so, by selecting a prepreg as thin as possible (50 μm or less), expansion in the Z-axis direction can be suppressed and connection failure can be reduced.

The connection resistance of the wiring circuit of the multilayer printed wiring board formed in this manner is small, the bonding state is good, for example, the interlayer connection is strong, and it can be made thinner than the conventional one. In addition, disconnection of the interlayer connection portion is less likely to occur during mounting in which the printed wiring board is subjected to high heat due to solder or the like. Further, the reliability in the long-term reliability test is improved, and the reliability of the multilayer printed wiring board itself is improved.

Next, a second embodiment will be described. The multilayer printed wiring board used in this embodiment is shown in FIG. As shown in FIG. 5, the multilayer printed wiring board has a four-layer wiring structure in which interlayer insulating films 3 and 3 'are formed on both surfaces of a wiring substrate 1 serving as a core, and two upper and lower wiring layers are formed on both surfaces. . Then, multilayer printed wiring board is manufactured by using B ² it method. The copper foil constituting each wiring layer is 18 μm.
A prepreg (TLC-551 manufactured by Toshiba Chemical Co., Ltd.) having a thickness of 0.3 mm is used as a wiring substrate serving as a core having a thickness of m. Each prepreg used for the interlayer insulating film has a thickness of 60 μm, and the thickness of the formed interlayer insulating film is 70 μm. The recommended lamination condition of the above prepreg is temperature 175 ° C.
It is. Therefore, lamination is performed under the conditions of 175 ° C. and 185 ° C. to produce two types of multilayer printed wiring boards for testing.

When a hot oil test (260 ° C., 10 seconds-20 ° C., 20 seconds, 100 cycles) of the completed multilayer printed wiring board was performed, the multilayer printed wiring board formed at 175 ° C. was subjected to the 100 cycle test. While some of the resistance rises exceeded 10%, all the multilayer printed wiring boards formed at 185 ° C. showed a change in resistance within 10% after the 100-cycle test. The insulating material of the interlayer insulating film of the multilayer printed wiring board of the present invention may be GHPL-830 (prepreg manufactured by Mitsubishi Gas Chemical Co., Ltd.) using BT resin or R5610 manufactured by Matsushita Electric Works (prepreg manufactured by Matsushita Electric Works). is there. Further, although silver paste is used for interlayer connection in the embodiments, a mixed resin compound of metal powder such as copper paste and gold paste, or a conductive resin such as polypyrrol and polyacene can be used.

[0027]

According to the present invention, disconnection of the interlayer connection portion is less likely to occur during mounting in which high heat is applied to the multilayer printed wiring board by soldering or the like. In addition, since the reliability in the long-term reliability test is improved, the reliability of the substrate can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating stress concentration at an interface of each part of a multilayer printed wiring board during pressing (175 ° C.) of the present invention.

FIG. 2 is a cross-sectional view illustrating stress concentration at the interface of each part of the multilayer printed wiring board at normal temperature (30 ° C.) according to the present invention.

FIG. 3 is a cross-sectional view illustrating stress concentration at the interface of each part of the multilayer printed wiring board at a high temperature (250 ° C.) according to the present invention.

FIG. 4 is a characteristic diagram for explaining temperature dependency on elongation due to expansion of an insulating film thickness.

FIG. 5 is a sectional view of a multilayer printed wiring board according to the present invention.

FIG. 6 is a sectional view showing a manufacturing process for forming the multilayer printed wiring board of the present invention.

FIG. 7 is a sectional view showing a manufacturing process for forming the multilayer printed wiring board of the present invention.

FIG. 8 is a characteristic diagram illustrating that stress is affected by the thickness of a copper foil used for a wiring layer.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a conventional multilayer printed wiring board.

FIG. 10 is a cross-sectional view illustrating a manufacturing process of a conventional multilayer printed wiring board.

[Explanation of symbols]

1, 101 ... wiring board, 2, 2 ', 102 ...
.Copper foil, 3, 3 ': interlayer insulating film, 4, 5, 11, 1
04, 105 ... wiring layer (wiring pattern), 6, 7,
7 ': bump, 8, 8', 108: cushion material, 9, 9 ', 109: press plate, 12
..Interlayer insulating films, 13, 106, 107 ... bumps
103 ... an organic insulating film.

 ──────────────────────────────────────────────────続 き Continued on front page F term (reference) 5E317 AA24 BB02 BB11 BB12 CC60 GG11 5E346 AA12 AA15 AA32 AA35 AA38 AA41 AA43 BB01 BB15 BB16 CC31 CC32 DD02 DD12 DD32 DD34 EE06 EE09 EE13 FF24 GG19 HGG22

Claims (6)

[Claims] An insulating substrate; a first wiring pattern formed on at least one surface of the insulating substrate;
An interlayer insulating film formed on the insulating substrate so as to cover the wiring pattern, a second wiring pattern formed on the interlayer insulating film, and a conductive paste embedded in the interlayer insulating film. And at least one connection bump for electrically connecting the first wiring pattern and the second wiring pattern, wherein the thickness of the interlayer insulating film is 50 μm or less. Multilayer printed wiring board. 2. An insulating substrate; a first wiring pattern formed on at least one surface of the insulating substrate;
A first interlayer insulating film formed on the insulating substrate so as to cover the first wiring pattern, a second wiring pattern formed on the first interlayer insulating film, and the second wiring pattern. A second interlayer insulating film formed on the first interlayer insulating film so as to cover the second interlayer insulating film, a third wiring pattern formed on the second interlayer insulating film, and the first interlayer insulating film At least one first connection bump that is embedded in and is made of a conductive paste, and electrically connects the first wiring pattern and the second wiring pattern;
The second wiring pattern is embedded in the second interlayer insulating film and is made of a conductive paste.
And at least one second connection bump for electrically connecting the wiring patterns of the above, wherein the thickness of the first and second interlayer insulating films is 50 μm or less. . 3. An insulating substrate, a first wiring pattern formed on a first surface of the insulating substrate, and a second wiring pattern of the insulating substrate.
A second wiring pattern formed on the first surface; a first interlayer insulating film formed on the first surface of the insulating substrate so as to cover the first wiring pattern; A third wiring pattern formed on the insulating film, a second interlayer insulating film formed on the second surface of the insulating substrate to cover the second wiring pattern, A fourth wiring pattern formed on the interlayer insulating film and a conductive paste embedded in the first interlayer insulating film and made of a conductive paste, and electrically connecting between the first wiring pattern and the third wiring pattern; At least one first connection bump, which is electrically connected, and is embedded in the second interlayer insulating film and is made of a conductive paste, and electrically connects the second wiring pattern and the fourth wiring pattern. At least one second connection to Comprising a bump, the thickness of the first and second interlayer insulating film, a multilayer printed wiring board, characterized in that at 50μm or less. 4. The method according to claim 1, wherein the first, second, third, and fourth wiring patterns are made of copper, and the thickness of the copper is 18 μm or less. The multilayer printed wiring board according to any one of the above. 5. A step of printing bumps on one main surface of the metal foil using a conductive paste in a predetermined arrangement pattern;
Placing an uncured organic insulating film on the metal foil so that the bumps penetrate; and placing the insulating substrate such that a first wiring pattern formed on a main surface of the insulating substrate contacts the bumps. Laminating on the metal foil with an organic insulating film interposed, heating the laminate to harden the organic insulating film, and etching the metal foil to form the second wiring pattern The first wiring pattern and the second wiring pattern are electrically connected by the bumps, and the cured organic insulating film insulates the first and second wiring patterns from each other. A method of manufacturing a multilayer printed wiring board, wherein the thickness of the interlayer insulating film is 50 μm or less. 6. The method according to claim 5, wherein the first and second wiring patterns are made of copper foil, and the thickness of the copper foil is 18 μm or less. Method.