JP2001086185A - Communication method and equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication method selecting full duplex communication or half duplex communication that has a high efficiency and imposes no load on a synchronization circuit and to provide a equipment. SOLUTION: The communication equipment receiving a transmission request of half duplex communication transmits a half duplex communication start signal 502 together with a DATA-PREFIX signal 509 when selecting half duplex communication from full duplex communication. Furthermore, in the case of selecting full duplex communication from the half duplex communication, the communication equipment uses full duplex communication start signals 511, 517 and full duplex communication character synchronizing signals 512, 518 to conduct hand-shake. That is, a half duplex communication transmitter side transmits the full duplex communication start signal 511. When a half duplex combination receiver reaches bit synchronization, the receiver transmits the full duplex communication start signal 517. When the half duplex communication transmitter side reaches bit synchronization, the transmitter transmits the full duplex communication character synchronizing signal 512. When the half duplex communication side reaches character synchronization, the half duplex communication side transmits the full duplex communication character synchronizing signal 518.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
And full-duplex communication such as facsimile communication,
The present invention relates to a communication method and apparatus using both half-duplex communication.

[0002]

2. Description of the Related Art Communication methods and apparatuses for switching between full-duplex communication and half-duplex communication, such as IEEE 1394 and facsimile communication, have become widespread.

[0003] Full-duplex communication enables efficient communication without the need for switching between transmission and reception and control of the transmission right. On the other hand, half-duplex communication can use a wide communication band and is effective for transmitting and receiving large-capacity data.

[0004] In particular, when two-way communication is realized using one optical fiber, it is very effective to communicate control signals in full duplex and data in half duplex for the above-mentioned reason. Further, by stopping full-duplex communication during data communication, power consumption can be reduced. IEEE 1394 employs a packet communication method, and a control signal called arbitration is always exchanged before packet data communication. Therefore, in order to take advantage of the above-described switching between full-duplex and half-duplex without lowering the communication efficiency, the switching from full-duplex to half-duplex and switching from half-duplex to full-duplex are performed quickly. Need to be done.

The above-mentioned IEEE 1394 performs arbitration in full duplex and performs data communication in half duplex. Data is Data, S
The signal is transmitted using two differential signals of the probe. For more information, see IEEE StandardForaHig
hPerformanceSerialBus ".

[0006] V.V., which is a standard for facsimile communication, is used. Three
4 recommendations and T.M. In the communication protocol based on ANNEX-F of Recommendation 30, a full-duplex modem is used up to the control channel, and a half-duplex modem is used in the primary channel for transmitting image information, and the switching is performed. The details are described in Japanese Patent Application Laid-Open No. 10-173891, and the part related to the present invention is a part for switching from full-duplex communication to half-duplex communication. After transmitting the All1 data at the end of the full-duplex communication, the transmitting side of the facsimile creates a no-signal state and transmits the short training signal and the data.

[0007] JP-A-10-173891 discloses that
V. Recommendation 34 and T.M. In a communication protocol based on ANNEX-F of 30 Recommendations, a means for reliably switching from full-duplex communication to half-duplex communication is presented.

[0008]

SUMMARY OF THE INVENTION However, the IEEE
In E1394, the communication paths Data and Strobe
Since a clock signal for sampling Data can be generated from these two signals, there is no need for clock data recovery normally required for serial communication.
When the same timing is applied to serial communication of an optical fiber or the like, a receiver that can accurately receive the transmission signal from the first bit and a clock data recovery that can synchronize from the first bit are required. However, there has been a problem that the cost of the receiver and the clock data recovery are increased and the performance is deteriorated.

V. According to Recommendation 34, there is no signal when transitioning from full-duplex to half-duplex, and then a short training signal for synchronization is transmitted, which is not efficient. V. According to Recommendation 34, switching is performed only once, so there is no need to worry about efficiency. However, this method has a problem that it does not operate efficiently with a protocol that performs switching frequently.

[0010]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, a communication method in which communication apparatuses are connected by a full-duplex communication path and a half-duplex communication path, and switches communication paths according to communication contents to perform communication. When switching from full-duplex communication to half-duplex communication, a full-duplex communication end signal is transmitted to the full-duplex communication path, and a half-duplex communication start signal is transmitted to the half-duplex communication path. And when switching from half-duplex communication to full-duplex communication, a full-duplex communication start signal is sent to the full-duplex communication path, and a half-duplex communication end control signal is sent to the half-duplex communication path. Transmitting the full-duplex communication start signal to the full-duplex communication path when the full-duplex communication start signal is detected in the received signal of the half-duplex communication. It is characterized by switching to duplex communication and half-duplex communication for packet data communication. That.

When switching from half-duplex communication to full-duplex communication, when transmitting half-duplex communication, a half-duplex communication end signal is transmitted to the half-duplex communication path and the full-duplex communication path is transmitted. Transmitting a full-duplex bit synchronization signal as a full-duplex communication start signal, and detecting a full-duplex bit synchronization signal from a communication partner during transmission of the full-duplex bit synchronization signal. Transmitting a character synchronization signal, and transmitting a full-duplex bit synchronization signal as a full-duplex communication start signal when a full-duplex bit synchronization signal from a communication partner is detected during reception of half-duplex communication. When,
Transmitting a full-duplex character synchronization signal upon detection of a full-duplex character synchronization signal from a communication partner.

The half-duplex communication start signal and the full-duplex communication end signal have the same signal pattern in the full-duplex communication path and the half-duplex communication path. The same signal pattern is used for the full-duplex communication start signal in the full-duplex communication path and the half-duplex communication path.

A communication apparatus comprising a full-duplex communication unit, a half-duplex communication unit, and a full-duplex / half-duplex transmission / reception control unit, wherein communication is performed by switching communication units according to communication contents.
The full-duplex / half-duplex transmission / reception control unit simultaneously transmits signals to both the full-duplex communication path and the half-duplex communication path at the start of half-duplex transmission and at the end of half-duplex transmission. When a full-duplex communication start signal is detected at the end of half-duplex reception, a full-duplex communication start signal is transmitted to the full-duplex communication path.

The full-duplex / half-duplex transmission / reception control unit includes a bit synchronization signal output unit for transmitting a full-duplex bit synchronization signal, and a bit synchronization signal detection unit for detecting the full-duplex bit synchronization signal. A character synchronizing signal output means for transmitting a full-duplex character synchronizing signal, and a character synchronizing signal detecting means for detecting the full-duplex character synchronizing signal. When the bit synchronization signal is transmitted and the full-duplex bit synchronization signal is detected, the full-duplex character synchronization signal is transmitted, and when the half-duplex communication is completed, the full-duplex bit synchronization signal is detected. When a full-duplex bit synchronization signal is transmitted and the full-duplex character synchronization signal is detected, the full-duplex character synchronization signal is transmitted and the full-duplex communication is transmitted. And performs fine half-duplex communication with serial communication.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [Embodiment] FIG.
FIG. 1 is a schematic configuration diagram illustrating an embodiment of a communication device when adapting to EEE1394.

FIG. 1 shows an apparatus corresponding to the physical layer of IEEE 1394, and IEEE 1394 generally supports a plurality of ports. FIG. 1 shows the case where there is one port, but this does not limit the effect of the invention to one port.

In FIG. 1, reference numeral 201 denotes a link layer interface, which is a circuit for connecting to a device (LSI) that supports an upper layer protocol of IEEE 1394. Reference numeral 202 denotes an arbitration state machine that supports an IEEE 1394 bus arbitration protocol. For the operation of the state machine, refer to “IEEE Standard Forra High”.
Performance SerialBus ", which is a well-known technique, and is omitted here.
Reference numeral 3 denotes a transmission data encoder, which encodes transmission data in a form suitable for serial communication. P139
The 8B / 10B method adopted in 4b is used. A reception data decoder 204 decodes the data encoded by the encoder 203. 205
Is a full-duplex / half-duplex transmission / reception control unit, which is a central part of the present invention, and will be described later in detail. A medium access unit 206 supports full-duplex communication and half-duplex communication.
This embodiment is characterized in that an arbitration signal is transmitted and received by full-duplex communication and data is transmitted and received by half-duplex communication.

FIG. 2 is a detailed block diagram of the full-duplex / half-duplex transmission / reception control unit 205 of FIG. Reference numeral 101 denotes a full-duplex transmission state machine, which is a circuit that determines a full-duplex transmission signal. Further, the full-duplex transmission state machine 101
Is the full-duplex character synchronization 1 that constitutes the full-duplex receiving circuit.
02 and the operation state of the full-duplex bit synchronization 103 is controlled. The full-duplex character synchronization 102 performs character synchronization for full-duplex reception. Full-duplex character synchronization 1
02 is connected to the full-duplex transmission state machine 101 so as to notify when a character synchronization signal is received.

The full-duplex bit synchronization 103 performs bit synchronization of a full-duplex reception signal. Full-duplex bit synchronization 103
Tells you when bit synchronization is complete,
It is connected to a full-duplex transmission state machine 101. The half-duplex transmission state machine 104 is a circuit that forms a format of transmission data. The half-duplex transmission state machine 104 includes DATA_PREFIX, DATA_EN
While transmitting D, it is connected to the full-duplex transmission state machine 101 to indicate it.

The packet interpretation circuit 105 is a part for interpreting a packet for receiving half-duplex data. The packet interpretation circuit 105 is connected to the full-duplex transmission state machine 101 to notify it when DATA_END is received. The half-duplex synchronization 106 is a circuit for establishing bit synchronization and character synchronization for half-duplex reception.

FIG. 3 is a block diagram showing a specific example of the medium access unit 206 of FIG.

In FIG. 3, the medium access unit 206
301 100MHz modulator and 302 200MHz
It consists of a demodulator, a full-duplex transmitter at 303, a half-duplex transmitter at 304, and a receiver at 305.

A 100 MHz modulator 301 applies 100 MHz modulation to a full-duplex transmission signal. 200M symmetrically
The Hz demodulator 302 demodulates the received signal modulated at 200 MHz. As the modulation and demodulation method, ASK method and PS
The K method is conceivable. The communication partner is 100, contrary to FIG.
With the provision of the MHz demodulator and the 200 MHz modulator, full-duplex communication can be performed in the 100 MHz band and the 200 MHz band. When the present invention is applied to an optical fiber, the full-duplex transmitter 303 and the half-duplex transmitter 304
An LED and its driver can be used. In that case, the receiver 305 includes a PIN photodiode and an amplifier.

In the example of FIG. 3, the output of the receiver 305 is a digital output, and the 200 MHz demodulator 302 is a digital type demodulator, but the receiver 305 is divided into a full-duplex receiver and a half-duplex receiver. It is also possible to realize full-duplex communication with a low error rate by dividing into two and incorporating an analog filter according to the modulation method.

FIG. 4 shows a full-duplex transmission state machine 101.
3 is a state transition diagram of FIG.

First, the state transition in the case of performing half-duplex transmission will be described. The state S0 is a state in which the control code from the arbitration state machine 202 is appropriately encoded and transmission is continued. DAT which is a half-duplex communication start signal from the arbitration state machine 202
Upon receiving A_PREFIX, the full-duplex transmission state machine 101 transitions from state S0 to state S1. State S
1, the full-duplex character synchronization 102 of the full-duplex receiving circuit
Stop the operation of full-duplex bit synchronization 103 and
Continue sending _PREFIX. When the half-duplex transmission state machine 104 finishes transmitting the preamble, the full-duplex transmission state machine 101 changes from the state S1 to the state S2.
Transitions to.

The state S2 is a state in which transmission of full-duplex communication is stopped. The half-duplex transmission state machine 104
When the transmission of DATA_END starts, the full-duplex transmission state machine 101 transitions from state S2 to state S3. The state S3 is a state where the full-duplex character synchronization 102 and the full-duplex bit synchronization 103 of the full-duplex receiving circuit are activated,
It is in a state of continuously transmitting the full-duplex preamble. When the full-duplex bit synchronization 103 receives the preamble and establishes bit synchronization, the full-duplex transmission state machine 101
Transitions from the state S3 to the state S4. In state S4,
A character synchronization signal SYNC is transmitted. When the transmission of the character synchronization signal is completed, the full-duplex transmission state machine 1
01 transits from the state S4 to the state S0.

Next, a description will be given of state transition in the case of performing half-duplex reception. Full-duplex character synchronization 102
When TA_PREFIX is output, that is, when the communication device receives DATA_PREFIX, the full-duplex transmission state machine 101 transitions from the state S0 to the state S5. In the state S5, transmission / reception of full duplex is stopped. When the packet interpretation circuit 105 receives DATA_END,
The full-duplex transmission state machine 101 transitions from state S5 to state S6. In the state S6, the full-duplex character synchronization 102 and the full-duplex bit synchronization 103 of the full-duplex receiving circuit are set to the operation state.

When full-duplex bit synchronization 103 receives the preamble and establishes bit synchronization, full-duplex transmission state machine 101 transitions from state S6 to state S7.
The state S7 is a state where the full-duplex preamble is continuously transmitted. Upon receiving the character synchronization signal, the full-duplex transmission state machine 101 transitions from state S7 to state S8. In state 8, the character synchronization signal SYNC is transmitted. When transmission of the character synchronization signal ends, the full-duplex transmission state machine 101 transitions from state S8 to state S0.

If an error occurs in reception in state S0, the full-duplex transmission state machine 101 sets state S3.
Transitions to. As a condition to be regarded as a reception error, it is possible to use a condition when an unused code is received or when an unused code is received continuously for a certain number of times. Further, when the preamble is received in the state S0,
The full-duplex transmission state machine 101 transitions to the state S7. This is for re-synchronization when synchronization is lost.

FIGS. 5 and 6 are diagrams showing transmission and reception timings in the first embodiment. This example is based on IEEE 139
It is assumed that two nodes complying with four protocols perform communication. In IEEE 1394, a parent-child relationship between nodes is determined immediately after connection. For simplicity, communication between two nodes has been taken, but this does not limit the invention to communication between two nodes.

FIG. 5 shows an example in which a child node transfers an IEEE1
394 packets are transmitted. The top row of FIG. 5 shows the contents that the child node outputs to the half-duplex communication path, and the second row shows the contents that the child node outputs to the full-duplex communication path. The third column shows the content that the parent node outputs to the full-duplex communication path.

The child node outputs a REQUEST signal 508 to obtain a transmission right on the full-duplex communication path. During this time, IDLE 514 is output from the parent node to the full-duplex communication path. The parent node that has received the REQUEST 508 signal outputs a GRANT signal 515 for giving a transmission right to the child node to the full-duplex communication path according to the arbitration state machine 202.

When the child node receives the GRANT signal 515, the arbitration state machine 202
DATA_PR is transmitted to the full-duplex / half-duplex transmission / reception control unit 205.
Give EFIX. DATA Upon receiving PREFIX, the full-duplex transmission state machine 101 and the half-duplex transmission state machine 104 PREFIX
And a half-duplex communication start signal (PREAMBLE) to the medium access unit 206.

As a result, the child node establishes a D
ATA_PREFIX 509 is transmitted, and transmission of a half-duplex communication start signal 502 for synchronizing bits on the receiving side to a half-duplex communication path is started. When receiving the transmission data through the link layer interface 201, the child node transmits a half-duplex character synchronization signal (SYNC) 503 for synchronizing characters on the receiving side and stops transmission to the full-duplex communication path. NO SIGNAL510
Becomes After that, the transmission data 504 is transmitted.

The parent node sends DATA_PR from the child node.
Upon receiving the EFIX signal 509, transmission to the full-duplex communication channel is stopped.

When the data transmission is completed, the child node transmits the DATA_END signal 505 to the half-duplex communication path for a certain period, and transmits the full-duplex communication start signal 5 to the full-duplex communication path.
11 is transmitted. It is not necessary that the DATA_END signal 505 and the full-duplex communication start signal 511 have the same length. After transmitting the DATA_END signal 505 for a certain period, the child node stops outputting to the half-duplex communication path.

The parent node receives the full-duplex communication start signal 511 from the child node, and transmits a full-duplex communication start signal 517 when bit synchronization is established. The child node receives the full-duplex communication start signal 517, and when the bit synchronization is established, the full-duplex character synchronization signal 51
2 and then the arbitration control signal 5
13 is started.

When the parent node receives the full-duplex character synchronizing signal 512 from the child node, it transmits the full-duplex character synchronizing signal 518, and then starts transmitting the arbitration control signal. The above procedure for terminating half-duplex communication and starting full-duplex communication will be referred to herein as handshake.

FIG. 6 is a timing chart showing a procedure for transmitting data from the parent node to the child node. The full-duplex transmission timing is the same as that in FIG. As in the case of FIG. 5, DATA_PREF
IX606, half-duplex PREAMBLE612, DA
TA_END 615 and a full-duplex communication start signal 608 are simultaneously output.

The communication method in which a full-duplex character synchronization signal is transmitted after a full-duplex communication start signal has been described as an example. However, when encoding that does not require character synchronization is used for data encoding, full-duplex character synchronization is used. It is also possible to transmit data directly after the start of heavy communication. In that case, where full-duplex character synchronization detection is used in the above description, effective code detection may be used instead.

When the same signal train is used for DATA_PREFIX, a communication start signal for half-duplex, and DATA_END and a communication start signal for full-duplex, the full-duplex communication path and the half-duplex communication path may interfere with each other. Also, the present invention can be applied.

FIG. 7 shows an example of code assignment of control signals used in the communication method and apparatus of the present invention.

[0044]

According to the present invention, since the preamble is transmitted at the same time as the signal indicating the switching of the communication channel, the efficiency is not reduced due to the preamble. Also, when switching from half-duplex communication to full-duplex communication, a handshake procedure is taken, so that the switching can be performed reliably.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of a communication device according to a communication method and device of the present invention.

FIG. 2 is a configuration diagram of one embodiment of a full-duplex / half-duplex transmission / reception control unit shown in FIG. 1;

FIG. 3 is a configuration diagram of one embodiment of a medium access unit shown in FIG. 1;

FIG. 4 is a state transition diagram of the full-duplex / half-duplex transmission state machine shown in FIG.

FIG. 5 is a timing chart according to the communication method and device of the present invention.

FIG. 6 is a timing chart according to the communication method and apparatus of the present invention.

FIG. 7 is an example of code assignment of a control signal used in the communication method and device of the present invention.

[Explanation of symbols]

 Reference Signs List 101 full-duplex transmission state machine 102 full-duplex character synchronization circuit 103 full-duplex bit synchronization circuit 104 half-duplex transmission state machine 105 packet interpretation circuit 106 half-duplex synchronization circuit 201 link layer interface 202 arbitration state machine 203 transmission data encoder 204 Reception data decoder 205 Full-duplex / half-duplex transmission / reception control unit 206 Medium access unit 207 Transmission arbitration signal 208 Reception arbitration signal 209 Transmission data signal 210 Reception data signal 211 Full-duplex transmission signal 212 Full-duplex reception signal 213 Half two Double transmission signal 214 Half-duplex reception signal 301 100 MHz modulator 302 200 MHz demodulator 303 Transmitter 304 Transmitter 305 Receiver

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masafumi Takahashi 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation (72) Inventor Daisuke Nakano 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka (72) Inventor Kazuki Sumimi 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka Sharp Corporation (72) Inventor Toru 22-22 Nagaikecho, Abeno-ku, Osaka City, Osaka Sharp Corporation F Terms (reference) 5K034 AA04 AA06 AA07 CC06 DD01 DD05 DD06 EE11 HH01 HH02 HH07 HH11 HH12 MM06 NN12 NN13 NN22 NN26 PP02 PP06

Claims (5)

[Claims] 1. A communication method in which communication apparatuses are connected by a full-duplex communication path and a half-duplex communication path, and switch communication paths according to communication contents to perform communication. When switching to communication, transmitting a full-duplex communication end signal to the full-duplex communication path and transmitting a half-duplex communication start signal to the half-duplex communication path; When switching to communication, a full-duplex communication start signal is transmitted to the full-duplex communication path, and a half-duplex communication end control signal is transmitted to the half-duplex communication path. Transmitting a full-duplex communication start signal to the full-duplex communication path when the full-duplex communication start signal is detected. A communication method characterized by performing communication by switching to heavy communication. 2. When switching from half-duplex communication to full-duplex communication, when transmitting half-duplex communication, a half-duplex communication end signal is transmitted to the half-duplex communication path and the full-duplex communication path is transmitted. Transmitting a full-duplex bit synchronization signal as a full-duplex communication start signal, and detecting a full-duplex bit synchronization signal from a communication partner while transmitting the full-duplex bit synchronization signal. Transmitting a character synchronization signal, and transmitting a full-duplex bit synchronization signal as a full-duplex communication start signal when a full-duplex bit synchronization signal from a communication partner is detected during reception of half-duplex communication. 2. The communication method according to claim 1, further comprising: transmitting a full-duplex character synchronization signal upon detecting a full-duplex character synchronization signal from a communication partner. 3. The half-duplex communication start signal and the full-duplex communication end signal have the same signal pattern in the full-duplex communication path and the half-duplex communication path. 3. The communication method according to claim 1, wherein the full-duplex communication start signal uses the same signal pattern in the full-duplex communication path and the half-duplex communication path. 4. A full-duplex communication means, a half-duplex communication means,
A communication device, comprising: a full-duplex / half-duplex transmission / reception control unit, wherein communication is performed by switching communication means according to communication contents, wherein the full-duplex / half-duplex transmission / reception control unit is configured to execute a half-duplex transmission At the end of half-duplex transmission, a signal is transmitted simultaneously to both the full-duplex communication path and the half-duplex communication path, and when a full-duplex communication start signal is detected at the end of half-duplex reception,
A communication device for transmitting a full-duplex communication start signal to the full-duplex communication path. 5. The full-duplex / half-duplex transmission / reception control unit includes: a bit synchronization signal output unit that transmits a full-duplex bit synchronization signal; and a bit synchronization signal detection unit that detects the full-duplex bit synchronization signal. A character synchronizing signal output means for transmitting a full-duplex character synchronizing signal; and a character synchronizing signal detecting means for detecting the full-duplex character synchronizing signal. When the synchronization signal is transmitted and the full-duplex bit synchronization signal is detected, the full-duplex character synchronization signal is transmitted. When the half-duplex communication is completed, the full-duplex bit synchronization signal is detected. When the bit synchronization signal for duplex is transmitted and the character synchronization signal for full duplex is detected, the character synchronization signal for full duplex is transmitted and the full-duplex communication and half-duplex communication are performed. Communication apparatus according to claim 4, characterized in that the heavy communicate over a serial communications.