JP2001078059A - Electronic camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the remarkable deceleration of a processing speed and burden on a memory by successively relocating image information for the unit of a block, for which image information stored in a storage device is divided into prescribed size, in a row or column direction and performing pixel conversion or image compression by reading the stored image information for each block. SOLUTION: Data in respective blocks are extracted and the data are rearranged (relocated) and stored in a memory area. Only the required data are extracted and pixel number conversion or JPEG compression is performed. Thus, since these relocated data are data usable for desired image processing as they are, processing efficiency is improved. Further, since processing for reading the image information stored in a buffer memory 30, relocating that information and storing it in a buffer memory 31 later and processing for extracting the relocated data from the buffer memory 31 and performing desired image processing can be performed parallel, processing is not made stagnant.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic camera capable of taking a desired image and recording / displaying the image information.

[0002]

2. Description of the Related Art In an electronic camera, a photographed image is temporarily stored in a built-in memory (for example, DRAM) which can be accessed at high speed. Thereafter, predetermined image processing (for example, enlargement / reduction, etc.) is performed using the captured image information stored in the internal memory. That is, it is configured to directly access the built-in memory storing the shot image information stored in the built-in memory, read the shot image information, and thereafter perform predetermined image processing.

However, when image processing is performed, when the photographed image information is read directly from the built-in memory as described above, for example, of the information stored in one line in the built-in memory, the processing to be performed at the present time Image information that is not directly related to the image must be read. Furthermore, particularly when performing image processing while obtaining an interpolation value using a large amount of data, such as enlargement or reduction processing, access to the built-in memory becomes frequent and the processing time becomes longer. Therefore, at present, both the access time and the memory capacity are wasteful. Also, higher image quality is required for electronic cameras, and the higher the image quality, the greater the number of pixels. Therefore, the processing load is further increased, which leads to a time lag in shooting.

[0004]

As described above, in the conventional electronic camera, the image processing is performed by directly accessing the internal memory and reading the image information. Therefore, the processing time is long and a wasteful capacity is required. Therefore, there is a problem that it leads to a time lag of shooting.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has a high image processing speed and a low cost even when the number of pixels is large (ie, high image quality). It is an object to provide a simple electronic camera.

[0006]

According to the present invention, the following means have been taken in order to solve the above-mentioned problems.

The electronic camera according to the present invention has a storage means for storing photographed image information, a dividing means for dividing the image information stored in the storage means into blocks of a predetermined size, and the divided block. A block-order image information storage unit for sequentially rearranging and storing unit image information in a row direction or a column direction, and reading out image information stored in the block-order image information storage unit for each block, and performing pixel conversion or image conversion. Image processing means for compression. Since the image information is sequentially rearranged in the divided block units and then processed, even if the number of pixels increases, the processing speed can be significantly reduced and the load on the memory can be reduced.

In the above electronic camera, the dividing means converts the image information stored in the storage means to 8n × 8m.
(N and m are positive integers). This enables efficient processing.

In the above electronic camera, the image processing means performs the pixel conversion by an interpolation method using an approximate expression using a third-order or higher-order polynomial. With this interpolation method, it is possible to perform image processing with high accuracy and high speed.

[0010]

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic block diagram showing a system configuration of an electronic camera according to one embodiment of the present invention. FIG.
A schematic configuration of an electronic camera according to the present invention will be described with reference to FIG.

An image of a subject that has passed through the photographing lens system 11 is converted into an electric signal by the image pickup device 12. Image sensor 1
The electric signal converted in 2 is converted into an analog image signal by the imaging circuit 13 and then converted into a digital image signal by the A / D converter 14. Then, the digital image signal is subjected to a predetermined process and, for example, an interface (I / I / O) to a detachable removable memory 20 (for example, a flash memory, a smart media, or the like) as an external memory.
F) recorded via 21; The removable memory 20 is usually mounted in the card slot 22. The electronic camera has a high-speed built-in memory 30 (for example, a random access memory (RAM) or the like), and is used as a working memory in various image processing or as a high-speed buffer as a temporary image storage unit. Is done. In the present invention, the built-in memory 30 has a memory area 31 for interpolation processing or image information rearrangement. The memory area 31 may be a memory independent of the built-in memory 30. The memory for interpolation processing may be a memory built in an arithmetic circuit (or IC), but the memory for image information rearrangement is a dedicated memory (for example, an SRAM capable of high-speed processing). It is preferable that

The image processing circuit 40 is for compressing a digital image signal and expanding (expanding) the compressed image signal.

The electronic camera is equipped with an LCD 50 (liquid crystal display) for normal image display.
The CD 50 displays an image recorded in the removable memory 20 and an image to be photographed. This LCD 50
The image displayed on the LCD is temporarily fetched from the built-in memory 30 into the video memory 51 and then converted into a video image by the video output circuit 52 so that the image can be displayed on the image display LCD 50. The video output circuit 5
The second output is capable of outputting a video image to an external display device via an external terminal 53 for video output.

The system controller 70 controls the entire device of the electronic camera, and its function will be described later in detail. The system controller 70 receives an input from the operation unit 73 composed of a release, performs shooting by operating the release, and controls the operation of the image processing circuit 40. Further, when the amount of light at the time of shooting the subject is insufficient, the system controller 70 requests the strobe light emitting unit 71 to turn on the strobe and perform shooting. Further, the system controller 70 has an unillustrated photographing distance detecting unit, which has a function of detecting a distance to a subject. The operation unit 73
Can set various modes, and the mode settings are displayed on the mode LCD 72.

External interface (external I / F) 61
Is connected to the external input / output terminal 60 to input / output data to / from an external device. For example, a personal computer or the like is connected to the external input / output terminal 60 to transfer an image in the detachable memory 20 to the personal computer or the like and to input image data from the personal computer or the like.

Each section of the electronic camera is basically driven by a battery, and each section of the camera is driven by electric power from a camera battery 81 via a power supply section 80. The camera battery 81 is connected to the power supply unit 8.
It can be charged by the control of 0.

The present invention is characterized in that photographed image information stored in the built-in memory 30 is temporarily rearranged in the memory area 31, and image processing is performed using the rearranged image information data. In addition, the rearranged image information data is interpolated by an approximate expression using a third-order or higher-order polynomial.

First, in image processing, an interpolation method applied to pixel number conversion in enlargement / reduction will be described, and then, data rearrangement will be described.

FIG. 2 is a diagram showing a one-dimensional interpolation model. Conventionally, as shown in FIG. 2A, linear interpolation for calculating an output value at a desired position by a straight line connecting two points has been generally used. In this way, the position having a known output value required for calculation may be two points. However, since the output value of the proportional average between the two points is determined, for example, the maximum value or the maximum value between the two points is obtained. Even if there is a minimum value, it cannot be detected. In the present invention, in order to increase the interpolation accuracy, an output value at a desired position is obtained using an approximate expression based on at least a third-order or higher-order polynomial. FIG. 2 shows an example in which a coefficient of a third-order polynomial is obtained from the values of four points, and position data is inserted into an approximate expression based on the obtained third-order polynomial to obtain an output. Note that the interpolation using the approximate expression using the third-order polynomial is also referred to as “Cubic interpolation”. In FIG. 2, a coefficient of a third-order polynomial is obtained from output values of four points at positions n-1, n, n + 1, and n + 2, and an output value at a position x 'is obtained from the third-order polynomial to obtain an interpolation value at a desired position. Is obtained. In consideration of the case where this is performed by, for example, linear interpolation, the position having the maximum value is n + 1. Therefore, it is clear that an accurate position cannot be obtained unlike the case of the present invention.

FIG. 3 shows an interpolation operation circuit 90 according to the present invention.
It is a block diagram of. The interpolation calculation circuit 90 includes an interpolation position calculation unit 91, an interpolation position correction unit 92, and an interpolation coefficient table 9
3, the interpolation calculation unit 94, and the buffer memory 31. The functions of the interpolation position calculator 91 to the interpolation calculator 94 are performed by the system controller 70. Specifically, the interpolation operation circuit 90 performs the following operation.

The original image data from the built-in memory 30 is input to the interpolation position calculator 91 and the interpolation calculator 94. The interpolation position calculation unit 91 may be configured, for example, as shown in FIG.
(B) Interpolation position x 'between point n and point n + 1
Is calculated. Next, in order to simplify the calculation, the interpolation position correction unit 92 sets the interpolation position from the memory area 31 to a point closest to the point x ′ when the distance between the point n and the point n + 1 is divided into 16 equal parts. Modify based on the data in By correcting the interpolation position in this way, it is possible to calculate the output at the corrected interpolation position using the interpolation coefficient table 93 prepared in advance, so that the interpolation position can be calculated at high speed without performing complicated calculations. The output value can be calculated. It should be noted that the error caused by the correction of the interpolation position is not realistic because the interpolation coefficient is given in the table.
If the positions are equally divided, the accuracy is sufficient, and the amount of data does not increase so much.

Next, a data relocation method will be described. Normally, data is fetched in the built-in memory 30 in the order of input and stored, for example, as one image data. Then, data is taken out from the built-in memory 30 and predetermined image processing is performed. This image processing includes, for example, pixel number conversion, compression / decompression (in the case of compression, usually J
PEG compression is used). In this case, since it is impossible to process one image data at a time, the data is read out for each block, and after the desired processing is performed by the image processing circuit 40, the internal memory 30 The data after the processing is recorded in. In this case, the data in the internal memory 30 is, for example, A1 as shown in FIG.
Are divided into a plurality of blocks that can be processed at a time, such as .about.P1, A2 to P2,..., And desired processing is performed for each block. However, for example, when divided into blocks of a predetermined size, continuous data is divided into two or more blocks, in this case, block 1 and block m + 1.
And if there is no data in two blocks, the continuity of data may be lost and image processing may not be performed. In this case, the image processing must be performed after reading out the two blocks and extracting necessary data, so that the access time and the memory capacity are wasted. Further, the access to the built-in memory 30 becomes frequent, so that the processing time increases.

In the data relocation method of the present invention, first,
The image information stored in the built-in memory 30 is divided into blocks of a predetermined size, data is rearranged so that data processing can be performed smoothly, and the rearranged data is stored in the memory area 31. I have. This data relocation will be briefly described with reference to FIG.

FIG. 5 shows 16 (0) as shown in FIG.
To 15), the rearrangement is performed on the one-dimensional data. In this case, the one-dimensional data in (a) is interpolated so that the interpolation using the approximate expression of the third-order polynomial can be performed using the four data. The data is rearranged as shown in FIG. This makes it possible to perform interpolation using an approximate expression of a third-order polynomial using four data. That is, in (b), there are four memories that can store four data, and one data is taken out from each memory and interpolation processing is performed. For example, in (b), 1
In the second interpolation, the data of (0, 1, 2, 3) in the figure is interpolated, and in the second interpolation, the data of (4, 1, 2, 3) is read out and interpolated.

FIG. 5C shows an example in which the above-described one-dimensional configuration is applied to two-dimensional interpolation processing. Here, when the image data is subjected to interpolation processing in units of 4 × 4 data blocks shown in FIG. 4A, the data in each block is extracted as shown in FIG. They are rearranged (rearranged) so that they can be stored in the memory area. And take out the necessary data,
Pixel number conversion and JPEG compression are performed. With this configuration, the rearranged data is data that can be used for desired image processing as it is, so that processing efficiency is improved. Further, a process of reading out image information stored in the internal memory 30 and rearranging the same, and then storing the image information in the memory region 31 and a process of taking out the rearranged data from the memory region 31 and performing desired image processing are respectively performed by Since the processing can be executed independently, that is, parallel processing is possible, the processing does not stagnate. Further, the load of the image processing exponentially increases as the image data to be processed increases, so that the image information stored in the internal memory 30 is read out, rearranged, and then stored in the memory area 31;
Even when the process of taking out the rearranged data from the memory area 31 and performing the desired image processing is not performed in parallel, the rearrangement is performed in addition to the effect that unnecessary access is eliminated, and the data is divided and processed. The processing time can be shortened.

In the above embodiment, for the sake of explanation, an example in which 4 × 4 = 16 data is extracted and rearranged has been described. However, in practice, data having a size of 8 × 8 = 64 has been described. , 16 × 16 = 256 data, etc. 8
It is preferable to perform the rearrangement by dividing the image into n × 8m (n and m are positive integers). It is preferable to read data from the built-in memory 30 with a size of 32 × 32 and to create 16 pieces of relocation data having a size of 8 × 8. In some cases, interpolation data cannot be obtained due to data processing at the end portion of. Therefore, it is necessary to provide an overlapping area of partial data so that interpolation data can be obtained.

The present invention is not limited to the above embodiments of the present invention, and can be, of course, carried out in various modifications without departing from the spirit of the present invention.

[0029]

According to the present invention, the following effects can be obtained.

Since the image information is sequentially rearranged in units of the divided blocks and then processed, even if the number of pixels increases, the processing speed can be significantly reduced and the load on the memory can be reduced. Further, the image information stored in the storage means is stored in 8
Since the image data is divided into n × 8m (n and m are positive integers), efficient processing is possible.

Further, since the pixel conversion is performed by an interpolation method using an approximate expression using a third-order or higher-order polynomial, image processing can be performed with high accuracy and at high speed.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram showing a system configuration of an electronic camera according to an embodiment of the present invention.

FIG. 2 is a diagram showing a one-dimensional interpolation model.

FIG. 3 is a block diagram of an interpolation operation circuit 90 according to the present invention.

FIG. 4 is a diagram for explaining block division of a built-in memory;

FIG. 5 is a diagram for explaining data relocation.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 ... photography lens system, 12 ... imaging element, 13 ... imaging circuit, 14 ... A / D converter, 20 ... detachable memory, 21 ... interface (I / F), 22 ... card slot, 30 ... built-in memory, 31 ... Memory area, 40: Image processing circuit, 50: LCD, 51: Video memory, 52: Video output circuit, 53: External terminal, 70: Syscon 73: Operation unit, 71: Strobe light emitting unit, 61: External interface (external I) / F), 80: power supply section, 81: camera battery, 90: interpolation arithmetic circuit.

Claims (3)

[Claims] A storage unit configured to store captured image information; a division unit configured to divide the image information stored in the storage unit into blocks of a predetermined size; Block order image information storage means for sequentially rearranging and storing in the row direction or column direction, and image processing means for reading out the image information stored in the block order image information storage unit for each block and performing pixel conversion or image compression An electronic camera comprising: 2. The electronic camera according to claim 1, wherein said dividing means converts the image information stored in said storage means into eight.
An electronic camera, which is divided into n × 8 m (n and m are positive integers). 3. An electronic camera according to claim 1, wherein said image processing means performs said pixel conversion by an interpolation method using an approximate expression using a third-order or higher-order polynomial.