JP2001077191A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a trench element isolation technique which can suppress kinks (hums) or reverse short channel effect and improve the electrical characteristics of a transistor by eliminating the so-called edge drop of a trench element isolation insulating film. SOLUTION: The method includes the steps of forming a groove 14 in a semiconductor substrate 11, forming an inner wall oxide film 16 on the inner face of the groove 14 and on a part of the substrate on the opening side of the groove 14, forming an element isolation insulating film 17 to be embedded in the interior of the groove 14, removing an excess film 17 to selectively leave the film 17 within the groove 14, and removing the oxide films (pad oxide film 12 and sacrificial oxide film 18) formed on the substrate 11 to expose the surface of the substrate 11. The oxide films, having an inner wall oxide film 16 formed on the substrate 11, are removed to form a thick film left.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an STI (Shallow Trench Isolati).
The present invention relates to a method of manufacturing a semiconductor device including a step of manufacturing the semiconductor device.

[0002]

2. Description of the Related Art A conventional STI technique will be described with reference to a manufacturing process diagram shown in FIG. As shown in FIG. 2A, a pad oxide film 112 is formed on the surface of the silicon substrate 111 by 10 nm to 2 nm.
It is formed to a thickness of 0 nm. Further, a silicon nitride film 113 is formed to a thickness of 150 nm to 200 nm by a CVD method.

[0003] Thereafter, as shown in FIG. 2 (2), after forming a resist film by a normal resist coating technique, the resist film is processed by a lithography technique to form an active pattern (not shown). Is used as a mask to etch silicon nitride film 113 and pad oxide film 112. After that, the active pattern is removed.
Next, using the silicon nitride film 113 as a mask, the silicon substrate 111 is etched to a depth of 300 nm to 400 nm to form a groove 114.

[0004] Next, as shown in FIG. 2 (3), the inner surface of the groove 114 is oxidized by a thermal oxidation method to form a thermal oxide film 11.
5 is formed. Next, as shown in FIG. 2D, a silicon oxide film 11 is formed on the silicon nitride film 113 by high-density plasma CVD so as to fill the inside of the groove 114.
6 is formed. Thereafter, as shown in (5) of FIG. 2, chemical mechanical polishing is performed to polish the silicon oxide film 116 to flatten the surface.

Next, the silicon nitride film 113 is removed by wet etching using hot phosphoric acid, and the pad oxide film 112 is exposed as shown in FIG. 2 (6). Next, the pad oxide film 112 is removed by wet etching using hydrofluoric acid.
At this time, as shown in FIG. 2 (7), the silicon oxide film 116 buried in the groove 114 is also etched. Particularly, since the edge portion 117 of the silicon oxide film 116 is easily etched, the edge portion 117 is largely retracted. After that, a sacrificial oxide film 118 is formed on the surface of the silicon substrate 111. Then, the sacrificial oxide film 1 is wet-etched with hydrofluoric acid.
18 is removed by etching. At this time, the silicon oxide film 116 is also etched as shown in FIG.
In particular, the edge portion 117 of the silicon oxide film 116 further recedes. Thereafter, a gate oxide film 119 is formed on the surface of the silicon substrate 111.

[0006]

However, in the above-mentioned conventional method of manufacturing a trench (trench) element isolation, the edge portion of the silicon oxide film buried in the STI trench is largely receded from the surface of the silicon substrate. Also lowers greatly. Therefore, gate processing becomes difficult,
A Kink (Hump) or inverse narrow channel effect occurs, which significantly deteriorates the electrical characteristics of the transistor.
This is because (Andres Bryant et.al., IEEEElectron De
v. (1993), AHPerea et.al., IEDM Tech. Digest., p67
9 (1995)).

The above problem is solved by BH Roh, et.al., SSDM (1995).
KIKUYO OJE et.al., IEEE Trensaction on Electron
Although a solution is attempted by a method of implanting ions into the side wall of the groove disclosed in Device (1998), each method has a problem that a manufacturing process becomes complicated.

[0008]

SUMMARY OF THE INVENTION The present invention is a method for manufacturing a semiconductor device which has been made to solve the above problems,
Forming a groove in the semiconductor substrate, selectively oxidizing the semiconductor substrate on the inner surface of the groove and on the opening side of the groove to form an inner wall oxide film, and forming an element isolation insulating film so as to fill the groove. Forming an oxide film formed on the semiconductor substrate; removing an excess element isolation insulating film formed on the semiconductor substrate to selectively leave the element isolation insulating film inside the groove; and removing an oxide film formed on the semiconductor substrate. Exposing the surface of the semiconductor substrate by exposure to heat, wherein the inner wall oxide film is formed to a thickness that remains after removing the oxide film formed on the semiconductor substrate.

In the method of manufacturing a semiconductor device, the inner wall oxide film formed by selectively oxidizing the inner surface of the groove formed in the semiconductor substrate and the opening side of the groove removes the oxide film formed on the semiconductor substrate. Since the film is formed to have a thickness that remains even after performing the process, even if the pad oxide film, the sacrificial oxide film, and the like formed on the semiconductor substrate are removed, the element isolation insulating film at the groove opening end is removed. You will not be depressed.
As described above, since no step is formed between the element isolation insulating film and the active region of the semiconductor substrate, in other words, a part of the inner wall oxide film formed on the opening side of the groove is left on the surface of the semiconductor substrate. Since the gate insulating film is formed, the gate insulating film is formed on the semiconductor substrate with good coverage.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One example of an embodiment according to the present invention will be described with reference to a manufacturing process diagram of FIG.

As shown in FIG. 1A, a pad oxide film 12 is formed on a surface of a semiconductor substrate (for example, a silicon substrate) 11.
Is formed to a thickness of, for example, 8 nm to 10 nm. Further C
By the VD method, the silicon nitride film 13 is, for example, 200 n
m.

Next, as shown in FIG. 1B, after forming a resist film by a normal resist coating technique, the resist film is processed by a lithography technique to form an active pattern (not shown). Is used as a mask to etch silicon nitride film 13 and pad oxide film 12. After that, the active pattern is removed. Next, using the silicon nitride film 13 as a mask, the semiconductor substrate 11
Is etched to a depth of 300 nm to 400 nm,
4 is formed.

Next, the undercut 15 is formed by removing the pad oxide film 12 by, for example, about 30 nm in the depth direction by wet etching using, for example, hydrofluoric acid, which selectively etches the silicon oxide film.

Next, as shown in FIG. 1C, the opening of the groove 14 which becomes the inner surface of the groove 14 and the active region end 11E is selectively oxidized using the silicon nitride film 13 as an oxidation mask. The inner wall oxide film 16 is formed on the side semiconductor substrate 11.
Is formed to a thickness of, for example, 20 nm to 30 nm. This oxidation is performed, for example, in a hydrochloric acid + dry oxidation atmosphere at 100
The heat treatment is performed at about 0 ° C. to 1150 ° C. As a result, the active region end 11E has a round shape.

Next, as shown in FIG. 1D, an element isolation insulating film 17 is formed on the silicon nitride film 13 by a high-density plasma CVD method so as to fill the trench 14 with a silicon oxide film, for example. Form. This high density plasma C
In the VD method, since chemical vapor deposition is performed while sputtering, deposition at an edge portion is suppressed, and deposition is performed on the bottom of the groove 14 and the silicon nitride film 13 on the active region. As a result, the edge portion is deposited in an inclined state. Thereafter, as shown in FIG. 1 (5), chemical mechanical polishing is performed using the silicon nitride film 13 as a polishing mask, and the element isolation insulating film 17 is polished to flatten its surface. This planarization is preferably performed after the element isolation insulating film 17 on the active region is removed by etching.

Next, the silicon nitride film 13 is removed by wet etching using hot phosphoric acid. Further, the pad oxide film 12 is removed by wet etching using hydrofluoric acid to expose the semiconductor substrate 11 as shown in FIG. At this time, the removal amount by hydrofluoric acid is 2 times the thickness of the pad oxide film 12.
The thickness is set to the thickness of the oxide film in consideration of a margin of about 0%.
After that, a sacrificial oxide film 18 is formed on the surface of the semiconductor substrate 11, as shown in FIG. Then, the sacrificial oxide film 18 is removed by wet etching using hydrofluoric acid. At this time, the removal amount by hydrofluoric acid is set to the thickness of the oxide film with a margin of about 20% with respect to the thickness of the sacrificial oxide film 18.

Thereafter, as shown in FIG. 1 (8), a gate oxide film 19 is formed on the surface of the semiconductor substrate 11. At this time, the inner wall oxide film 16 is left at the active region end 11E. That is, the amount of hydrofluoric acid required to remove the pad oxide film 12 and the sacrificial oxide film 18 is made smaller than the amount of hydrofluoric acid required to remove the inner wall oxide film 16 at the active region end 11E. As an example, when the pad oxide film 12 is formed to a thickness of 10 nm and the sacrificial oxide film 18 is formed to a thickness of 10 nm, hydrofluoric acid necessary to remove the pad oxide film 12 and the sacrificial oxide film 18 is formed. The amount is 20%
The amount is such that the oxide film having a thickness of 24 nm can be removed in consideration of the margin. Therefore, the thickness of the inner wall oxide film 16 is
It is thicker than 24 nm, for example, 30 nm.

Thereafter, a gate, an active region, an interlayer insulating film, a wiring and the like are formed by a known technique, and a semiconductor device is completed.

In the method of manufacturing the semiconductor device, the inner surface of the groove 14 formed in the semiconductor substrate 11 and the active region end 11
An inner wall oxide film 16 formed by selectively oxidizing an opening side of the groove 14 to be E remains even after performing a step of removing the pad oxide film 12 and the sacrificial oxide film 18 formed on the semiconductor substrate 11. Therefore, even if the step of removing the pad oxide film 12 and the sacrificial oxide film 18 is performed, the element isolation insulating film 16 at the opening end of the groove 14 is removed and does not fall. As described above, since no step is formed between the element isolation insulating film 16 and the active region end 11E of the semiconductor substrate 11, the gate insulating film 19 is formed on the semiconductor substrate 11 with good coverage.

Since the undercut 15 is formed by removing the pad oxide film 12 in the depth direction, the groove 14
Is oxidized to form the inner wall oxide film 16 by oxidizing the inner surface of the semiconductor substrate 11 in the undercut 15.
Is easily oxidized, so that the opening side of the groove 14 is
It becomes possible to easily and continuously oxidize thickly on the inner surface. Further, in the manufacturing process described above, only a step of etching the pad oxide film 12 to form the undercut 15 is added, as compared with the conventional manufacturing process. It is possible to form a trench element isolation.

[0021]

As described above, according to the present invention,
The inner wall oxide film formed by selectively oxidizing the inner surface of the groove formed in the semiconductor substrate and the opening side of the groove has a film thickness that remains even after performing the step of removing the oxide film formed on the semiconductor substrate. Since it is formed, even if the oxide film formed on the semiconductor substrate is removed, the element isolation insulating film at the end of the groove is removed and does not fall. As described above, it is possible to prevent the end of the element isolation insulating film from dropping below the semiconductor substrate. Therefore, the gate insulating film can be formed with good coverage over the semiconductor substrate, whereby the Kink and narrow channel effect of the transistor can be suppressed, and a semiconductor device with stable electric characteristics can be formed.

[Brief description of the drawings]

FIG. 1 is a manufacturing process diagram showing an example of an embodiment according to the present invention.

FIG. 2 is a manufacturing process diagram showing a conventional STI technique.

[Explanation of symbols]

11 semiconductor substrate, 12 pad oxide film, 14 groove, 1
6 ... inner wall oxide film, 17 ... element isolation insulating film, 18 ... sacrificial oxide film

Claims (2)

[Claims] A step of forming a groove in a semiconductor substrate; a step of selectively oxidizing an inner surface of the groove and the semiconductor substrate on an opening side of the groove to form an inner wall oxide film; Forming an element isolation insulating film so as to bury the element, and removing an excessive element isolation insulating film formed on the semiconductor substrate to selectively leave the element isolation insulating film inside the groove. Removing the oxide film formed on the semiconductor substrate to expose the surface of the semiconductor substrate, wherein the inner wall oxide film has a thickness remaining after removing the oxide film formed on the semiconductor substrate. A method for manufacturing a semiconductor device, characterized by being formed. 2. A step of forming a gate insulating film on the surface of the semiconductor substrate while exposing the surface of the semiconductor substrate and leaving a part of the inner wall oxide film formed on the opening side of the groove. The method for manufacturing a semiconductor device according to claim 1, further comprising: