JP2001069470A - Method and device for transmitting data - Google Patents

Abstract

PROBLEM TO BE SOLVED: To multiplex SDTI signal by reading the SDTI signal through a memory means as 20-bit word stream data, synthesizing it with an additional word data group containing previously formed 20-bit word synchronizing data and serially transmitting them as 20-bit word stream data. SOLUTION: Switches 12-16 distribute and store the odd-numbered and even- numbered frame periods of SDTI signals DTIS1 to DTIS5 of 5 channels in memory parts 20A, 24A, 20B and 24B. Memory parts 19A and 19B store additional word data groups DEV and DSV constituted by combining 10-bit word data composing of the timing reference code data of an SDTI signal format. Corresponding to a read control signal from a control signal forming part 17, data read out of the memory parts 19A, 19B, 20A to 24A and 20B to 24B are successively alternately coupled through data set parts 25A, 25B and 26 and compound 20-bit word stream data DZ20 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The invention described in the claims of the present application combines a plurality of digital video signals with an additional word data group including word synchronization data and inserts the additional word data group. The present invention relates to a data transmission method for forming composite 20-bit word string data and transmitting the composite 20-bit word string data for transmission, and a data transmission apparatus provided for implementing the method.

[0002]

2. Description of the Related Art In the field of transmission of digital data containing information data representing various kinds of signal information such as image information, the digital data is converted into serial data, an electric signal based on the serial data is obtained, and the signal is coaxial. A system for transmitting data through a transmission line formed using a cable or twisted pair line,
Alternatively, digital data is converted into serial data, and the serial data is converted into an optical signal, and the optical
A system for transmitting data through a transmission line formed using fibers has been put to practical use.

On the other hand, digital data representing image information, that is, image information data usually has an enormous amount of data. For example, when the data is transmitted or recorded, the quality of the data is substantially reduced. It is desired that the data is compressed so that the data amount can be reduced without lowering the data amount. Therefore, various researches and developments have been made on data compression techniques for reducing the amount of image information data. One of the results is digital data representing image information, especially moving image information. Regarding data compression for image information data that is
Moving Picture Experts Group (MPEG), a working group under the Technical Committee under the International Standards Organization
A standard system called MPEG, which has been examined and approved as a standard, has been proposed.

In the standard system called MPEG, image information data is subjected to data compression by high-efficiency coding.
When data compression by high-efficiency encoding according to EG is performed, data compression with an extremely high compression rate can be realized.
In addition, there is an advantage that an image reproduced based on the image information data subjected to the data compression can be of high quality. Therefore, in the field of business or home electronic devices such as digital video cameras and digital video tape recorders, image information data (M
PEG image information data) tends to increase.

In transmitting compressed digital video data such as MPEG image information data, and compressed digital video and audio data obtained by adding audio data to the digital video data as serial data through a transmission path. As an interface developed to be used, SDTI (Serial Data Transport
Interface) has been proposed. This SD
TI is the US SMPTE (Society of Motion Pictur)
e and Television Engineers), which is standardized as "SMPTE 305M".

The signal format under the SDTI (SDTI signal format) is, for example, as shown in FIGS.

FIG. 16A shows an SDT when the bit transmission rate at the time of serialization is 270 Mbps.
Indicates one line period in the I signal format.
Words form 10-bit word string data composed of 10 bits. Then, one frame period is formed by, for example, 525 line periods formed by connecting 525 lines.

In one line period shown in FIG. 16A, timing reference code data: EAV (End of
Active Video) and ancillary data (Ancillar
y Data) section and timing reference code data: SAV (S
tart of Active Video), followed by the payload section. EAV and SAV, respectively,
Four words (3FF, 000,000, XYZ; hexadecimal notation (the same applies hereinafter)) having the same word structure and each having a 10-bit structure are sequentially arranged. The auxiliary data section includes header data. In the payload part, user data and an error detection code: CR
C is arranged.

In the header data included in the auxiliary data portion, for example, as shown in FIG.
, An auxiliary signal flag consisting of three words (000, 3FF, 3FF): ADF, followed by data identification: DID, second data identification: SDID, data count: DC, line number: LN0, line number : LN
1, line number error detection code: LNCRC0, line number error detection code: LNCRC1, code and authorized address identification: C & AAI, 16 word destination address, 16 word source address, block type: BT, payload error detection code flag: CRCFL, spare data for header extension: RSV0 to RSV4, header error detection code: HDCRC0, header error detection code: HDCRC1,
Check sum: CS is sequentially arranged. Such header data is composed of a total of 53 words.

FIG. 17A shows one line period in the SDTI signal format when the bit transmission rate at the time of serialization is 143 Mbps. Word string data is formed. Then, one frame period is formed by, for example, 525 line periods formed by connecting 525 lines.

In one line period shown in FIG. 17A, timing reference code data: TRS-ID starts, followed by an auxiliary data (Ancillary Data) section.
It is followed by a payload. TRS
-ID is composed of 5 words (3F
F, 000,000,000,000, XYZ; hexadecimal notation (the same applies hereinafter)) are sequentially arranged. The auxiliary data section includes header data. The payload is provided with user data and an error detection code: CRC.

The header data included in the auxiliary data section includes, for example, a TRS as shown in FIG.
-Auxiliary signal flag following AID: ADF is arranged, followed by data identification: DID, second data identification: SDI
D, data count: DC, line number: LN0, line number: LN1, line number error detection code: LNCRC
0, line number error detection code: LNCRC1, code and authorized address identification: C & AAI, destination address of 16 words, source address of 16 words, block type:
BT, payload error detection code flag: CRCFL, spare data for header extension: RSV0 to RSV4, header error detection code: HDCRC0, header error detection code:
HDCRC1, check sum: CS are sequentially arranged. Such header data is composed of a total of 51 words.

An SDT used for transmitting compressed digital video data or video and audio data.
A digital signal formed in accordance with the I signal format (hereinafter referred to as an SDTI signal) is converted from parallel data to serial data, and is usually subjected to scrambling and transmitted in the form of a transmission signal that is converted into an electric signal or an optical signal. Is done.

In the scrambling process performed on the serial data, the serial data to be subjected to the scrambling is represented by a polynomial, and is converted into a primitive polynomial, for example,
A ninth-order primitive polynomial: sequentially dividing by X ⁹ + X ⁴ +1 to obtain a quotient, which is the operation result, as transmission data, and statistically a mark ratio of transmission data (ratio of “0” and “1”)
Is reduced to １ ／ on average, and the transmission data is encrypted by a primitive polynomial.
In actual transmission of transmission data, for example, instead of directly transmitting a quotient obtained by division by a ninth-order primitive polynomial: X ⁹ + X ⁴ +1, the quotient is further expressed by an expression: X +
Divide by 1 to make the transmission data data (polarity-free data) in which it and its inverted data will have the same information.

On the receiving side receiving the transmission data, the received transmission data is subjected to a descrambling process by multiplying the received transmission data by the formula: X + 1, and further multiplying it by a ninth-order primitive polynomial: X ⁹ + X ⁴ +1. Plays back serial data.

[0016]

SUMMARY OF THE INVENTION As described above, the SDT
Regarding the I signal, upon transmission through the transmission line after being converted into serial data, not only a single SDTI signal but also a plurality of SDTI signals are multiplexed and transmitted so that they can be reliably reproduced on the receiving side. If you can,
The efficient use of the SDTI signal is achieved,
The use range of the TI signal is expanded. And
Efficient use of the SDTI signal or expansion of the use range of the SDTI signal, for example, will result in further development of technology in the field of business or home electronic devices.
Therefore, from such a viewpoint, it is desired to provide a method capable of multiplexing and transmitting a plurality of SDTI signals so that the plurality of SDTI signals can be reliably reproduced on the receiving side by means that can be prepared relatively easily.

However, conventionally, SDTI
There is no concrete example of a transmission system capable of multiplexing and transmitting a plurality of signals so that the signals can be reliably reproduced on the receiving side. Further, there is no literature describing a technique relating to a transmission system capable of multiplexing and transmitting such a plurality of SDTI signals so as to be surely reproduced on a receiving side.

In view of the above, the invention described in the claims of the present application is designed so that a plurality of SDTI signals can be reliably reproduced on the receiving side by means capable of relatively easily preparing the SDTI signals. To provide a data transmission method that can be multiplexed and transmitted, and a data transmission device provided for the implementation thereof.

[0019]

A data transmission method according to the invention described in any one of claims 1 to 5 in the claims of the present application is characterized in that each of a plurality of SDTI signals is serialized. For each of the plurality of serial digital signals obtained, each of the predetermined unit sections is written to a plurality of memory means, and the unit sections written to each of the plurality of memory means are sequentially read out as 20-bit word string data. A plurality of 20-bit word string data respectively read from the memory means and an additional word data group including 20-bit word synchronization data to which a predetermined code is given are combined, and additional word data are added at predetermined word intervals. Forming a composite 20-bit word string data into which the data group is inserted, Converts the data into serial data, is assumed to be transmitted in order to transmit the serial data.

In particular, in the data transmission method according to the invention described in claim 2 of the present application, the additional word data group includes a plurality of 20-bit word data to which a predetermined code is assigned. Are selected as those containing 20 bits word synchronization data.

In the data transmission apparatus according to the invention described in claim 6 of the present application, each of a plurality of serial digital signals obtained by serializing each of a plurality of SDTI signals is provided for each predetermined signal. Is written in each of the plurality of memory means, and the unit sections written in each of the plurality of memory means are sequentially read as 20-bit word string data, and a plurality of 20-bit word strings respectively read from the plurality of memory means are read. Composite 20-bit word string data in which the data and an additional word data group including a 20-bit word synchronization data given a predetermined code are combined, and the additional word data group is inserted at a predetermined word interval. And a 20-bit word string data form for forming The composite 20-bit word sequence data obtained from the Department into serial data, and a data sending means for sending in order to transmit the serial data.

In the data transmission method according to any one of the first to fifth aspects of the present invention, the data is transmitted after being converted into serial data. Multiple SDTIs to be sent
The composite 20-bit word string data formed by synthesizing a plurality of serial digital signals obtained by serializing each of the signals and the additional word data group has a 20-bit word synchronization signal given a predetermined code. Data will be included. Such 20-bit word synchronization data is, for example, a plurality of 20-bit words to which a predetermined code is assigned, as in the data transmission method according to the invention described in claim 2 of the present application. Data is selected to be continuous with a specific sequence. Then, given a predetermined code, the 20-bit word synchronization data included in the composite 20-bit word string data is the composite 2 bit data including the same.
On the receiving side receiving the serial data based on the 0-bit word string data, a plurality of SDTI signals each in the state of serial data or parallel data are formed from the composite 20-bit word string data obtained based on the received serial data. It is assumed that the word synchronization data is properly detected as the word synchronization data required for the processing for reproduction. Therefore, on the receiving side, based on the received composite 20-bit word string data, the data synchronization required for the reproduction processing of a plurality of SDTI signals each in the state of serial data or parallel data is performed. A state where the state can be reliably obtained is secured.

In the data transmission method according to any one of the first to fifth aspects of the present invention, a predetermined code is provided. Conversion of composite 20-bit word string data to which bit word synchronization data has been added into serial data, transmission of the converted serial data, and
Receiving the serial data and converting the received serial data into composite 20-bit word string data on the receiving side can be performed, for example, by transmitting and receiving a digital video signal under an HDTV system (high definition television system). This can be performed by using the transmission circuit device used for the above. Therefore, according to the data transmission method according to the invention described in any one of claims 1 to 6 in the claims of the present application, the SDTI signal is provided with a means that can be prepared relatively easily. A plurality can be multiplexed and transmitted so as to be surely reproduced on the receiving side.

Further, in the data transmission apparatus according to the invention described in claim 6 of the present application, a plurality of SDTIs which are transmitted by the data transmission means after being converted into serial data and transmitted. The composite 20-bit word string data formed by synthesizing a plurality of serial digital signals obtained by serializing each of the signals and the additional word data group has a 20-bit word synchronization signal given a predetermined code. For example, such 20-bit word synchronization data is selected as data in which a plurality of 20-bit word data to which a predetermined code is assigned is connected in a specific arrangement. Then, a predetermined code is given and 2 bits contained in the composite 20-bit word string data are output.
On the receiving side receiving the serial data based on the composite 20-bit word string data including the 0-bit word synchronization data, each of the 0-bit word synchronization data is serial data or serial data from the composite 20-bit word string data obtained based on the received serial data. The word synchronization data required for processing for reproducing a plurality of SDTI signals in a state of parallel data is to be properly detected, and therefore, the reception side is required to receive the word synchronization data. Based on the composite 20-bit word string data obtained, each of which is in a state of serial data or parallel data.
A state in which the data synchronization state required for the DTI signal reproduction processing is reliably obtained is secured.

According to the data transmission apparatus according to the invention described in claim 6 of the present application, a composite data to which a 20-bit word synchronous data to which a predetermined code is given is added. Conversion of the 20-bit word string data to serial data, transmission of the converted serial data, and further, reception of the serial data, conversion of the received serial data to composite 20-bit word string data on the receiving side, and the like. For example, it is possible to use a transmission circuit device used for transmission and reception of a digital video signal under an HDTV system. Can be multiplexed and transmitted so as to be surely reproduced on the receiving side.

[0026]

FIG. 1 shows an embodiment of a data transmission method according to the present invention described in claims 1, 2, 3 or 5 of the present invention. 7 shows an example of a data transmission device according to the invention described in claim 6 of the present invention.

In the example shown in FIG. 1, for example, serialized SDTI signals DTI1, DTIS2 of five channels each of which is a serial digital signal are provided.
DTIS3, DTIS4, and DTIS5 are supplied to the 20-bit word string data forming unit 11. Each of the serialized SDTI signals DTIS1 to DTIS5 is, for example, a 10-bit quantized digital signal which is 10-bit word string data formed according to the SDTI signal format as shown in FIGS. The data is obtained by being serialized and subjected to a scramble process, and has a bit transmission rate of, for example, 270 Mbps.

In the 20-bit word string data forming section 11, the serialized SDTI signals DTIS1 to DTISD are provided.
TIS 5 is provided to switches 12, 13, 14, 15, and 16, respectively. The control signal CSF from the control signal forming unit 17 is also supplied to each of the switches 12 to 16.

In the control signal forming section 17, the frame synchronization signal SSF, the horizontal synchronization signal SH, the vertical synchronization signal SV, and the frequency of each of the serialized SDTI signals DTI1 to DTIS5 are synchronized to 270M.
Hz and the frequency of the clock pulse signal CA set to 74.
A clock pulse signal CB having a frequency of 25 MHz is supplied. Then, the control signal CSF obtained from the control signal forming unit 17 is synchronized with the frame period of each of the serialized SDTI signals DTIS1 to DTIS5 based on the frame synchronization signal SSF.

The switch 12 has the memory sections 20A and 20B, the switch 13 has the memory sections 21A and 21B, the switch 14 has the memory sections 22A and 22B, and the switch 14 has the memory sections 22A and 22B. A memory unit 23A and a memory unit 23B are connected to 15, and a memory unit 24A and a memory unit 24B are connected to the switch 16, respectively.

The serialized SDTI signal DTIS1
Is supplied to the memory section 20A and the memory section 20B destined for each frame period part in an alternate manner in accordance with the control signal CSF. The odd-numbered frame period portion and the even-numbered frame period portion of the serialized SDTI signal DDIS1 are stored in memory units 20A and 20A, respectively.
Distribute and supply to 0B. Similarly, serialized SDT
The switch 13 to which the I signal DTIS2 is supplied switches the serialized SDTI signal DT in accordance with the control signal CSF.
For example, by performing an operation of alternately supplying IS2 to the memory unit 21A and the memory unit 21B destined for each frame period portion, the odd frame period portion and the even frame period portion of the serialized SDTI signal DTIS2 are respectively stored in the memory unit. 21A and 21B are serialized and supplied to
The switch 14 to which the DTI signal DTIS3 is supplied alternately distributes the serialized SDTI signal DTIS3 to, for example, the memory unit 22A and the memory unit 22B for each frame period in response to the control signal CSF. By performing the operation, the serialized SDTI signal DTI3
The odd-numbered frame period part and the even-numbered frame period part are separately supplied to the memory units 22A and 22B, respectively, and the serialized SDTI signal DTI4 is supplied to the switch 1.
5 is a serialized SD according to the control signal CSF.
An operation of alternately supplying the TI signal DTI4 to, for example, the memory unit 23A and the memory unit 23B addressed to each frame period portion is performed, and the serialized SDTI signal DTI4 is supplied.
The switch 16 to which the odd frame period portion and the even frame period portion of S4 are separately supplied to the memory portions 23A and 23B, respectively, and the switch 16 to which the serialized SDTI signal DTIS5 is supplied is switched in accordance with the control signal CSF. For example, by performing an operation of alternately supplying the SDTI signal DTIS5 to the memory unit 24A and the memory unit 24B for each frame period portion, the odd frame period portion and the even frame of the serialized SDTI signal DTIS5 are performed. The period portion is separately supplied to the memory units 24A and 24B.

Memory units 20A, 21A, 22A, 23A
And 24A are supplied with a write control signal QWO from the control signal forming unit 17, and the memory units 20B, 2A.
The write control signal QWE from the control signal forming unit 17 is supplied to each of 1B, 22B, 23B and 24B. The write control signal QWO has a frequency of 270 MHz based on the clock pulse signal CA, and has a serialized SD.
The write control signal QWE is formed to have a frequency of 270 MHz based on the clock pulse signal CA, and is serialized. It is formed as synchronized with the even frame period portion for each of the DTIS5.

Thus, each odd frame period portion of the SDTI signal DTI1 is sequentially written into the memory section 20A in accordance with the write control signal QWO.
Each even frame period portion of the DTI signal DTIS1 is sequentially written to the memory unit 20B according to the write control signal QWE. Similarly, each odd frame period portion of the SDTI signal DTIS2 is sequentially written to the memory unit 21A in accordance with the write control signal QWO, and the
Each even frame period part of the TI signal DTIS2 is sequentially written to the memory unit 21B in response to the write control signal QWE, and each odd frame period part of the SDTI signal DTIS 3 is written to the memory unit 22A.
O, and the SDTI signal D
Each even frame period portion in TIS3 is sequentially written to the memory section 22B in response to the write control signal QWE,
Each odd frame period portion of the SDTI signal DTIS4 is sequentially written to the memory unit 23A according to the write control signal QWO, and each even frame period portion of the SDTI signal DTIS4 is written to the memory unit 23B according to the write control signal QWE. Are written sequentially, and
Each odd frame period part of the TI signal DTI5 is sequentially written to the memory unit 24A in response to the write control signal QWO, and each even frame period part of the SDTI signal DTI5 is stored in the memory unit 24B according to the write control signal QWE. Are written sequentially.

Thus, as shown in FIG. 2A, writing in the memory units 20A to 24A and the memory unit 20B
-24B is a serialized SDT
It is performed alternately for the period 1SF corresponding to one frame period for each of the I signals DTIS1 to DTIS5. Note that, in FIG. 2, an arrow t indicates a lapse of time.

The 20-bit word string data forming unit 11 includes a memory unit 19A in addition to the memory units 20A to 24B.
And a memory unit 19B. Memory unit 19A
And 19B respectively store additional word data groups DEV and DSV each composed of a plurality of 20-bit word data including 20-bit word synchronization data to which a predetermined code is assigned. The 20-bit word synchronization data to which a predetermined code included in each of the additional word data groups DEV and DSV is applied is, for example, EAV and SA included in the SDTI signal format as shown in FIGS.
V, three 10-bit word data 3FFh, 000h and 000h (h is 1
3 is formed by multiplexing two data groups consisting of
Word data, 3FF: 3FFh, 000:
000h and 000: 000h are sequentially arranged. 3FF: 3FFh is obtained by bit-multiplexing 10-bit word data 3FFh and 10-bit word data 3FFh into 20-bit word data, and 000000: h is 10-bit word data 000h and 10-bit word data 000h are bit-multiplexed into 20-bit word data.

The read control signals QREV and QRSV from the control signal forming unit 17 are supplied to the memory units 19A and 19B, respectively. Further, the read control signals QR1O and QR1E from the control signal forming unit 17 are supplied to the memory units 20A and 20B, respectively. Similarly, the memory unit 21A
And 21B are supplied with the read control signals QR2O and QR2E from the control signal forming unit 17, respectively.
A and 22B are supplied with read control signals QR3O and QR3E from the control signal forming unit 17, respectively, and
Read control signals QR4O and QR4E from the control signal forming unit 17 are supplied to 3A and 23B, respectively.
The read control signals QR5O and QR5E from the control signal forming unit 17 are supplied to the memory units 24A and 24B, respectively.

The read control signals QREV, QRSV, QR1O, QR1E, QR2 obtained from the control signal forming unit 17
O, QR2E, QR3O, QR3E, QR4O, QR4
Each of E, QR5O and QR5E is formed based on the clock pulse signal CB and has a frequency of 74.25 MHz.
z, and the transmission state from the control signal forming unit 17 is the horizontal synchronization signal SH and the vertical synchronization signal S
Controlled by V.

The additional word data groups DEV and DSV stored in the memory units 19A and 19B, respectively.
Is set to a word transmission rate of 74.25 MBps according to the read control signals QREV and QRSV, respectively.
It is read as bit word string data. Further, each odd frame period portion and each even frame period portion of the serialized SDTI signal DTIS1 written in the memory units 20A and 20B respectively correspond to the read control signal Q
The data is read out according to R1O and QR1E, and
Serialized SD written to A and 21B respectively
Each odd-numbered frame period portion and each even-numbered frame period portion of the TI signal DDIS2 are read in accordance with the read control signals QR2O and QR2E, respectively, and the memory units 22A and 22A are read.
Each of the odd frame period portion and the even frame period portion of the serialized SDTI signal DTIS3 written in 2B respectively is read control signals QR3O and QR3, respectively.
E, and serialized SDTI signals DTIs written to the memory units 23A and 23B, respectively.
4 are read in accordance with the read control signals QR4O and QR4E, respectively, and furthermore, the serialized SDTI signal DTIS written in the memory units 24A and 24B, respectively.
5 are read out according to the read control signals QR5O and QR5E, respectively.

At this time, reading from the memory units 19A and 19B is performed by serializing the SDTI signal DTIS1.
.., DTIS5, is performed every period corresponding to each frame period, and reading from the memory units 20A to 24A and 20B to 24B is performed as shown in FIG. Reading and memory unit 2
0B to 24B is read out from the serialized SD
It is performed alternately for a period 1SF corresponding to one frame period for each of the TI signals DTIS1 to DTIS5.

Each of the odd frame period portion and the even frame period portion of the serialized SDTI signal DTIS1 read out from the memory units 20A and 20B in accordance with the read control signals QR1O and QR1E respectively has a word transmission rate of 74.25 Mbps. The read outputs D1O (20) and D1E (20), each of which is a 20-bit word string data, are obtained from the memory units 20A and 20B, respectively. Similarly, each of the odd frame period portion and the even frame period portion of the serialized SDTI signal DTIS2 read out from the memory units 21A and 21B in accordance with the read control signals QR2O and QR2E respectively has a word transmission rate of 74.25 MBps. 20-bit word string data to be stored in the memory unit 21
A and 21B provide read outputs D2O (20) and D2E (20), each of which is 20-bit word string data, and are serialized and read from memory units 22A and 22B in accordance with read control signals QR3O and QR3E, respectively. Each of the odd frame period portion and the even frame period portion of the SDTI signal DTIS3 is assumed to form 20-bit word string data having a word transmission rate of 74.25 MBps, and is transmitted from the memory units 22A and 22B. Are output as readout signals D3O (20) and D3E (20), respectively, as 20-bit word string data, and read control signals Q from memory units 23A and 23B, respectively.
Each odd frame period portion and each even frame period portion of the serialized SDTI signal DTIS4 read in accordance with R4O and QR4E form 20-bit word string data each having a word transmission rate of 74.25 MBps. , Memory units 23A and 23B
, Read outputs D4O (20) and D4E (20), each of which is 20-bit word string data, are obtained, and are further serialized read from the memory units 24A and 24B in accordance with the read control signals QR5O and QR5E, respectively. Each odd frame period part and each even frame period part of the SDTI signal DTIS5 form 20-bit word string data with a word transmission rate of 74.25 MBps, and are stored in the memory units 24A and 24A.
From B, read outputs D5O (20) and D5E (20), each of which is 20-bit word string data, are obtained.

The additional word data groups DEV and D read from the memory units 19A and 19B, respectively.
The SV and the read outputs D1O (20) to D5O (20) obtained from the memory units 20A to 24A are collected in the data collecting unit 25A. Also, the memory units 19A and 19B
Word data groups DEV read from
, DSV, and read outputs D1E (20) to D5E (20) obtained from the memory units 20B to 24B, respectively, are collected in the data collection unit 25B.

Memory unit 19 in data collection unit 25A
A and the additional word data groups DEV and DSV from 19B and the read output D1 from the memory units 20A to 24A.
The aggregate state of O (20) to D5O (20) is set according to the transmission state of the read control signals QREV, QRSV and QR1O to QR5O from the control signal forming unit 17, respectively. Then, in the data collection unit 25A, the memory unit 1
Additional word data group DEV from 9A and 19B
, DSV and read output D from memory units 20A to 24A
According to the aggregation state of 1O (20) to D5O (20),
Synthesized 20-bit word string data DXO (20) having a word transmission rate of 74.25 MBps is formed. The synthesis section 20-bit word string data DXO (2
0) is the read control signal QRE from the control signal forming unit 17
V, QRSV, and a line period and a frame period corresponding to the horizontal synchronization signal SH and the vertical synchronization signal SV for controlling the transmission state of each of QR1O to QR5O.

The additional word data group D from the memory units 19A and 19B in the data collection unit 25B
The collective state of the EV and DSV and the read outputs D1E (20) to D5E (20) from the memory units 20B to 24B is determined by the read control signals QREV and QRS from the control signal forming unit 17.
V and are set according to the respective transmission states of QR1E to QR5E. In the data collection unit 25B, the word is determined according to the aggregation state of the additional word data groups DEV and DSV from the memory units 19A and 19B and the read outputs D1E (20) to D5E (20) from the memory units 20B to 24B. Synthesized 20-bit word string data DXE (20) having a transmission rate of 74.25 MBps is formed. The synthesis section 20-bit word string data DXE
(20) also shows the read control signal Q from the control signal forming unit 17
The horizontal synchronizing signal SH and the vertical synchronizing signal SV for controlling the transmission states of REV, QRSV and QR1E to QR5E.
Has a line period and a frame period according to

FIG. 3 shows a first example of the combined section 20-bit word string data DXO (20) and DXE (20) formed in the data collecting sections 25A and 25B, respectively. In the example shown in FIG. 3, as shown in FIG.
Portions L1 and L configuring each line period 1DL of (20)
, L3,... Start with the additional word data group DEV, and subsequently read output D1O (2
0), an additional word data group DSV, and read outputs D1O (20) to D5O (20) are sequentially arranged. Also, as shown in FIG. 3B, each of the portions L1, L2, L3,. Beginning
Subsequently, the read output D1E (20), the additional word data group DSV, and the read outputs D1E (20) to
D5E (20) are sequentially arranged.

In the case of the example shown in FIG. 3,
Portions L1, L2, L3 constituting each line period 1DL
, Readout outputs D1O (20) to D5
O (20) or read output D1E (20) to D5E
Each seam of (20) is the word data 00:00
It does not come before or after 0h or in the middle. Or,
Portions L1, L2, L3 constituting each line period 1DL
, Readout outputs D1O (20) to D5
O (20) or read output D1E (20) to D5E
For each joint of (20), word data 10101
01010: 1010101010 is inserted. As a result, portions L1, L2,
In each of L3,..., Three consecutive 20-bit word data 3FF which are 20-bit word synchronization data:
A situation where portions corresponding to 3FFh, 000: 000h and 000000: h are formed is avoided.

FIG. 4 shows a second example of the combined section 20-bit word string data DXO (20) and DXE (20) formed in the data collecting sections 25A and 25B, respectively. In the example shown in FIG. 4, as shown in FIG.
Portions L1 and L configuring each line period 1DL of (20)
, L3,..., The part L1 starts from the additional word data group DEV, and subsequently, the read output D1
O (20), an additional word data group DSV, and a read output D1O (20) are arranged. A portion L2 following the portion L1 starts from the additional word data group DEV, and subsequently, a read output D2O (20), An additional word data group DSV and a read output D2O (20) are arranged, and a portion L3 following the portion L2 starts from the additional word data group DEV, and is followed by a read output D3O (20) and an additional word data group DSV.
And the readout output D3O (20) are arranged. Hereinafter, the portion L4 and the portion L5 are similarly connected, and thereafter, the portion L6
Returns to the same content as the portion L1. Also, as shown in FIG. 4B, the portions L1, L2, L3,... Constituting each line period 1DL of the synthesized section 20-bit word string data DXE (20), the portion L1 is the additional word data group DEV, followed by a read output D1E (20), an additional word data group DS
V and a read output D1E (20),
1 is a part L2 which is an additional word data group DEV.
, Followed by the read output D2E (20),
Additional word data group DSV and read output D2E
(20) is arranged, and a part L3 following the part L2 is
Starting from the additional word data group DEV, the readout output D3E (20), the additional word data group DSV and the readout output D3E (20) are arranged, and thereafter, the portion L4 and the portion L5 are similarly connected. , Portion L6 returns to the same content as portion L1.

FIG. 5 shows a third example of the combined section 20-bit word string data DXO (20) and DXE (20) formed in the data collecting sections 25A and 25B, respectively. In the example shown in FIG. 5, as shown in FIG. 5A, the composite section 20-bit word string data DXO
Portions L1 and L configuring each line period 1DL of (20)
, L3,... Start with the additional word data group DSV, and subsequently read output D1O (2
0) to D5O (20) are sequentially arranged. Also, as shown in FIG. 5B, each line period 1DL of the synthesized section 20-bit word string data DXE (20)
Are formed from the additional word data group DSV, and the read outputs D1E (20) to D5E (20) are sequentially arranged. .

In the case of the example shown in FIG.
Portions L1, L2, L3 constituting each line period 1DL
, Readout outputs D1O (20) to D5
O (20) or read output D1E (20) to D5E
Each seam of (20) is the word data 00:00
It does not come before or after 0h or in the middle. Or,
Portions L1, L2, L3 constituting each line period 1DL
, Readout outputs D1O (20) to D5
O (20) or read output D1E (20) to D5E
For each joint of (20), word data 10101
01010: 1010101010 is inserted. As a result, portions L1, L2,
In each of L3,..., Three consecutive 20-bit word data 3FF which are 20-bit word synchronization data:
A situation where portions corresponding to 3FFh, 000: 000h and 000000: h are formed is avoided.

FIG. 6 shows a fourth example of the combined section 20-bit word string data DXO (20) and DXE (20) formed in the data collecting sections 25A and 25B, respectively. In the example shown in FIG. 6, as shown in FIG. 6A, the combined section 20-bit word string data DXO
Portions L1 and L configuring each line period 1DL of (20)
, L3,..., The portion L1 starts from the additional word data group DSV, and subsequently, the read output D1
O (20) is arranged, and a portion L2 following the portion L1
Starts with an additional word data group DSV, followed by a read output D2O (20), and a portion L3 following the portion L2 is added to the additional word data group DV.
SV, followed by the read output D3O (2
0) are arranged, and thereafter, the portion L4 and the portion L5 are similarly connected, and thereafter, the portion L6 returns to the same content as the portion L1. Also, as shown in FIG.
The parts L1, L2, L3,... Constituting each line period 1DL of the synthesized section 20-bit word string data DXE (20)
.., The part L1 is the additional word data group DSV
, Followed by a read output D1E (20), and a portion L2 following the portion L1 starts with the additional word data group DSV, followed by a read output D2E (20). , A portion L3 following the portion L2 starts with the additional word data group DSV, followed by the read output D3E (20), and thereafter, the portion L4 and the portion L5 are similarly connected, and thereafter, the portion L6 is The contents return to the same contents as the part L1.

As described above, the data collection units 25A and 25A
B, each of the synthesized section 20-bit word string data DXO (20) and DXE (20) formed at an additional word data group DE at predetermined word intervals.
V or DSV inserted, word transmission rate is 7
It is 20-bit word string data of 4.25 MBps.

Additional word data groups DEV and DS
Each of V is three 20-bit word data 3FF: 3FFh, 000: 0 which is 20-bit word synchronization data.
00h and 000: 000h and other 20-bit word data. In one specific example, three consecutive 20-bit word data 3FF: 3FFh, which are 20-bit word synchronization data, are formed. , 0
Prior to 00: 000h and 000000h, arbitrary 20-bit word data DX is allocated.

Such an additional word data group DE
Composite section 20 formed by inserting V or DSV
Bit word string data DXO (20) and DXE (2
In each of (0), the portion in which the additional word data group DEV or DSV is inserted is, for example, as shown in FIG. In FIG. 7, DM is a memory unit 2
Readout outputs D1O (20) obtained respectively from 0A to 24A
To D5O (20) or the readout outputs D1E (2) obtained from the memory units 20B to 24B, respectively.
20 forming any one of 0) to D5E (20)
DX represents bit word data, DX represents arbitrary 20-bit word data, and arrow t represents the passage of time.

In each of the additional word data groups DEV and DSV, the
Three consecutive 20-bit word data 3FF: 3FFh, 000000h which are 0-bit word synchronous data
Before and after 000: 000h, arbitrary 20-bit word data DX is allocated.

Such an additional word data group DE
Each of the composite section 20-bit word string data DXO (20) and DXE (20) formed by inserting both or one of V and DSV has a portion where the additional word data group DEV or DSV is inserted, for example. , As shown in FIG. Also in FIG.
M is one of the read outputs D1O (20) to D5O (20) obtained from the memory units 20A to 24A, respectively.
Alternatively, it represents 20-bit word data forming any one of the read outputs D1E (20) to D5E (20) obtained from the memory units 20B to 24B, and DX represents arbitrary 20-bit word data. The arrow t indicates the passage of time.

The combined divided 20-bit word string data DXO (20) formed in the data collecting section 25A and the combined divided 20-bit word string data DXE (20) formed in the data collecting section 25B are serialized SDTI. The signals DTIS1 to DTIS5 are alternately derived from the data collection units 25A and 25B for a period corresponding to one frame period for each of the signals DTIS1 to DTIS5. Data collection unit 26
, The synthesis section 20-bit word string data DXO
(20) and the synthesis section 20-bit word string data DXE
And (20) are sequentially and alternately connected to form a series of composite 20-bit word string data DZ (20).

The composite 20-bit word string data DZ (20) formed in the data collecting section 26 is a serialized SDTI signal DTI1 to DTI1 to D5 of five channels.
TIS5 is multiplexed, and additional word data groups DEV or DSV obtained by combining with one or both of additional word data groups DEV and DSV are inserted at predetermined word intervals.
20-bit word string data with a word transmission rate of 74.25 MBps. Then, the composite 20-bit word string data DZ (20) obtained from the data collection unit 26
Is transmitted from the 20-bit word string data forming unit 11 and supplied to the parallel / serial (P / S) conversion unit 27.

The P / S converter 27 performs P / S conversion on the composite 20-bit word string data DZ (20) to convert parallel data into serial data, and performs composite 2
A bit transmission rate of 74.25 MBps × 20 = 1.485 G based on 0-bit word string data DZ (20)
It forms serial data DZS at bps and supplies the serial data DZS to the transmission signal forming unit 28. The transmission signal forming unit 28 is suitable for a data transmission path formed using a coaxial cable so as to transmit the serial data DZS through a data transmission path formed using a coaxial cable or an optical fiber, for example. The signal is converted into an electric signal or a transmission signal SZ which is an optical signal suitable for a data transmission line formed using an optical fiber and transmitted. Thereby, transmission of the serial data DZS is performed.

As described above, three consecutive 20-bit word data 3FF: 3FFh, 000: 0, which are 20-bit word synchronous data, based on the serialized SDTI signals DTIS1 to DTIS5 of 5 channels.
The composite 20-bit word string data DZ (2) formed by inserting both or one of the additional word data groups DEV and DSV including 00h and 000: 000h.
0) is converted to serial data DZS and transmitted. At this time, a 5-channel serialized SD which is multiplexed in a state where the
In each of the TI signals DTIS1 to DTIS5, three consecutive 20 bits which are later 20-bit word synchronization data.
Bit word data 3FF: 3FFh, 000: 000
When a portion where h and 000: 000h are formed appears, it becomes meaningless to insert both or one of the additional word data groups DEV and DSV including the 20-bit word synchronization data.

A 5-channel serialized SDTI signal D multiplexed in a state where the scramble processing is performed
Three consecutive 20-bit word data 3FF: 3FFh, 000000: 00h and 00 in each of TIS1 to DTIS5, which are later 20-bit word synchronization data
The portion where 0: 000h is to be formed is six consecutive 10-bit word data 3FFh, 3FFh,
000h, 000h, 000h, and 000h are portions corresponding to those converted into serial data. That is,
In each of the serialized SDTI signals DTIS1 to DTIS5 of the five channels subjected to the scramble processing, six consecutive 10-bit word data 3FF
h, 3FFh, 000h, 000h, 000h and 00
It is a problem whether or not a portion corresponding to 0h converted into serial data appears. In this regard, such portions will not appear for the following reasons.

First, in each of the serialized SDTI signals DTIS1 to DTIS5 subjected to the scramble processing, m is an integer of 20 or more, n is an integer of 40 or more, and m-bit “1” continues. Assuming that there is a portion where n bits of “0” continue, the original data before the scramble processing of the portion is A (X)
And B (X) as arbitrary data, A (X): m-bit continuous "1": n-bit "0" continuous: B (X)
, A formula: (X + 1) and a ninth-order primitive polynomial: (X
⁹ + X ⁴ +1), that is, [A (X): m
Bit "1" continuation: n-bit "0" continuation: B
(X)] × (X + 1) × (X ⁹ + X ⁴ +1) = [A
(X): m bits of “0” continuation: n bits of “0” continuation: B (X)] × G (X), where G (X) = (X
+1) × (X ⁹ + X ⁴ +1)).

Thus, [A (X): m-bit "1"
Continuous: n-bit “0” continuous: B (X)] × G
In the data expressed as (X), [continuation of m-bit “1”] × G (X) is [continuation of m-bit “1”:] × (X + 1) = 10... 01 (where 0 ...
0 is (m−1) bits “0” continuation = X ^m +1 and (X ^m +1) × (X ⁹ + X ⁴ +1) = (X ⁹ + X ⁴⁾
+1) X ^m + (X ⁹ + X ⁴ +1),
[Continuation of m-bit "1": Consecutive of n-bit "0"]
× G (X) is UUUUUUUUUU as A (X) × G
The result of (X) is added to 10 bits, and VVV
Let VVVVVVV be 10 bits to which the result of B (X) × G (X) is added, UUUUUUUUUU0 **
*** 0VVVVVVVVV0 ///// 0 (where 0 **** is a series of m-10-bit "0" and 0 //// 0 is a series of n-bit "0" ).

As described above, the serialized SDTI signals DTIS1 to DTIS5 that have been subjected to the scramble processing are serialized.
In each of the above, if there is a portion where m-bit “1” is continuous and n-bit “0” is continuous,
In the original data before the scramble processing of that part, the first continuation of “0” becomes m−10 bits and the last continuation of “0” becomes n bits. Cannot be obtained by serializing each of the SDTI signals DTIS1 to DTIS5.

Therefore, in each of the serialized SDTI signals DTIS1 to DTIS5 subjected to the scramble processing, there may be a portion where m-bit "1" is continuous and n-bit "0" is continuous. I can't get it.

That is, the serialized SDTI of five channels multiplexed in a state where the scramble processing has been performed.
In each of the signals DTIS1 to DTIS5, 20
A part where three consecutive 20-bit word data 3FF: 3FFh, 000000: h and 000000h are formed as bit word synchronization data does not appear.

In the data transmission apparatus shown in FIG. 1 as described above, the P / S converter 27 and the transmission signal generator 2
8 makes the word transmission rate 74.25 MBps 2
Bit transmission rate of 1.48 bit word string data is 1.48
Since the data is converted into serial data of 5 Gbps and transmitted, such a P / S converter 27 and a transmission signal generator 28 are provided, for example, for transmitting a digital video signal under an HDTV system. The integrated circuit (IC) element can be effectively used. Therefore, the transmission of the serialized SDTI signal of 5 channels at a bit transmission rate of 270 Mbps is performed by assuming that the data synchronization state required for the reproduction process on the receiving side can be reliably obtained by the 20-bit word synchronization data. Without the need to develop new circuit elements,
This can be done by means that can be easily prepared.

FIG. 9 shows an example of a data transmission method according to the invention described in claims 1, 2, 4 or 5 in the claims of the present application. 1 shows an example of a data transmission device according to the invention described in (1).

In the example shown in FIG. 9, SDTI signals DTIP1, DTIP2, DTIP of five channels are used.
3, DTIP4 and DTIP5 are supplied to scramble processing units 31, 32, 33, 34 and 35, respectively.
Each of the 5-channel SDTI signals DTIP1 to DTIP5 is, for example, as shown in FIGS.
This is a 10-bit quantized digital signal that is 10-bit word string data formed according to the SDTI signal format, and its word transmission rate is, for example, 27M.
Bps is set as parallel data.

The scramble processing unit 31 performs P / S conversion on the SDTI signal DTIP1 converted into parallel data having a word transmission rate of 27 MBps, and for example, a ninth-order primitive polynomial: X ⁹ + X ⁴ +1 , And scramble processing by further dividing the quotient, which is the operation result, by the formula: X + 1.
A serial digital signal DTIS1 'is formed at a bit transmission rate of 270 Mbps obtained by serializing the SDTI signal DTIP1, which is converted into serial data subjected to scramble processing based on TIP1.

Similarly, the scramble processing units 32, 33,
34 and 35, the word transmission rate is 2
SDTI signals DTIP2, DTIP3, DTIP4 and DTIP5 converted to parallel data of 7 MBps
Is subjected to P / S conversion and scramble processing to obtain serial data subjected to scramble processing based on the SDTI signals DTIP2 to DTIP5.
SDTI signals DTIP2 to DTIP5 are serialized, and serial digital signals DTIS2 ′ to DTIS5 ′ are obtained at a bit transmission rate of 270 Mbps.
To form

As described above, the scramble processing section 31
The 5-channel serial digital signals DTIS1 ′ to DTIS5 ′ obtained from 35 to ３５35 are supplied to a 20-bit word string data forming unit 11 ′. The SDTI signal DTIP is supplied to the 20-bit word string data forming unit 11 '.
1 to DTIP5 based serial digital signal DTI
The frame synchronization signal SSF, the horizontal synchronization signal SH,
A vertical synchronizing signal SV, a clock pulse signal CA 'having a frequency of 27 MHz, and a clock pulse signal CB having a frequency of 74.25 MHz are also supplied.

20-bit word string data forming section 11 '
Although not shown, is configured similarly to the 20-bit word string data forming unit 11 shown in FIG. Then, in the 20-bit word string data forming unit 11 ', the serial digital signals DTIS1' to DTIS
For 5 ′, the same processing as that performed by the 20-bit word string data forming unit 11 shown in FIG. 1 on the serialized SDTI signals DTI1 to DTIS5 is performed, and the serial digital Signal DTI
The composite 20-bit word string data DZ (20) based on S1 'to DDIS5' is obtained. The composite 20-bit word sequence data DZ (20) is a 5-channel serial digital signal similarly to the composite 20-bit word sequence data DZ (20) transmitted from the 20-bit word sequence data forming unit 11 shown in FIG. DTIS1 'to DTIS5'
Are multiplexed and inserted with additional word data groups DEV or DSV at predetermined word intervals obtained by combining with both or one of additional word data groups DEV and DSV. Is 74.25 MBps.

Composite 20-bit word string data DZ (20) obtained from 20-bit word string data forming section 11 '
Is supplied to the P / S converter 36. P / S converter 36
, The composite 20-bit word string data DZ (2
0) is subjected to P / S conversion, and the bit transmission rate based on the composite 20-bit word string data DZ (20) is set to 74.
The serial data DZS of 25 MBps × 20 = 1.485 Gbps is formed, and the serial data DZS is supplied to the transmission signal forming unit 37. Transmission signal forming unit 37
For transmitting serial data DZS through a data transmission line formed using a coaxial cable or an optical fiber, for example, an electric signal suitable for a data transmission line formed using a coaxial cable, or A transmission signal SZ which is an optical signal suitable for a data transmission path formed by using an optical fiber
Convert to and send. Thereby, the serial data D
Transmission of ZS is performed.

As described above, the 5-channel SDT
Based on the I signals DTIP1 to DTIP5, three consecutive 20-bit word data 3FF: 3FFh, 0000000h and 00 which are 20-bit word synchronous data.
Additional word data group DEV including 0: 000h
And DSV are inserted into the composite 20-bit word string data DZ (20), which is formed into serial data DZS and transmitted.
At this time, SDTI signals DTIP1 to DT of five channels are used.
When IP5 is subjected to scrambling processing in scramble processing sections 31 to 35, respectively, SDTI signal DTIP obtained from scramble processing sections 31 to 35, respectively.
In each of the 5-channel serial digital signals DTIS1 'to DTIS5', which are serial data subjected to scramble processing based on 1 to DTIP5, three consecutive 2 bits which are later 20-bit word synchronization data
0-bit word data 3FF: 3FFh, 00:00
When a portion where 0h and 000: 000h are formed appears, it becomes meaningless to insert both or one of the additional word data groups DEV and DSV including the 20-bit word synchronization data.

However, the serial digital signal D
Even in the case of each of TIS1 'to DTI5', each of the serialized data supplied to the above-described 20-bit word string data forming unit 11 shown in FIG. SDTI signal DTI
In the same manner as in each of 1 to DTIS5, a portion where three consecutive 20-bit word data 3FF: 3FFh, 000000: h and 000: 000h, which are 20-bit word synchronous data, are formed later appears. Absent.

Even in the data transmission apparatus shown in FIG. 9 as described above, the P / S conversion section 36 and the transmission signal forming section 3
7 makes the word transmission rate 74.25 MBps 2
Bit transmission rate of 1.48 bit word string data is 1.48
Since the data is converted into serial data of 5 Gbps and transmitted, such a P / S converter 36 and a transmission signal generator 37 are provided, for example, for transmitting a digital video signal under an HDTV system. The integrated circuit (IC) element can be effectively used. Therefore, the bit transmission rate is set to 27 MBps5
The transmission of the SDTI signal of the channel can be performed without requiring the development of new circuit elements and the like, assuming that the data synchronization state required for the reproduction process on the receiving side can be reliably obtained by the 20-bit word synchronization data. This can be done by means that can be easily arranged.

FIG. 10 shows another example of the data transmission method according to the invention described in claims 1, 2, 3 or 5 of the present invention. An example of the data transmission device according to the invention described in Item 6 is shown.

In the example shown in FIG. 10, for example,
Two-channel serialized SDTI signals DTIS1 and DTIS, each being a serial digital signal
2 and 6-channel serialized SDTI signals DTISa, DT each of which is a serial digital signal.
ISb, DTIsc, DTIsd, DTISe and DT
ISf is supplied to the 20-bit word string data forming unit 11 ″.

Two-channel serialized SDTI
Each of the signals DTIS1 and DTIS2 is, for example, as shown in FIG.
6, 10-bit quantized digital signals as 10-bit word string data formed according to the SDTI signal format as shown in A and B of FIG. 6 are obtained by being serialized and subjected to scramble processing. And the bit transmission rate is, for example, 270M
bps. Also, serialized SDTI signals DTISa to DT of six channels are provided.
Each of ISf is obtained by serializing a 10-bit quantized digital signal, which is a 10-bit word string data formed in accordance with the SDTI signal format as shown in FIGS. The serial data has a bit transmission rate of, for example, 143 Mbps.

The 20-bit word string data forming unit 11 ″ has serialized SDTI signals DTI1, DTI
In addition to S2 and SDTI signals DTISa to DTISF, serialized SDTI signals DTI1, DTI1
S2 and a frame synchronization signal SS synchronized with the frame period for each of the SDTI signals DTISa to DTISF
F, horizontal synchronization signal SH, vertical synchronization signal SV, and frequency 2
A clock pulse signal CA having a frequency of 70 MHz and a frequency of 7
A clock pulse signal CB having a frequency of 4.25 MHz and a clock pulse signal CC having a frequency of 143 MHz are also supplied.

20-bit word string data forming section 11 ″
Although not shown, is configured similarly to the 20-bit word string data forming unit 11 shown in FIG. However, in the 20-bit word string data forming unit 11 ″, eight switches corresponding to the switches 12 to 16 in the 20-bit word string data forming unit 11 and the memory units 20 A to 20 A in the 20-bit word string data forming unit 11 are used. 2
8A corresponding to 4A, and memory units 20B to 24B in the 20-bit word string data forming unit 11.
Are stored in the control signal forming unit 17 and the memory unit 1 in the 20-bit word string data forming unit 11.
9A and 19B, and the data collecting units 25A, 25B, and 26, respectively.

Then, in the 20-bit word string data forming unit 11 ″, the serialized SDTI signal DT
Each frame period in each of IS1 and DTIS2 corresponds to two of the eight memory units corresponding to the memory units 20A to 24A in the 20-bit word string data forming unit 11, and the 20-bit word string data forming unit 11 Of the eight memory units corresponding to the memory units 20B to 24B in FIG.
Is sequentially written in accordance with a write control signal having a frequency of 270 MHz from a portion corresponding to the control signal forming unit 17 in FIG.
a to DTISf for each frame period are 2
Memory unit 2 in 0-bit word string data forming unit 11
6 of the 8 memory units corresponding to 0A to 24A,
And six of the eight memory units corresponding to the memory units 20B to 24B in the 20-bit word string data forming unit 11, from the part corresponding to the control signal forming unit 17 in the 20-bit word string data forming unit 11. Frequency of 1
Data is sequentially written according to a write control signal of 43 MHz. The data reading from each memory unit and the combination of the read output obtained from each memory unit and the additional word data group are performed in the same manner as in the case of the 20-bit word string data forming unit 11.

As a result, in the 20-bit word string data forming section 11 ", the combined 20-bit word string data DZ (20) based on the serialized SDTI signals DTI1, DTIS2 and DTISa to DTISf is obtained. 20-bit word string data DZ (20)
Also, the 20-bit word string data forming unit 1 shown in FIG.
Compound 20-bit word string data DZ transmitted from 1
Similarly to (20), a total of eight channels of serialized SDTI signals DTIS1, DTIS2 and DTISa
DTISf are multiplexed and combined with both or one of the additional word data groups DEV and DSV, and the additional word data group DEV or DSV is inserted at a predetermined word interval. 20 to set the transmission rate to 74.25 MBps
This is bit word string data.

Composite 20-bit word string data DZ (20) obtained from 20-bit word string data forming section 11 ″
Is supplied to the P / S converter 39. P / S converter 39
, The composite 20-bit word string data DZ (2
0) is subjected to P / S conversion, and the bit transmission rate based on the composite 20-bit word string data DZ (20) is set to 74.
The serial data DZS of 25 MBps × 20 = 1.485 Gbps is formed, and the serial data DZS is supplied to the transmission signal forming unit 40. Transmission signal forming section 40
For transmitting serial data DZS through a data transmission line formed using a coaxial cable or an optical fiber, for example, an electric signal suitable for a data transmission line formed using a coaxial cable, or A transmission signal SZ which is an optical signal suitable for a data transmission path formed by using an optical fiber
Convert to and send. Thereby, the serial data D
Transmission of ZS is performed.

As described above, three consecutive 20-bit word data 3FF: 3FFh, 000, which are 20-bit word synchronous data, based on the serialized SDTI signals DTI1, DDIS2 and DTISa to DTISF of a total of eight channels. : 000h and 000: 0
00h including additional word data groups DEV and D
Composite 2 formed by inserting both or one of SVs
The 0-bit word string data DZ (20) is converted into serial data DZS and transmitted. At this time, the data is multiplexed in a state where scramble processing has been performed.
Channel serialized SDTI signal DTIs
1, DTIS2, and three consecutive 20-bit word data 3FF: 3FFh, 00, which are 20-bit word synchronization data later in each of DTISa to DTISF.
When a portion where 0: 000h and 000: 000h is formed appears, it becomes meaningless to insert both or one of the additional word data groups DEV and DSV including the 20-bit word synchronization data.

However, the serialized SDTI
Signals DDIS1, DDIS2, and DTISa to DDIS
In each case of f, the serialized SDTI signal DTIS1 supplied to the above-described 20-bit word string data forming unit 11 shown in FIG. To DTIS5, three consecutive 20-bit word data 3FF which are later 20-bit word synchronous data:
The part where 3FFh, 000: 000h and 000000: h will be formed does not appear.

Even in the data transmission apparatus shown in FIG. 10 as described above, the P / S conversion section 39 and the transmission signal forming section 40 convert the 20-bit word string data having a word transmission rate of 74.25 MBps into a bit stream. Transmission rate of 1.4
Since the data is converted into serial data of 85 Gbps and transmitted, such a P / S converter 39 and a transmission signal generator 40 are provided, for example, for transmitting a digital video signal under an HDTV system. The integrated circuit (IC) element can be effectively used. Therefore, the transmission of a 2-channel serialized SDTI signal with a bit transmission rate of 270 Mbps and a 6-channel serialized SDTI signal with a bit transmission rate of 143 Mbps is performed on the receiving side by 20-bit word synchronization data. As long as the data synchronization state required for the reproduction process can be reliably obtained, it is possible to use a means that can be easily prepared without the need to develop new circuit elements and the like.

FIG. 11 shows a composite 20 bit transmitted from the transmission signal forming unit 28 in the example of the data transmission apparatus shown in FIG. 1 according to the example of the data transmission method according to the invention described in the claims of the present application. Word string data DZ (2
0) shows an example of a data receiving apparatus that receives a transmission signal SZ based on serial data DZS obtained by converting (0).

In the example of the data receiving apparatus shown in FIG. 11, for example, an electric signal suitable for a data transmission line formed by using a coaxial cable or an optical fiber formed by using an optical fiber is used. A receiving unit 41 is provided for receiving a transmission signal SZ which is an optical signal suitable for the data transmission path. The receiving unit 41 transmits the transmission signal SZ
Is received, the serial data DZS based on the received transmission signal SZ is reproduced, and the reproduced serial data DZS is supplied to the synchronous data detection / S / P converter 42.

In the synchronous data detecting / S / P converter 42, three consecutive 20-bit word data 3FF: 3FFh, 000: 000h and 000: 20-bit word synchronous data in the serial data DZS which are 20-bit word synchronous data.
000h is converted to serial data, the portion is detected as synchronous data, word synchronization is performed based on the detected synchronous data, S / P conversion is performed on the serial data DZS, and A in FIG. 12 or A in FIG. The composite 20-bit word string data DZ (20), which is parallel data with a word transmission rate of 74.25 MBps, for example, based on the serial data DZS as shown in FIG. The composite 20-bit word string data DZ (20) obtained from the synchronous data detection / S / P converter 42 is supplied to the specific word detector 43.

In the specific word detecting section 43, the composite 20-bit word string data DZ (20) is supplied to the serial data restoring section 44 through the specific word detecting section 43.
Three consecutive 20-bit word data 3FF: 3FFh, 000: 000h and 0 which are 20-bit word synchronization data in the 0-bit word string data DZ (20)
00: 000h is detected as a specific word, and the resulting detection output signal SDD is sent out. The detection output signal SDD is, for example, the composite 20-bit word string data DZ detected by the specific word detection unit 43.
Three consecutive 20-bit word data 3FF: 3FF which are 20-bit word synchronization data in (20)
Corresponding to the last one of h000: 000h and 000: 000h, it is obtained as shown in FIG. 12B or FIG. 13B. Note that the arrow t in FIGS. 12 and 13 indicates the passage of time. In this way,
Detection output signal SDD obtained from specific word detection section 43
Is supplied to the serial data restoration unit 44.

In the serial data restoring section 44, the composite 20-bit word string data DZ (20) passed through the specific word detecting section 43 is transmitted to the movable contact 4 in the switch 45.
5a. The control signal CDF from the control signal forming unit 46 is also supplied to the switch 45.

The control signal forming section 46 outputs the detection output signal SDD and the frequency obtained from the specific word detecting section 43 to 27.
The clock pulse signal CA having a frequency of 0 MHz and the frequency of 7
A clock pulse signal CB of 4.25 MHz is supplied. Then, the control signal CDF obtained from the control signal forming section 46 is, for example, synchronized with a predetermined time interval of, for example, 1 ms in which a reference is set according to the detection output signal SDD.

The switch 45 performs an operation of alternately connecting the movable contact 45a to the selection contact 45b and the selection contact 45c at predetermined time intervals according to the control signal CDF from the control signal forming section 46. Selection contact 45 of switch 45
b, the memory units 50A, 51A, 52A, 53A and 54A are connected.
The memory units 50B, 51B, 52B, 53B and 54B are connected to c.

Thus, the switch 45 sets the control signal C
According to the DF, the composite 20 through the specific word detection unit 43
The bit word string data DZ (20) is sent to the memory units 50A, 51A, 52A,
53A and 54A, and memory units 50B and 51, respectively.
B, 52B, 53B and 54B are sequentially and alternately supplied.

The write control signals QW1O, QW2O, QW from the control signal forming section 46 are stored in the memory sections 50A to 54A.
3O, QW4O and QW5O are supplied respectively, and the control signal forming unit 46 is provided to each of the memory units 50B to 54B.
Control signals QW1E, QW2E, QW3E, Q
W4E and QW5E are supplied respectively. Each of write control signals QW1O to QW5O and QW1E to QW5E obtained from control signal forming section 46 is clock pulse signal CB.
And the frequency is set to 74.25 MHz, and the transmission timing from the control signal forming unit 46 is adjusted according to the detection output signal SDD, and further, synchronous data detection / S / P In the composite 20-bit word string data DZ (20) reproduced by the conversion unit 42, the control is performed in accordance with the timing set in advance corresponding to the data synthesis mode of each line period portion.

In this case, the writing in each of the memory units 50A to 54A and the writing in each of the memory units 50B to 54B are alternately performed for each predetermined time interval in which the control signal CDF is synchronized. Then, during a period corresponding to each of the predetermined time intervals, a predetermined time period of the composite 20-bit word string data DZ (20) is determined in accordance with the respective transmission timings of write control signals QW1O to QW5O from control signal forming section 46. 20-bit word string data D1O (20), D2O (20), D3 constituting the first part corresponding to the section
O (20), D4O (20) and D5O (20) are stored in memory units 50A, 51A, 52A, 53A and 54, respectively.
A is put together and written. In addition, during a period corresponding to the next predetermined time section, a predetermined period of the composite 20-bit word string data DZ (20) is determined in accordance with the transmission timing of write control signals QW1e to QW5e from control signal forming section 46. 20-bit word string data D1E (20), D2E (20), D constituting the second part corresponding to the time section
3E (20), D4E (20) and D5E (20)
The memory units 50B, 51B, 52B, 53B and 5 respectively
4B.

Further, each of memory units 50A to 54A is supplied with a read control signal QRO from control signal forming unit 46, and each of memory units 50B to 54B is provided with a read control signal QRO from control signal forming unit 46. A control signal QRE is provided. The read control signal QRO is formed to have a frequency of 270 MH based on the clock pulse signal CA.
/ P converter 42 sends out from control signal forming section 46 in synchronization with a first portion corresponding to a predetermined time section in composite 20-bit word string data DZ (20) reproduced, and also has read control signal QRE. Is formed to have a frequency of 270 MHz based on the clock pulse signal CA, and the composite 20-bit word string data DZ (20) reproduced by the synchronous data detection / S / P converter 42 in accordance with the detection output signal SDD. ) Is transmitted from the control signal forming section 46 in synchronization with the second portion corresponding to the predetermined time section.

As a result, in every other predetermined time interval, the two written in the memory units 50A to 54A are respectively
0-bit word string data D1O (20) to D5O (2
0) is read out from the memory units 50A to 54A in the next predetermined time segment according to the read control signal QRO. At this time, the 20-bit word string data D1O (20) to D5O written in the memory units 50A to 54A, respectively.
Each of (20) sets the bit transmission rate to the read control signal Q
270 Mbps corresponding to the frequency 270 MHz of the RO is read as forming serial data, and is read from the memory units 50A to 54A based on the 20-bit word string data D1O (20) to D5O (20), respectively. Readout outputs S1O, S2O, S3O, S4 converted into serial data with a bit transmission rate of 270 Mbps
O and S5O are obtained.

Also, in every other predetermined time interval, the 20 bits written in the memory units 50B to 54B respectively.
Bit word string data D1E (20) to D5E (20)
Are read from the memory units 50B to 54B in the next predetermined time segment in accordance with the read control signal QRE. At this time, 2 read from the memory units 50B to 54B respectively.
0-bit word string data D1E (20) to D5E (2
0), the bit transmission rate is controlled by the read control signal QRE.
270 Mbps according to the frequency 270 MHz of
The memory unit 50B forms serial data.
To 54B, respectively, 20-bit word string data D1E
Readouts S1E, S2E, S3E, S4E and S5 converted into serial data based on (20) to D5E (20)
E is obtained.

Read output S1 obtained from memory unit 50A
O and the read output S1E obtained from the memory unit 50B are provided to the switch 56, and the read output S1 obtained from the memory unit 51A.
2O and the read output S2E obtained from the memory unit 51B are provided to the switch 57, the read output S3O obtained from the memory unit 52A and the read output S3E obtained from the memory unit 52B are provided to the switch 58, and the read output obtained from the memory unit 53A. S4O and readout output S4E obtained from memory unit 53B
Are supplied to the switch 59, and the read output S5O obtained from the memory unit 54A and the read output S5E obtained from the memory unit 54B are supplied to the switch 60.

Each of the switches 56 to 60 is also supplied with a control signal CSF from the control signal forming section 46. The control signal CSF is, for example, synchronized with a predetermined time interval of, for example, 1 ms in which a reference is set according to the detection output signal SDD.

The switch 56 alternately takes out the readout output S1O and the readout output S1E in accordance with the control signal CSF, and serializes the serialized SDT having a bit transmission rate of 270 Mbps as a series of serial digital signals.
Reproduce the I signal DTIS1. Similarly, switch 57
Reads out the readout output S2O and the readout output S2E alternately according to the control signal CSF, and reproduces a serialized SDTI signal DTI2 having a bit transmission rate of 270 Mbps, which is a series of serial digital signals,
The switch 58 outputs the read output S in accordance with the control signal CSF.
3O and the read output S3E are alternately taken out, and the bit transmission rate, which is a series of serial digital signals, is set to 270.
Mbps serialized SDTI signal DTI
3, the switch 59 takes out the readout output S4O and the readout output S4E alternately in accordance with the control signal CSF, and is a serialized SDT having a bit transmission rate of 270 Mbps as a serial digital signal
The I signal DTIS4 is reproduced, and the switch 60
According to control signal CSF, read output S50 and read output S
5E are alternately extracted, and a serialized SDTI signal DTIS5 having a bit transmission rate of 270 Mbps, which is a series of serial digital signals, is reproduced.

As described above, the serialized SDTI of five channels obtained from the switches 56 to 60 respectively.
The signals DTIS1 to DTIS5 are transmitted from the serial data restoration unit 44.

FIG. 14 shows a composite 20 bit transmitted from the transmission signal forming unit 37 in the example of the data transmission apparatus shown in FIG. 9 according to the example of the data transmission method according to the invention described in the claims of the present application. Word string data DZ (2
0) shows an example of a data receiving apparatus that receives a transmission signal SZ based on serial data DZS obtained by converting (0).

In the example of the data receiving apparatus shown in FIG. 14, for example, an electric signal suitable for a data transmission path formed by using a coaxial cable or an optical fiber formed by using an optical fiber is used. A receiving unit 61 is provided for receiving a transmission signal SZ which is an optical signal suitable for the data transmission path. The receiving unit 61 transmits the transmission signal SZ
Is received, the serial data DZS based on the received transmission signal SZ is reproduced, and the reproduced serial data DZS is supplied to the synchronous data detection / S / P converter 62.

In the synchronous data detection / S / P conversion section 62, three consecutive 20-bit word data 3FF: 3FFh, 000: 000h and 000: which are 20-bit word synchronous data in the serial data DZS.
000h is detected as synchronous data, the word is synchronized based on the detected synchronous data, S / P conversion is performed on the serial data DZS, and the serial data DZS is converted based on the serial data DZS. The composite 20-bit word string data DZ (20), which is parallel data having a transmission rate of 74.25 MBps, is reproduced. The composite 20-bit word string data DZ (20) obtained from the synchronous data detection / S / P converter 62 is supplied to the specific word detector 63.

In the specific word detecting section 63, the composite 20-bit word string data DZ (20) is supplied to the serial data restoring section 44 'through the specific word detecting section 63, and the composite 20-bit word string data DZ (20) Three consecutive 20-bit word data 3FF: 3FFh, 000000: h and 000000h, which are synchronous data, are detected as specific words, and the resulting detection output signal SDD is sent out. This detection output signal SDD is supplied to the serial data restoration unit 44 '. The detection output signal SDD obtained from the specific word detection unit 63, the clock pulse signal CA having a frequency of 270 MHz, and the clock pulse signal CB having a frequency of 74.25 MHz are also supplied to the serial data restoration unit 44 '.

Although not shown, the serial data restoring section 44 'has the same configuration as the serial data restoring section 44 shown in FIG. Then, in the serial data restoring unit 44 ′, the composite 20-bit word string data DZ (20) through the specific word detecting unit 63 is
Although redundant description is omitted, the serial data restoration unit 44 shown in FIG.
The same processing as that performed on the bit word string data DZ (20) is performed, and the composite 20-bit word string data DZ (20) is processed.
(20), each having a bit transmission rate of 270M
5 channel serialized SDTI at bps
The signals DTIS1 'to DTIS5' are obtained. In this way, the serialized SDTI signals DTI1 'to DTI of five channels obtained from the serial data restoring unit 44' are output.
TIS 5 'is a descramble processing / S / P converter 6
5, 66, 67, 68 and 69 respectively.

In the descrambling / S / P converter 65, the serialized SDTI signal DTIS1 '
Is subjected to a descrambling process by multiplying the product of the operation result by the formula: X + 1, and further multiplied by a ninth-order primitive polynomial: X ⁹ + X ⁴ +1 to obtain a serialized SDTI subjected to the descrambling process. Signal DTIS
1 ′ is subjected to S / P conversion and serialized SDTI
S, which is a 10-bit quantized digital signal based on the signal DTIS1 'and has a word transmission rate of 27 MBps
The DTI signal DTIP1 is reproduced.

Similarly, in the descrambling / S / P converter 66, the serialized SDTI signal DT
IS2 'is descrambled, and the serialized SDTI signal DTIS descrambled is descrambled.
SDTI serialized by performing S / P conversion on 2 ′
S, which is a 10-bit quantized digital signal based on the signal DTIS2 'and has a word transmission rate of 27 MBps
Reproduces the DTI signal DTIP2 and performs descrambling processing.
In the S / P converter 67, the serialized SDT
A 10-bit quantized digital signal based on the serialized SDTI signal DTIS3 'by subjecting the I signal DTIS3' to descrambling processing, performing S / P conversion on the serialized SDTI signal DTIS3 'subjected to the descrambling processing. Word transmission rate is 27MBp
Then, the SDTI signal DTIP3 is reproduced, and the descramble processing / S / P converter 68 performs descrambling on the serialized SDTI signal DTIS4 ', and performs descrambling on the serialized signal. The SDTI signal DTIP4 is subjected to S / P conversion and the SDTI signal DTIP4 having a word transmission rate of 27 MBps, which is a 10-bit quantized digital signal based on the serialized SDTI signal DTIS4 ', is reproduced.
Further, the descrambling / S / P converter 69 performs descrambling on the serialized SDTI signal DTI5 ', and converts the serialized SDTI signal DTI5' on which the descrambling has been performed into an S / P signal. P
Converted and serialized SDTI signal DTIs
5 'is a 10-bit quantized digital signal based on
SDTI signal D with word transmission rate of 27 MBps
Play TIP5.

As a result, the SDTI signal DTIP from the descrambling / S / P converters 66 to 69, which sets the word transmission rate of the reproduced 5 channels to 27 MBps,
1 to DTIP5 are obtained.

FIG. 15 shows a transmission signal forming section 40 in the example of the data transmission apparatus shown in FIG. 10 according to the example of the data transmission method according to the invention described in the claims of the present application.
, Composite 20-bit word string data DZ
(20) shows an example of a data receiving apparatus that receives a transmission signal SZ based on serial data DZS obtained by conversion.

In the example of the data receiving apparatus shown in FIG. 15, for example, an electric signal suitable for a data transmission line formed by using a coaxial cable or an optical fiber formed by using an optical fiber is used. A receiving unit 71 for receiving a transmission signal SZ which is an optical signal suitable for the data transmission path. The receiving unit 71 transmits the transmission signal SZ
Is received, the serial data DZS based on the received transmission signal SZ is reproduced, and the reproduced serial data DZS is supplied to the synchronous data detection / S / P converter 72.

In the synchronous data detection / S / P converter 72, three consecutive 20-bit word data 3FF: 3FFh, 000: 000h and 000: which are 20-bit word synchronous data in the serial data DZS.
000h is detected as synchronous data, the word is synchronized based on the detected synchronous data, S / P conversion is performed on the serial data DZS, and the serial data DZS is converted based on the serial data DZS. The composite 20-bit word string data DZ (20), which is parallel data having a transmission rate of 74.25 MBps, is reproduced. The composite 20-bit word string data DZ (20) obtained from the synchronous data detection / S / P converter 72 is supplied to the specific word detector 73.

In the specific word detecting section 73, the composite 20-bit word string data DZ (20) is supplied to the serial data restoring section 44 ″ through it, and the 20-bit word in the composite 20-bit word string data DZ (20) is Three consecutive 20-bit word data 3FF: 3FFh, 000000: h and 000000h, which are synchronous data, are detected as specific words, and the resulting detection output signal SDD is sent out. Is supplied to the serial data restoration unit 44 ". The serial data restoration unit 44 "is also supplied with a detection output signal SDD obtained from the specific word detection unit 73, a clock pulse signal CA having a frequency of 270 MHz, and a clock pulse signal CB having a frequency of 74.25 MHz.

Although not shown, the serial data restoring section 44 "has the same configuration as the serial data restoring section 44 shown in FIG. 11. However, the serial data restoring section 44" has a serial data restoring section. Eight memory units corresponding to the memory units 50A to 54A in the unit 44,
Memory units 50B to 5 in serial data restoration unit 44
Eight memory units corresponding to 4B and eight switches corresponding to five switches 56 to 60 in the serial data restoration unit 44 are connected to the switch 45 and the control signal forming unit 46 in the serial data restoration unit 44, respectively. It is provided in addition to each corresponding part.

In the serial data restoring section 44 ″, the control signal CDF is synchronized with each other for a predetermined time section,
Eight 20-bit word string data constituting a first portion corresponding to a predetermined time section of the composite 20-bit word string data DZ (20) are collectively written into eight memory units. In addition, eight 20-bit word string data forming a second portion corresponding to a predetermined time section of the composite 20-bit word string data DZ (20) are respectively 8 bits.
The data is collected and written in the memory units.

Then, in every other predetermined time section, eight 20-bit word string data respectively written in the eight memory units are read from the eight memory units, and at this time, Each of the eight 20-bit word string data written in each of the eight memory units is read out as forming serial data, and is read out from the eight memory units as eight serial data. Is obtained.

In every other predetermined time interval, the eight 20-bit word string data written in the eight memory units are read from the eight memory units, respectively. , And each of the eight 20-bit word string data written in the eight memory units is read as forming serial data, and each of the eight memory units is converted into serial data from the eight memory units. Eight second read outputs are obtained.

These eight first read outputs and eight second read outputs are combined by eight switches, and each of the eight switches is converted into a series of serial digital signals. 8 channels of serialized S
A DTI signal is obtained. These eight channels of serialized SDTI signals are supplied to the serial data restoration unit 4.
4 ", each having a bit transmission rate of 27
2-channel serialized SD with 0 Mbps
These are TI signals DTIS1 and DTIS2, and 6-channel serialized SDTI signals DTISa to DTISf each having a bit transmission rate of 143 Mbps.

In the example of the data transmission method implemented by using the example of the data transmission apparatus shown in FIG. 1, FIG. 9 or FIG. 10, for example, 5 channels or 8 channels are serialized. Although the SDTI signal or the SDTI signal which is parallel data is multiplex-transmitted, the number of multiplex-transmitted SDTI signals is not limited to 5 or 8 channels, but may be any number of channels. I can do it.

[0122]

As is apparent from the above description, according to the data transmission method according to any one of the first to fifth aspects of the present invention,
A composite 20-bit word sequence formed by combining a plurality of serial digital signals obtained by serializing each of a plurality of SDTI signals, which are transmitted to be converted into serial data, and an additional word data group In the data, for example, as in the data transmission method according to the invention described in claim 2 of the present application, a plurality of 20-bit word data to which a predetermined code is assigned has a specific arrangement. A series of 20-bit word synchronization data is included. Such 20-bit word synchronization data is added to the received serial data on the receiving side that receives serial data based on the composite 20-bit word string data including the same. From the composite 20-bit word string data obtained based on the Or for a word synchronization data required for processing for reproducing a plurality of SDTI signals the state of parallel data, are made to be appropriately detected. Therefore, on the receiving side, based on the received composite 20-bit word string data, the data synchronization required for the reproduction processing of a plurality of SDTI signals each in the state of serial data or parallel data is performed. A state where the state can be reliably obtained is secured.

According to the data transmission method according to any one of the first to fifth aspects of the present invention, the composite data to which the 20-bit word synchronous data is added is provided. The conversion of the 20-bit word string data into serial data, the transmission of the converted serial data, and the reception side receiving the serial data, converting the received serial data into composite 20-bit word string data, For example, since transmission can be performed by using a transmission circuit device used for transmission and reception of a digital video signal under an HDTV system, a plurality of SDTI signals can be relatively easily prepared by using a plurality of means. It can be multiplexed and transmitted so that it can be reliably reproduced on the receiving side.

Further, according to the data transmission apparatus according to the invention described in claim 6 of the present application,
A plurality of serial digital signals obtained by serializing each of a plurality of SDTI signals, which are transmitted to be converted into serial data and transmitted by the data transmitting means, and an additional word data group are synthesized and formed. In the composite 20-bit word string data, for example, a plurality of 20-bit word data to which a predetermined code is assigned is connected in a specific arrangement.
0 bit word synchronization data is included,
On the receiving side receiving the serial data based on the composite 20-bit word string data including the same, the bit word synchronization data is converted into serial data or parallel data from the composite 20-bit word string data obtained based on the received serial data. The word synchronization data required for the process of reproducing the plurality of SDTI signals in the data state is to be properly detected as word synchronization data. A plurality of SDs, each in the state of serial data or parallel data, based on the composite 20-bit word string data
A state in which the data synchronization state required for the reproduction processing of the TI signal is reliably obtained is secured.

According to the data transmission apparatus of the invention described in claim 6 of the present application, the serial data of the composite 20-bit word string data to which the 20-bit word synchronization data is added , Transmission of the converted serial data, and reception of the serial data on the receiving side, conversion of the received serial data into composite 20-bit word string data, and the like, for example, under the HDTV system. The transmission circuit device used for transmission and reception of the digital video signal can be used, and therefore, a plurality of SDTI signals can be reliably reproduced on the reception side by means that can be prepared relatively easily. It can be multiplexed and transmitted to obtain.

[Brief description of the drawings]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
FIG. 9 is a block diagram showing an example of a data transmission device according to the invention described in claim 6 in the claims of the present application, in which the example of the data transmission method according to the invention described in 2, 3, or 5 is implemented. is there.

[Fig. 2] Claims 1 and 2 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

[Fig. 3] Claims 1 and 2 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

[Fig. 4] Claims 1 and 2 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

[Fig. 5] Claims 1 and 2 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

[Fig. 6] Claim 1, Claim 1 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

[Fig. 7] Claims 1 and 2 in the claims of the present application.
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

FIG. 8: Claim 1 in the claims of the present application
9 is a time chart for explaining an example of a data transmission method according to the invention described in 2, 3, or 5.

FIG. 9: Claim 1 in the claims of the present application
FIG. 7 is a block diagram showing an example of a data transmission device according to the invention described in claim 6 in the claims of the present application, in which the example of the data transmission method according to the invention described in 2, 4, or 5 is implemented. is there.

FIG. 10: Claim 1 in the claims of the present application
A block configuration showing an example of the data transmission apparatus according to the invention described in claim 6 in the claims of the present application, in which another example of the data transmission method according to the invention described in 2, 3, or 5 is implemented. FIG.

FIG. 11 is a view showing a first embodiment of the present invention;
FIG. 9 is a block diagram illustrating an example of a data receiving device that receives a transmission signal transmitted according to the example of the data transmission method according to the invention described in 2, 3, or 5.

FIG. 12 is a time chart for explaining an example of the data receiving apparatus shown in FIG. 11;

FIG. 13 is a time chart for explaining an example of the data receiving apparatus shown in FIG. 11;

FIG. 14: Claim 1 in the claims of the present application
FIG. 9 is a block diagram illustrating an example of a data receiving device that receives a transmission signal transmitted according to the example of the data transmission method according to the invention described in 2, 4, or 5.

FIG. 15: Claim 1, in the claims of the present application
FIG. 11 is a block diagram showing an example of a data receiving device that receives a transmission signal transmitted according to another example of the data transmission method according to the invention described in 2, 3, or 5.

FIG. 16 is a conceptual diagram provided for describing an example of a data format of an SDTI signal.

FIG. 17 is a conceptual diagram serving as an example of a data format of an SDTI signal.

[Explanation of symbols]

11, 11 ', 11 "... 20-bit word string data forming unit, 12-16, 45, 56-60... Switch, 17, 46... Control signal forming unit, 19A, 1
9, 20A to 24A, 20B to 24B, 50A to 54
A, 50B to 54B: memory unit, 25A, 25
B, 26 ... data set part, 27, 36, 39 ...
P / S converters, 28, 37, 40: transmission signal forming unit, 31 to 35: scramble processing unit, 4
1, 61, 71 ... receiving unit, 42, 62, 72 ...
• Synchronous data detection • S / P converter, 43, 63, 73
... Specific word detector, 44, 44 ', 44 "
・ Serial data restoration unit, 65-69 ・ ・ ・ descrambling processing unit ・ S / P conversion unit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04N 7/24

Claims (6)

[Claims] 1. A plurality of serial digital signals each obtained by serializing a plurality of quantized digital signals each formed according to a specific signal format used for transmitting compressed digital video data or video and audio data. For the signal, each predetermined unit section is written to a plurality of memory means, respectively, and the unit section written to each of the plurality of memory means is sequentially read out as 20-bit word string data. By combining a plurality of 20-bit word string data to be read and an additional word data group including 20-bit word synchronization data to which a predetermined code is given, the additional word data group is arranged at predetermined word intervals. Forming the inserted composite 20-bit word string data; The case 20-bit word sequence data into serial data, the data transmission method of transmitting in order to transmit the serial data. 2. An additional word data group is selected so as to include, as a 20-bit word synchronization data, a portion in which a plurality of 20-bit word data to which a predetermined code is assigned is connected in a specific arrangement. The data transmission method according to claim 1, wherein: 3. A method according to claim 1, wherein a plurality of serial digital signals are obtained by serially transmitting 10-bit quantized digital signals in a state where they have been subjected to scramble processing. Data transmission method as described. 4. A method according to claim 1, wherein each of said plurality of serial digital signals is
3. The data transmission method according to claim 1, wherein the parallel data converted into a 10-bit quantized digital signal is obtained by performing a parallel / serial conversion and a scrambling process. 5. A plurality of 20-bit word data to which a predetermined code is assigned based on timing reference data included in each of a plurality of quantized digital signals, in an additional word data group. 5. The data transmission method according to claim 3 or 4, wherein a part connected by the above is selected as one containing 20-bit word synchronous data. 6. A plurality of serial digital signals obtained by serializing each of a plurality of quantized digital signals formed according to a specific signal format used for transmitting compressed digital video data or video and audio data. For each signal, each predetermined unit section is written to a plurality of memory means, and the unit sections written to each of the plurality of memory means are sequentially read out as 20-bit word string data. By combining a plurality of 20-bit word string data to be read and an additional word data group including 20-bit word synchronization data to which a predetermined code is given, the additional word data group is arranged at predetermined word intervals. 2 forming the inserted composite 20-bit word string data Bit word sequence data forming unit and, the 20-bit word sequence data formed composite obtained from the unit 2
Converts the 0-bit word string data to serial data,
A data transmission means for transmitting the serial data for transmission.