JP2001068620A - Semiconductor device and its manufacture, circuit board and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device, wherein wiring distance is shortened, and a method for manufacturing it, a circuit board and an electronic equipment. SOLUTION: A semiconductor device contains a board 10 wherein a wiring pattern 12 is formed on one surface thereof, and a plurality of semiconductor chips 20 and 30 that are mounted on the board 10 and connected electrically to the wiring pattern 12. A pair of parts 15 and 17 of the wiring pattern 12 are joined to each other. That is, since a pair of parts 15 and 17 of the wiring pattern 12 are joined, electrical connection is accomplished with the joint part in between. As a result, wiring distance is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method of manufacturing the same, a circuit board, and an electronic device.

[0002]

2. Description of the Related Art There is known a multichip module in which a plurality of semiconductor chips are mounted on an interposer. A package having a stack structure in which a plurality of semiconductor chips are stacked by bending an interposer has also been developed. In the conventional stack structure, since a plurality of semiconductor chips are mounted on one interposer, there is a problem that a wiring distance between both ends of the interposer becomes long.

An object of the present invention is to solve this problem, and an object of the present invention is to provide a semiconductor device and a method of manufacturing the same, a circuit board, and an electronic device, which reduce the wiring distance.

[0004]

(1) A semiconductor device according to the present invention includes a substrate having a wiring pattern formed on one surface, and a semiconductor device mounted on the substrate and electrically connected to the wiring pattern. And at least one semiconductor chip, wherein a pair of portions including first and second regions other than the portion connected to the semiconductor chip in the wiring pattern are joined.

[0005] According to the present invention, since the pair of portions of the wiring pattern are joined, electrical connection can be achieved via the joined portions. As a result, the wiring distance can be reduced.

(2) In this semiconductor device, the substrate may be bent and the pair of portions of the wiring pattern may be joined to face each other.

[0007] According to this, it is possible to use a substrate having a wiring pattern formed on one side to form a stack structure in which the wiring distance does not increase.

(3) In this semiconductor device, in a bent state, the substrate has a pair of portions which are joined to face each other;
A portion extending in a direction spaced from each of the pair of opposing portions, wherein the pair of portions to which the wiring pattern is bonded may be formed on the pair of portions of the substrate. .

(4) In this semiconductor device, a slit may be formed in the portion of the substrate extending from the pair of opposing portions.

As described above, by forming the slit,
The substrate is easily bent.

(5) In this semiconductor device, a plurality of the semiconductor chips are mounted on the substrate, and
The pair of portions bent between two semiconductor chips and joined to the wiring pattern may be portions other than between the two semiconductor chips.

(6) In this semiconductor device, a first portion of the wiring pattern electrically connected to the first semiconductor chip and a second portion electrically connected to the second semiconductor chip. Means a mirror-symmetrical shape, and the first
The second semiconductor chip may have a mirror-symmetric circuit structure.

According to this, a pair of semiconductor chips having a mirror symmetrical circuit structure are mounted on the first and second portions having a mirror symmetrical shape. Therefore, the wiring design for each semiconductor chip is simplified.

(7) A semiconductor device according to the present invention comprises a first substrate having a first wiring pattern formed on one surface and a second substrate having a second wiring pattern formed on one surface. And a semiconductor chip mounted on the first substrate and electrically connected to the first wiring pattern, wherein the first and the second wiring patterns are formed with the semiconductor chip interposed therebetween. A pair of portions comprising a second region,
The second wiring pattern is joined to a pair of portions including third and fourth regions.

According to the present invention, since the pair of portions of the first wiring pattern and the pair of portions of the second wiring pattern are joined, electrical connection is achieved via the joining portion. . As a result, the wiring distance can be reduced.

(8) In this semiconductor device, the second
And a semiconductor chip mounted on the substrate and electrically connected to the second wiring pattern.

(9) In this semiconductor device, the first
And the pair of portions of the second wiring pattern may be joined to face each other.

According to this, it is possible to configure a stack structure in which the wiring distance is not long by using the first and second substrates having the wiring pattern formed on one side.

(10) In this semiconductor device, each of the first and second substrates has a portion joined to face each other, a portion extending from the facing portion in a direction spaced from each other, And the pair of portions of the first wiring pattern may be formed on the opposed portion of the first substrate.

(11) In the above-described semiconductor device, the first and second wiring patterns have a mirror-symmetric shape, and the semiconductor chip electrically connected to the first and second wiring patterns is Semiconductor device having a mirror-symmetric circuit structure.

According to this, a pair of semiconductor chips having a mirror-symmetrical circuit structure are mounted on the first and second wiring patterns having a mirror-symmetrical shape. Therefore,
Wiring design for each semiconductor chip is simplified.

(12) A semiconductor device according to the present invention includes a substrate having a wiring pattern formed on one surface, and at least one semiconductor chip mounted on the substrate and electrically connected to the wiring pattern. And a pair of portions of the wiring pattern formed with a portion connected to the semiconductor chip interposed therebetween.

According to the present invention, since the pair of portions of the wiring pattern are joined, electrical connection is achieved through the joined portions. As a result, the wiring distance can be reduced.

(13) The semiconductor device described above is mounted on a circuit board according to the present invention.

(14) An electronic apparatus according to the present invention includes the above semiconductor device.

(15) In a method of manufacturing a semiconductor device according to the present invention, at least one semiconductor chip is mounted on a substrate having a wiring pattern formed on one surface, and the semiconductor chip and the wiring pattern are electrically connected. And a second step in which the substrate is bent to join a portion facing the wiring pattern.

According to the present invention, since the opposing portions of the wiring pattern are joined, electrical connection can be achieved via the joining portions. As a result, the wiring distance can be reduced.

(16) In this method of manufacturing a semiconductor device, in the first step, the plurality of semiconductor chips are mounted on the substrate, and in the second step, the substrate is bent between the two semiconductor chips. The pair of portions of the wiring pattern may be joined at a portion except between the two semiconductor chips.

(17) In the method of manufacturing a semiconductor device according to the present invention, the first method in which the first wiring pattern is formed on one surface is provided.
A first step of mounting a semiconductor chip on the substrate and electrically connecting the semiconductor chip and the first wiring pattern; and a second substrate having a second wiring pattern formed on one surface. A second step of preparing and joining a pair of portions of the first wiring pattern that sandwich the semiconductor chip and a pair of portions of the second wiring pattern.

According to the present invention, since the pair of portions of the first wiring pattern and the pair of portions of the second wiring pattern are joined, electrical connection can be achieved via the joining portions. . As a result, the wiring distance can be reduced.

(18) The method of manufacturing a semiconductor device may include a step of mounting a semiconductor chip on the second substrate before the second step.

(19) In this method of manufacturing a semiconductor device, the pair of portions of the first wiring pattern and the pair of portions of the second wiring pattern may be joined to face each other.

[0033]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a diagram showing a semiconductor device according to a first embodiment to which the present invention is applied. In FIG. 1, a semiconductor device 1 is mounted on a circuit board 2. For example, a glass epoxy substrate or the like is generally used for the circuit board 2. A wiring pattern 3 made of, for example, copper is formed on the circuit board 2 so as to form a desired circuit. By connecting the wiring pattern 3 and an external terminal of the semiconductor device 1, their electrical continuity is improved. Have been.

The semiconductor device 1 includes a substrate 10 and at least one or a plurality of semiconductor chips 20 and 30.
The substrate 10 is used as an interposer for mounting the semiconductor chips 20 and 30, and has at least one or a plurality of mounting areas. The material of the substrate 10 may be an organic or inorganic material, or may have a composite structure thereof. As the substrate 10 formed of an organic material, for example, a flexible substrate made of a polyimide resin is exemplified. When the substrate 10 is bent, it is preferable to use a flexible substrate having flexibility. FPC as flexible substrate
(Flexible Printed Circuit), glass epoxy tape, and TAB (Tape Automated Circuit).
ated Bonding) may be used. Further, as the substrate 10 formed from an inorganic material, for example, a ceramic substrate or a glass substrate can be used. As a composite structure of an organic material and an inorganic material, for example, a glass epoxy substrate is mentioned.

On one surface of the substrate 10, the wiring pattern 1
2 are formed. The wiring pattern 12 can be formed of a conductive material such as copper. The wiring pattern 12
It is preferable to be plated with solder, tin, gold, nickel or a composite material thereof.

The wiring pattern 12 includes a first portion 22 electrically connected to the first semiconductor chip 20 and a second portion 32 electrically connected to the second semiconductor chip 30. The first and second portions 22, 32 may have a mirror-symmetric shape. Alternatively, wiring pattern 1
The two first and second portions 22, 32 may have the same shape. By doing so, the design data and mask used when manufacturing the substrate 10 can be shared, and the initial cost of manufacturing the substrate can be reduced.

The wiring pattern 12 includes a semiconductor chip 20,
In the mounting area 30, the electrodes 2 of the semiconductor chips 20 and 30
4 and 34, and a land portion may be formed for connection with the electrodes 24 and 34. The wiring pattern 12 may be attached to the substrate 10 via an adhesive (not shown) to form a three-layer substrate. Alternatively, the wiring pattern 12 is formed on the substrate 10 without an adhesive and
A layer substrate may be configured. The wiring pattern 12 is preferably covered with a protective film such as a resist (not shown) except for an electrical connection portion such as a land portion.

A plurality of through holes 14 are formed in the substrate 10. The through holes 14 are for electrically connecting the plurality of external terminals 16 to the wiring pattern 12. That is, the external terminals 16 protruding from the surface of the substrate 10 opposite to the surface on which the wiring pattern 12 is formed are connected to the through holes 1.
4 can be electrically connected to the wiring pattern 12. For example, if the wiring pattern 12 passes over the through hole 14, the external terminals 16 can be provided on the wiring pattern 12 through the through hole 14.

The external terminals 16 are formed of solder or the like.
The solder filled in the through hole 14 may be melted to form a ball with surface tension, or the solder ball may be placed on a conductive material provided in the through hole 14. The through hole 14 may be formed by plating the inner surface of the through hole 14. The external terminal 16 is connected to the first
And one of the second portions 22 and 32 (for example, the first portion 22) may be provided in a region where the first portion 22 is formed.

The wiring pattern 12 formed on the through hole 14 may be bent into the through hole 14 and used as an external terminal. Further, instead of actively forming the external terminals, a solder cream applied to the motherboard at the time of mounting the motherboard may be used, and the external terminals may be eventually formed by the surface tension at the time of melting. This semiconductor device is a so-called land grid array type semiconductor device.

In this embodiment, the substrate 10 is bent. Specifically, the semiconductor chips 20, 3
The substrate 10 is bent with the surface on which the “0” is mounted facing inside. The substrate 10 is bent between the pair of semiconductor chips 20 and 30. Furthermore, a pair of portions (for example, ends) 11 and 13 of the substrate 10 are joined to face each other. Since the semiconductor chips 20 and 30 are arranged inside the bent substrate 10, the substrate 10 is joined to the pair of portions 11 and 1.
3 and extends in a direction spaced apart from each other.
That is, the substrate 10 is bent at a portion other than between the pair of semiconductor chips 20 and 30. In particular,
The external terminal 16 of the pair of joined portions 11 and 13
The extending portion from the portion 11 close to
A portion extending from the portion 13 distant from the external terminal 16 is bent. A slit 18 is formed in this extended portion. Since the slit 18 is formed, the extended portion is easily bent. The slit 18 may be formed in another bent portion, or may be covered with a resin that is easily bent.

In the wiring pattern 12, a pair of portions 15, 17 formed on a pair of portions 11, 13 of the substrate 10 to be bonded are bonded. Therefore, the pair of separated portions 11 and 13 in the wiring pattern 12 are electrically connected, so that the wiring distance can be reduced. As means for bonding, anisotropic conductive film, anisotropic conductive adhesive,
A conductive resin paste (eg, a resin containing a silver paste) may be used. Alternatively, Au-Au, Au-Sn,
The wiring pattern 12 may be joined by metal joining with solder or the contraction force of the insulating resin. Metal bonding is
Single point bonding may be applied, or ultrasonic wave, heat or pressure may be applied. Further, mechanical pressure welding such as caulking may be applied. It is preferable that the pair of portions 11 and 13 to which the wiring pattern 12 is bonded include a land portion having an area larger than a portion for wiring. If the same method as the semiconductor chip mounting method described later is adopted, some steps can be simplified.

Further, the wiring pattern 1 is formed inside the slit 18.
The pair of two parts may be joined to each other. By doing so, it is possible to efficiently apply bonding energy to a pair of portions to be bonded at the time of bonding. in this case,
Slits may be formed in both of the pair of portions of the substrate 10.

The pair of portions 11 and 13 of the substrate 10 are joined by joining the pair of portions 15 and 17 of the wiring pattern 12.
The joined state is maintained. Alternatively, the pair of portions 1 of the substrate 10 may be formed by a mechanical method such as an adhesive, an adhesive, and caulking.
The joined state of 1 and 13 may be maintained.

A semiconductor chip 20 mounted on the substrate 10,
Reference numeral 30 denotes the first and second portions 22 of the wiring pattern 12,
32. When face-down bonding is applied, the semiconductor chips 20, 30
Are mounted on the wiring pattern 12. The electrodes 24 and 34 of the semiconductor chips 20 and 30 are connected to the wiring pattern 12.
Joined to. As a joining means, an anisotropic conductive film, an anisotropic conductive adhesive, or a conductive resin paste (eg, a resin containing a silver paste) may be used. Alternatively, Au-A
The wiring pattern 12 may be bonded by metal bonding using u, Au-Sn, solder, or the like, or by the contraction force of an insulating resin. Of course, the present invention is not limited to the face-down type mounting method described above, but may be a face-up type mounting using wire bonding, or a TAB mounting method for connecting fingers.

First and second portions 2 of wiring pattern 12
When the mirrors 2 and 32 have a mirror-symmetric shape, the semiconductor chips 20 and 30 also preferably have a mirror-symmetric circuit structure. By doing so, for example, the semiconductor chip 2
When 0 and 30 are memories, the same external terminal 16
Address terminals and data terminals can be easily shared.

As described above, the substrate 10 is bent, and the semiconductor chips 20 and 30 are stacked as shown in FIG. By doing so, the semiconductor device 1 can be downsized. Semiconductor chip 20,
It is preferable that 30 is bonded with an adhesive 26 or the like or fixed by a mechanical method.

The semiconductor device according to the present embodiment is configured as described above, and a method of manufacturing the semiconductor device will be described below.

In the manufacturing method according to the present embodiment, at least one or a plurality of semiconductor chips 20 and 30 are mounted on a substrate 10 having a wiring pattern 12 formed on one surface, and the semiconductor chips 20 and 30 are interconnected. And a step of electrically connecting the pattern 12. This step is performed in a planar state, that is, in a state where the substrate 10 is not bent. For details, the contents described above for the configuration can be applied.

Further, a step of providing a plurality of external terminals 16 may be included. For example, the through hole 1 formed in the substrate 10
An external terminal 16 is provided via the terminal 4 so as to protrude on the opposite side to the surface on which the wiring pattern 12 is formed. The external terminal 16
It can be formed of solder or the like. Solder may be provided in the through hole 14 and the ball may be melted to form a ball with surface tension. Alternatively, a conductive material may be provided in the through hole 14 and a solder ball may be placed thereon. The through hole 14 may be formed by plating the inner surface of the through hole 14.

Next, the substrate 10 is bent, and one of the paired portions 15 and 17 of the wiring pattern 12 is joined to face each other. At this time, a mold may be used. Also,
A plurality of semiconductor chips 20, 30 may be stacked.

For example, the substrate 10 is bent between a pair of semiconductor chips 20 and 30, and the surfaces of the semiconductor chips 20 and 30 opposite to the surfaces on which the electrodes 24 and 34 are formed are bonded with an adhesive 26 or the like. I do. In addition, the pair of portions 11 and 13 except for between the pair of semiconductor chips 20 and 30 are joined to face each other. At this time, the pair of portions 15 and 17 of the wiring pattern 12 are also joined to face each other. Note that as for the joining method, the contents described above for the configuration can be applied.

According to the present embodiment, a semiconductor device having a stacked structure can be manufactured using an inexpensive single-sided substrate, so that the cost can be reduced. The contents described in the present embodiment can be applied to the following embodiments as much as possible.

In this embodiment, the semiconductor device having the external terminal has been described. However, a part of the substrate may be extended, and the external connection may be made therefrom. A part of the board may be used as a lead of the connector, the connector may be mounted on the board, or the wiring pattern itself of the board may be connected to another electronic device.

Further, a wiring pattern may be provided on a portion of the substrate which is further folded so as to straddle the wiring pattern of one of the substrates (like a jumper lead). In that case, the semiconductor chip may or may not be mounted.
The same applies to the following embodiments.

(Second Embodiment) FIG. 2 is a diagram showing a semiconductor device according to a second embodiment to which the present invention is applied. This semiconductor device includes a substrate 40 and a plurality of semiconductor chips 20, 30, 50. Semiconductor chips 20, 3
For 0, the one described in the first embodiment may be used, and the same semiconductor chip 50 may be used.

The wiring pattern 4 is formed on one surface of the substrate 40.
2 are formed. The material described for the substrate 10 and the wiring pattern 12 in the first embodiment can be applied to the material of the substrate 40 and the material of the wiring pattern 42. A plurality of through holes 44 are formed in the substrate 40, and external terminals 46 are provided. The contents described for the through hole 14 and the external terminal 16 in the first embodiment can be applied to the through hole 44 and the external terminal 46.

In this embodiment, the pair of portions 41 and 43 of the substrate 40 are joined. The configuration of the substrate 40 from the portion where the external terminal 46 is provided to the pair of joined portions 41 and 43 is the same as that of the portion where the external terminal 16 is provided as described in the first embodiment. The configuration of the substrate 10 up to the pair of portions 11 and 13 is the same. Also, the contents described in the first embodiment can be applied to the mounting form of the semiconductor chips 20 and 30, and these contents can also be applied to the mounting form of the semiconductor chip 50.

In this embodiment, a pair of portions 45 and 47 of the wiring pattern 42 are joined. For details, the contents of the pair of portions 15 and 17 of the joined wiring pattern 12 described in the first embodiment are applied.

In this embodiment, the substrate 40 has a portion 48 further extending from one portion 43 of the joined pair of portions. The extended portion 48 is bent and fixed to another portion of the substrate 40. For fixing,
A mechanical method such as an adhesive, an adhesive, and caulking may be applied. Further, the wiring pattern 42 includes a portion 48 extending from one of the paired portions 43 of the substrate 40.
It is formed up to the top. This extended portion 48
A semiconductor chip 50 is mounted, and the semiconductor chip 50 is electrically connected to the wiring pattern 42. As the connecting means, an electric connecting means between the semiconductor chips 20 and 30 and the wiring pattern 42 can be applied.

According to the present embodiment, in addition to the effects described in the first embodiment, a multi-stage stack structure can be formed.

In the method of manufacturing a semiconductor device according to the present embodiment, a plurality of semiconductor chips 20, 30, and 50 are mounted on the same surface of substrate 40 while substrate 40 is expanded in a plane. Then, the method described in the first embodiment is applied, and further, a portion 48 of the substrate 40 extending from one portion 43 of the joined pair of portions is bent, and another portion of the substrate 40 is bent. Secure to the part. Thus, a plurality of semiconductor chips 20, 30, and 50 are stacked to form a stack structure.

As for this embodiment, the contents described in the first embodiment are applied as much as possible.

(Third Embodiment) FIG. 3 is a view showing a semiconductor device according to a third embodiment to which the present invention is applied. This semiconductor device includes first and second substrates 60, 70
And a plurality of semiconductor chips 20 and 30. As the semiconductor chips 20 and 30, those described in the first embodiment may be used.

On one surface of the first and second substrates 60 and 70, first and second wiring patterns 62 and 72 are formed. For the material of the first and second substrates 60 and 70 and the material of the first and second wiring patterns 62 and 72, the contents of the substrate 10 and the wiring pattern 12 described in the first embodiment can be applied. it can. The first substrate 60 has a plurality of through holes 64 formed therein, and a plurality of external terminals 66.
Is provided. In the through hole 64 and the external terminal 66,
The contents described in the first embodiment can be applied.

The semiconductor chip 20 is mounted on the first substrate 60, and the first wiring pattern 62 and the semiconductor chip 20
And are electrically connected. The semiconductor chip 30 is mounted on the second substrate 70, and the second wiring pattern 72 and the semiconductor chip 30 are electrically connected. The semiconductor chips 20 and 30 and the first and second wiring patterns 62;
The contents described in the first embodiment can be applied to the electrical connection with the switch 72. Further, the semiconductor chips 20 and 30 are the same as the first embodiment in that the surface opposite to the surface on which the electrodes 24 and 34 are formed is bonded. Further, the first and second wiring patterns 6
The semiconductor chips 20 and 30 electrically connected to each other may have a mirror-symmetric circuit structure. Also in this regard, the contents described in the first embodiment are applied.

In the present embodiment, a pair of portions (for example, ends) 61 and 63 of the first substrate 60 and a pair of portions (for example, ends) 71 and 73 of the second substrate 70 are joined. ing. Specifically, the pair of portions 61 and 6 of the first substrate 60
3 and one of the pair of portions 71 and 73 of the second substrate 70 are joined to face each other, and the other of the pair of portions 61 and 63 of the first substrate 60 and the second substrate 70 and the other of the pair of portions 71 and 73 are joined to face each other.

A pair of portions 61 and 63 of the first substrate 60
Are located on both sides of the semiconductor chip 20. The pair of portions 71 and 73 of the second substrate 70 are located on both sides of the semiconductor chip 30.

The pair of portions 61 and 63 of the first substrate 60
A portion 65 extending from one of the pair of portions 71 and 73 of the second substrate 70;
Extend in directions spaced from each other. In the example illustrated in FIG. 3, a portion 75 extending from one of the pair of portions 71 and 73 of the second substrate 70 is a portion extending from one of the pair of portions 61 and 63 of the first substrate 60. It is bent in a direction away from 65. A slit may be formed in the bent portion.

A portion 67 extending from the other of the pair of portions 61 and 63 of the first substrate 60 and a portion 77 extending from the other of the pair of portions 71 and 73 of the second substrate 70 are: They extend in directions spaced from each other. In the example shown in FIG. 3, a portion 77 extending from the other of the pair of portions 71 and 73 of the second substrate 70 corresponds to the pair of portions 6 of the first substrate 60.
It is bent in a direction away from a portion 67 extending from the other of the first and the third 63. The slit described in the first embodiment may be formed in the bent portion.

A pair of portions 8 of the first wiring pattern 62 located on the pair of portions 61 and 63 of the first substrate 60
2 and 84 and a pair of portions 8 of the second wiring pattern 72 located on the pair of portions 71 and 73 of the second substrate 70.
6, 88 are joined.

More specifically, a portion 82 of the first wiring pattern 62 located on one of the paired portions 61 of the first substrate 60 and a portion 82 of the second substrate 70 of the second wiring pattern 72 A part 86 of the pair of parts located on one part 71 is opposed and joined. Further, a portion 84 of the first wiring pattern 62 located on the other portion 63 of the pair of portions of the first substrate 60 and a portion 84 of the second wiring pattern 72 A portion 88 located on the other portion 73 is joined to be opposed. Note that the contents described in the first embodiment can be applied to the joining means. Of course, the first and second wiring patterns 6 are formed inside the formed slit.
The pair of portions 82, 84, 86, 88 of 2, 72 may be joined together.

A pair of portions 8 of the first wiring pattern 62 located on the pair of portions 61 and 63 of the first substrate 60
2, 84 are located with the semiconductor chip 20 interposed therebetween.
A pair of portions 86 and 88 of the second wiring pattern 72 located on the pair of portions 71 and 73 of the second substrate 70 are:
It is located with the semiconductor chip 30 in between.

In FIG. 3, wiring patterns 62 and 72 are provided on one side.
An example is shown in which the substrates 60 and 70 formed with are formed. However, as long as the cost of joining the two substrates is lower, the multilayer substrates including the build-up substrate, and the multilayer substrate and the single-sided substrate may be connected. A bonding structure may be employed. In the present embodiment, a plurality of semiconductor chips may be mounted on each of the substrates 60 and 70.

In FIG. 3, a part of the first or second substrate 60, 70 or the first
And a part of the second wiring patterns 62 and 72 are joined. The present invention is not limited to this, and the semiconductor chip 20,
The first or second substrate 60, 7 on three or four sides of
0 or a part of the first and second wiring patterns 62 and 72 may be joined.

In this embodiment, the external terminals 6
6 is not always necessary, and the extension of the board may be used as a connector, or the wiring may be extended to the outside by means such as mounting the connector, or other passive parts may be mounted on the board as a semiconductor module. It may be completed.

In the method of manufacturing a semiconductor device according to the present embodiment, the semiconductor chip 20 is mounted on the first substrate 60 having the first wiring pattern 62 formed on one surface, and the semiconductor chip 20 and the first Electrically connecting the wiring pattern 62 to the wiring pattern 62. Regarding the mounting form of the semiconductor chip 20, the contents described in the first embodiment can be applied.

The second wiring pattern 72 is provided on one surface.
Is prepared, and the second substrate 70 is formed.
The semiconductor chip 30 is mounted on the
Is electrically connected to the wiring pattern 72. Regarding the mounting form of the semiconductor chip 30, the contents described in the first embodiment can be applied.

Then, the pair of portions 82 and 84 of the first wiring pattern 62 and the pair of portions 86 and 88 of the second wiring pattern 72 are joined to face each other. In this case, since the first and second substrates 60 and 70 face each other, at least one of the first and second substrates 60 and 70 is bent in the direction of the surface on which the semiconductor chips 20 and 30 are mounted. Is preferred. A slit may be formed in the bent portion to make it easier to bend. In addition, the first and second
Pair of portions 82, 84, 8 of the wiring patterns 62, 72 of FIG.
6, 88 may be joined together. As the joining means, the contents described in the first embodiment can be applied. In FIG. 3, the first
And the second wiring patterns 62 and 72 are joined so as to face each other.
The bonding may be performed such that the substrate exists between the substrates 2 and 72. At this time, it is better to join the pair of portions of the first and second wiring patterns 62 and 72 inside the formed slit. In this case, the mounting density can be increased by stacking a plurality of semiconductor chips.

FIG. 4 is a view showing a step of bending the second substrate 70. As described above, the second substrate 70 on which the semiconductor chip 30 is mounted is bent by the dies 90 and 92. Specifically, one mold 90 is concave, and the other mold 92 is convex. Recess of mold 90 and mold 92
Of the semiconductor chip 30
Are arranged toward the mold 92 side. And the molds 90 and 9
By using 2, the second substrate 60 can be bent. Before the semiconductor chip is mounted on the substrate, the semiconductor chip may be mounted on the substrate after bending processing is performed on the substrate alone. By doing so, it is possible to suppress the stress at the time of bending processing from being applied to the mounting portion of the semiconductor chip.

Subsequently, parts of the first and second substrates 60 and 70 are joined. At this time, the first and second wiring patterns 62 and 72 are also joined. The details are as described above.

Also in the present embodiment, a stack structure can be formed using an inexpensive single-sided substrate.

FIG. 5 shows a notebook personal computer 100 and a mobile phone 200 as electronic devices having a semiconductor device to which the present invention is applied.

In the above-described embodiment, a plurality of semiconductor chips may be mounted on one substrate, and a substrate to be used is not limited to a substrate extending in one direction, but may be extended in a plurality of directions. May be used. Further, a build-up substrate or a multilayer substrate may be used as the substrate within a range where the total cost does not increase.

In the above-described constitutional requirements of the present invention, the “semiconductor chip” is replaced with the “electronic element”, and the electronic element (whether an active element or a passive element) is replaced in the same manner as the semiconductor chip.
An electronic component can also be manufactured by mounting it on a substrate. As electronic components manufactured using such electronic elements,
For example, there are an optical element, a resistor, a capacitor, a coil, an oscillator, a filter, a temperature sensor, a thermistor, a varistor, a volume or a fuse.

Further, in all the embodiments described above, a semiconductor device (mounting module) in which a semiconductor chip and other electronic elements are mixedly mounted on a substrate may be used.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a semiconductor device according to a first embodiment to which the present invention is applied;

FIG. 2 is a diagram illustrating a semiconductor device according to a second embodiment to which the present invention is applied;

FIG. 3 is a diagram showing a semiconductor device according to a third embodiment to which the present invention is applied.

FIG. 4 is a diagram showing a manufacturing process of a semiconductor device according to a third embodiment to which the present invention is applied.

FIG. 5 is a diagram illustrating an electronic apparatus including a semiconductor device manufactured by applying the method according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Substrate 12 Wiring pattern 11, 13 A pair of parts 14 Through hole 15, 17 A pair of parts 16 External terminal 20 Semiconductor chip 22 First part 30 Semiconductor chip 32 Second part 40 Substrate 41, 43 A pair of parts 42 Wiring pattern 44 through hole 45, 47 a pair of parts 46 external terminal 50 semiconductor chip 60 substrate 61, 63 a pair of parts 62 wiring pattern 64 through hole 65 extended part 66 external terminal 67 extended part 70 substrate 71, 73 pair No. 72 Wiring pattern 75 Extended portion 77 Extended portion 82, 84 A pair of portions 86, 88 A pair of portions

Claims (19)

[Claims] 1. A substrate having a wiring pattern formed on one surface thereof; and at least one semiconductor chip mounted on the substrate and electrically connected to the wiring pattern. A semiconductor device in which a pair of portions including first and second regions other than a portion connected to the semiconductor chip is joined. 2. The semiconductor device according to claim 1, wherein the substrate is bent, and the pair of portions of the wiring pattern are joined to face each other. 3. The semiconductor device according to claim 2, wherein in a bent state, the substrate extends in a direction spaced apart from each of the pair of opposing portions and the opposing pair of portions. A semiconductor device comprising: a pair of portions; and the pair of portions to which the wiring pattern is bonded are formed on the pair of portions of the substrate. 4. The semiconductor device according to claim 3, wherein a slit is formed in said portion of said substrate extending from said pair of opposed portions. 5. The semiconductor device according to claim 1, wherein a plurality of said semiconductor chips are mounted on said substrate, said substrate being bent between two said semiconductor chips, The semiconductor device, wherein the pair of portions to which the wiring pattern is bonded is a portion except between the two semiconductor chips. 6. The semiconductor device according to claim 5, wherein a first portion of the wiring pattern electrically connected to a first semiconductor chip and a first portion electrically connected to a second semiconductor chip. A semiconductor device having a mirror-symmetrical circuit structure with the portion 2 having a mirror-symmetrical shape, wherein the first and second semiconductor chips have a mirror-symmetrical circuit structure. 7. A first substrate having a first wiring pattern formed on one surface, a second substrate having a second wiring pattern formed on one surface, and mounted on the first substrate. And a semiconductor chip electrically connected to the first wiring pattern; and a pair of portions including first and second regions formed on both sides of the semiconductor chip in the first wiring pattern. And a pair of portions formed of third and fourth regions of the second wiring pattern. 8. The semiconductor device according to claim 7, further comprising a semiconductor chip mounted on said second substrate and electrically connected to said second wiring pattern. 9. The semiconductor device according to claim 7, wherein said pair of portions of said first wiring pattern and said second portion of said first wiring pattern are provided.
A semiconductor device, wherein the pair of portions of the wiring pattern are joined to face each other. 10. The semiconductor device according to claim 9, wherein each of the first and second substrates extends in a direction mutually spaced apart from a portion to be joined to and opposed to each other. And the pair of portions of the first wiring pattern,
A semiconductor device formed on the opposing portion of the substrate. 11. The semiconductor device according to claim 8, wherein the first and second wiring patterns are mirrors. A semiconductor device having a symmetrical circuit structure, wherein the semiconductor chip electrically connected to the first and second wiring patterns has a mirror-symmetric circuit structure. 12. A substrate having a wiring pattern formed on one surface thereof, and at least one semiconductor chip mounted on the substrate and electrically connected to the wiring pattern. A semiconductor device comprising a pair of portions formed to sandwich a portion connected to the semiconductor chip. 13. A circuit board on which the semiconductor device according to claim 1 is mounted. 14. An electronic apparatus comprising the semiconductor device according to claim 1. 15. A first step of mounting at least one semiconductor chip on a substrate having a wiring pattern formed on one surface and electrically connecting the semiconductor chip and the wiring pattern, and bending the substrate. And a second step of joining portions where the wiring patterns face each other. 16. The method of manufacturing a semiconductor device according to claim 15, wherein in the first step, a plurality of the semiconductor chips are mounted on the substrate; A method of manufacturing a semiconductor device, comprising bending a substrate and joining the pair of portions of the wiring pattern at a portion except between the two semiconductor chips. 17. A first step of mounting a semiconductor chip on a first substrate having a first wiring pattern formed on one surface, and electrically connecting the semiconductor chip to the first wiring pattern. Preparing a second substrate having a second wiring pattern formed on one surface thereof, a pair of portions of the first wiring pattern sandwiching the semiconductor chip, and a pair of portions of the second wiring pattern A method of manufacturing a semiconductor device, comprising: 18. The method for manufacturing a semiconductor device according to claim 17, further comprising a step of mounting a semiconductor chip on the second substrate before the second step. 19. The method of manufacturing a semiconductor device according to claim 17, wherein said pair of portions of said first wiring pattern and said second portion of said second wiring pattern are provided.
A method of manufacturing a semiconductor device in which the pair of portions of the wiring pattern are bonded to face each other.