JP2001067788A - Method and device for information transfer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transfer information stored in a memory in cassette(MIC) provided in a cartridge cassette by AT attachment with packet interface (ATAPI) protocol. SOLUTION: An ATAPI drive 2 conducts data writing/reading to and from media 32 of a cartridge cassette 3, which is provided with an MIC31, and information reading/writing from and to the MIC31. A CPU4 issues a command based on ATAPI protocol to control the drive 2. Moreover, the CPU4 issues a log sense command, that makes the reading of the MIC31 effective, the information read from the MIC31 is stored in a memory 5 and a reset instructing command is issued for the operation of the drive 2 while maintaining the information stored in the memory 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information transfer method suitable for performing information transfer using an ATAPI protocol with a storage medium such as a semiconductor memory provided with auxiliary storage means. Method and apparatus.

[0002]

2. Description of the Related Art In general, information on the capacity and the remaining amount of a recording medium is stored in a part of a recording area of the recording medium, for example, in a TO.
C (Table of Contents) or FAT (File Alloca
This is described as a set of directory data called an “action table”, and these are used as information management data at the time of access.

However, as described above, information on the capacity and the remaining amount of the recording medium (hereinafter referred to as access information management data) is stored in the TOC or F
When the method of recording data in the AT is adopted, for example, a progressive defect occurs in the recording medium and the TOC or FA
If a situation occurs in which the information recorded in T is damaged, the information management data at the time of access will be significantly lost, and in the worst case, the recorded data on the recording medium will not be usable. is there.

In the case of a recording medium such as a magnetic tape or an optical disk which requires a relatively long time for reading / writing information, the process of reading / writing the access-time information management data itself at the time of access becomes an overhead. However, there is a problem that free access is not possible.

Therefore, conventionally, for example, a writable and erasable semiconductor memory is provided as auxiliary storage means attached to a recording medium, and the above-mentioned access information management data and the like are stored in the auxiliary storage means. The problem caused by the lack of TOC and FAT information on such recording media,
There are solutions that solve the problem of the access speed of the recording medium.

As an example of an apparatus using a semiconductor memory as an auxiliary storage means attached to a recording medium, a recording medium is conventionally housed in a case such as a cartridge cassette (hereinafter referred to as a cartridge cassette), and Some cassettes have a semiconductor memory built-in. The semiconductor memory built in the cartridge cassette is hereinafter referred to as an MIC (memory-in-cassette).
I will call it.

At present, the SCSI protocol is adopted as a transfer protocol of the information stored in the MIC.

[0008]

By the way, there are various information transfer protocols between the various devices in addition to the SCSI protocol described above. For example, the ATAPI protocol (AT Attachment with Packet Interface) is an SCS protocol.
It is used for interfaces between ATAPI devices as a protocol that inherits the command set and command format of I. That is, the ATAPI device is controlled by describing the SCSI command as the packet command interface in the operation code of the packet command data.

However, the information stored in the MIC built in the cartridge cassette as described above is
The transfer method by the TAPI protocol has not been established yet, and thus its establishment is expected.

Therefore, the present invention has been made in view of such a situation, and enables information stored in an auxiliary storage means (for example, MIC) provided in a recording medium to be transferred by an ATAPI protocol. It is an object of the present invention to provide an information transfer method and apparatus which can reset a system.

[0011]

According to the information transfer method of the present invention, a recording medium arranged in a driving means operating in accordance with a predetermined transfer protocol, and write / read information to / from an auxiliary storage means provided in the recording medium are provided. Is an information transfer method for transferring data, and issues a read enable setting command for enabling the read function of information stored in the auxiliary storage means to the drive means based on the predetermined transfer protocol. Holding the information read from the information storage means, and, while maintaining the held information, instructs the drive means to reset the operation of the drive means with a reset instruction command for the predetermined transfer protocol. The above-mentioned problem is solved by issuing based on.

Further, the information transfer method of the present invention can be used to transfer write / read information to / from a recording medium provided in a driving means operating in accordance with a predetermined transfer protocol and to an auxiliary storage means provided in the recording medium. Issuing a read enable setting command for enabling the read function of the information stored in the auxiliary storage means to the drive means based on the predetermined transfer protocol. By holding the information read from the means, discarding the held information, and issuing a reset instruction command instructing reset of the operation of the driving means based on the predetermined transfer protocol, the above-described problem is solved. Solve.

Next, the information transfer apparatus of the present invention transfers write / read information to / from a recording medium provided in a driving means operating in accordance with a predetermined transfer protocol and an auxiliary storage means provided in the recording medium. An information transfer device, having a control unit for controlling the operation of the driving unit by issuing a command based on the predetermined transfer protocol, and a storage unit used by the control unit, the control unit, A read enable setting command for enabling the read function of the information stored in the auxiliary storage means is issued to the driving means based on the predetermined transfer protocol, and the information read from the information storage means is issued. A reset instruction for instructing a reset of the operation of the driving means while maintaining the information stored in the storage means. By the command issued on the basis of the predetermined transfer protocol, to solve the problems described above.

Further, the information transfer apparatus of the present invention provides a recording medium arranged in a driving means operating according to a predetermined transfer protocol and information for transferring write / read information to / from an auxiliary storage means provided in the recording medium. A transfer device for controlling the operation of the driving unit by issuing a command based on a predetermined transfer protocol; and a storage unit used by the control unit. Issues a read enable setting command for enabling the read function of the information stored in the auxiliary storage means to the means based on the predetermined transfer protocol, and reads the information read from the information storage means. A reset instruction code for storing the information in the storage means, discarding the information stored in the storage means, and instructing to reset the operation of the driving means. By issuing, based on the predetermined transfer protocol command, to solve the problems described above.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a schematic configuration example of an information transfer system according to an embodiment to which the present invention is applied. In this embodiment, the ATAPI drive 2 using a cartridge cassette with a memory-in cassette 31 will be described in detail by taking an AIT tape drive as an example of the ATAPI drive 2.

In FIG. 1, a data controller 1
Is a buffer memory 11 and the data controller 1
ATA / ATAPI drive interface (I / F) unit 12 used when transferring data for self-running data, and ATA / ATAP used when accessing from host CPU 4
The I drive interface unit 13, the switching terminal B corresponding to the route (path) in the self-running data transfer mode of the data controller 1, and the switching terminal B corresponding to the route (path) in the control mode (CPU control mode) of the host CPU 4. Route changeover switch 1 for selectively switching between changeover terminal A
4, a route switch control register 15 for switching the route by the route changeover switch 14, an abort (ABORT) register 16 for executing / stopping the data transfer setting in the self-running data transfer mode of the data controller 1, And a reset circuit 17 for globally resetting the information transfer system of FIG.

An ATAPI drive 2, which is a drive conforming to the ATAPI standard, has an ATA / ATAPI interface unit 2 conforming to the ATA / ATAPI standard.
1 and drive firmware, and the AT
A drive control unit 22 for controlling the system of the API drive 2, a loading unit 26 into which the cartridge cassette 3 is loaded, for example, and a function of detecting that the MIC 31 is built in the cartridge cassette loaded into the loading unit 26 MIC detecting unit 23 having a function of reading information from MIC 31 and MIC 31
A MIC writing unit 24 for writing information (updating information) to a medium, and a media writing unit for actually writing and reading data to and from a medium 32 built in the cartridge cassette 3 or the like loaded in the loading unit 26. Including /
A read drive unit 27.

The MIC detecting unit 23 and the MIC writing unit 2
Examples of the information transmission means used in the fourth example include a contact information transmission means using a metal terminal or the like, and a non-contact information transmission means using a wireless communication means housed in an optical memory or a small IC package, for example. , The MIC detection unit 23 and the MIC writing unit 24 communicate with the MIC 31 via the contact-type information transmission unit or the non-contact-type information transmission unit.
Reads information and writes for information update between them.

In the example of the information transfer system shown in FIG. 1, the data transferred between the data controller 1 and the ATAPI drive 2 can be temporarily stored in a hard disk drive (HDD) 7.

The cartridge cassette 3 loaded into the loading section 26 of the ATAPI drive 2 has an MIC 31 as the auxiliary storage means and a medium 32 as a recording medium built in a cartridge type cassette. is there. Here, the medium 32
Media type is one of ATA commands, AT
API Identify Packet Device (IDENTIFY
PACKET DEVICE) command (A1h: h represents hexadecimal notation) is described in the execution response data. That is, the code of the media type is included as a description in word 0 in the 256-word data obtained as the response data. More specifically, the upper byte in the word 0 determines whether the medium 32 is an ATAPI device having a storage medium, and furthermore, when the most significant bit of the lower byte is 1, the medium 32 Is a removable device that can be stored in the cartridge cassette. At present, when the value of the upper byte in the word 0 is 80h, the medium 32 is an ATAPI device storage medium of a direct access drive, and when the value is 84h, it is a write-once ATAPI device storage medium. 87h represents an ATAPI device storage medium of an optical memory, 88h represents an ATAPI device storage medium of a medium changer device, and 8Ch represents an ATAPI device storage medium of an array controller device. Have been. That is, whether or not the medium 32 is a storage device is determined based on the upper byte of the word 0, and when the uppermost bit of the lower byte is identified as 1 (= 1), the medium 32 is inserted into the cartridge cassette. 3 is determined to be a storage medium for the ATAPI device stored in the storage medium 3.

The data format inside the MIC 31 is, for example, AIT of SCSI interface.
It conforms to the MIC format for drives.

The cartridge cassette which can be loaded into the loading section 26 of the ATAPI drive 2 includes a cartridge cassette 8 having no MIC 31 and a tape cartridge cassette 9 having a tape medium 33 such as a magnetic tape as a medium. There is also a disc changer cartridge cassette 10 having a plurality of disc media 34 as media and a disc changer that can be used while exchanging the plurality of disc media 34.

The host CPU 4 shown in FIG. 1 controls the operation of the entire information transfer system according to the present embodiment. That is, by controlling the data controller 1, for example, the host CPU 4 moves the access route in the data controller 1 through the ATAPI drive 2 and the external system block (not shown) via the terminal 18 in a self-propelled manner. Control is performed in the data transfer mode, or in the CPU control mode in which the host CPU 4 directly accesses the ATAPI drive 2 and performs data transfer and the like.

In the memory 5 of FIG. 1, data writing / reading and its write / read address are controlled by the host CPU 4. For example, in the CPU control mode, when the host CPU 4 controls to retrieve information stored in the MIC 31 of the cartridge cassette loaded in the ATAPI drive 2 via the data controller 1, the memory 5 has the MIC 31
The data (MIC data) read from is stored,
The memory 5 is operated by the host CPU 4 and
For example, it is also used when preparing and preparing data in the MIC format for writing to the MIC 31.

The CPU bus 6 includes an address bus 61, a control bus 62, and a data bus 63. Host C
The PU 4 uses the CPU bus 6 to store data in the memory 5, retrieve data from the memory 5, control the data controller 1, and directly control the ATAPI drive 2 via the data controller 1. It has become possible.

Next, the operation of the main part of the data controller 1 of the information transfer system having the above configuration will be described.

The common bus terminal for the ATAPI drive of the route changeover switch 14 is connected to the ATAPI drive via a cable.
The switching terminal B is connected to the ATA / ATAPI interface unit 21 of the drive 2, and is connected to the interface unit 1 used in the route in the self-running data transfer mode.
2 and the switching terminal A is connected to the interface unit 13 used in the route in the CPU control mode. Further, a register output signal of the root switch control register 15 is supplied to a switching control terminal of the root switch 14 as a switching signal. Therefore, the route changeover switch 14 selects either the changeover terminal A or the changeover terminal B according to the changeover signal.

In the root switch control register 15, a switching control code for selecting either the switching terminal A or B of the root switching switch 14 is written by the host CPU 4 (the switching control code is latched). And outputs the switching signal corresponding to. That is, for example, when the access route is set to the self-running data transfer mode of the data controller 1, the route switch control register 15
A switching control code for selecting the switching terminal B is written, whereby the root switching control register 15 outputs the root switching switch 14 to the switching terminal B.
A switching signal for switching to the side is output. On the other hand, the access route is directly
When the CPU control mode for accessing the API drive 2 is set, a switching control code for selecting the switching terminal A of the root switching switch 14 from the host CPU 4 is written in the root switch control register 15, whereby the root switch is written. The switch control register 15 outputs a switching signal for switching the route changeover switch 14 to the switching terminal A side.

As described above, when the root switch control register 15 switches the root switch 14 in response to the switching control code from the host CPU 4, switching of the access route is realized. That is, when the route changeover switch 14 is switched to the changeover terminal B side, a self-running data transfer mode route connecting the ATAPI drive 2, the interface unit 12, the buffer memory 11, and the terminal 18 is formed. When the switch 14 is switched to the switching terminal A,
A CPU control mode route connecting the ATAPI drive 2, the interface unit 13, and the host CPU 4 is formed.

The switching control code output from the host CPU 4 when the access route is set to the self-running data transfer mode is a code for invalidating the access from the host CPU 4 to the ATAPI drive 2. In the description, the code will be referred to as an “invalidation control code”. The switching control code output from the host CPU 4 when setting the access route to the CPU control mode is transmitted from the host CPU 4 to the ATAPI drive 2.
In the following description, this code is referred to as “switching effective value setting code”
I will call it.

Buffer memory 1 of data controller 1
Reference numeral 1 denotes a large-capacity memory that executes a so-called FIFO (First In First Out) operation in integer multiples of words.
ATA / forming the route of the self-running data transfer mode
It is provided between the ATAPI drive interface section 12 and the terminal 18. In other words, in the self-running data transfer mode, the buffer memory 11 stores data between the ATAPI drive 2 connected via the interface unit 12 and the route switch 14 and an external system block (not shown) via the terminal 18. It is provided as a transfer buffer. That is, the data controller 1 is provided with the buffer memory 11 because the data transfer between the ATAPI drive 2 and the data controller 1 is performed by a burst-like discontinuous transfer by repeatedly issuing and executing a command. On the other hand, data transfer between an external system block (not shown) and the data controller 1 via the terminal 18 is performed at an arbitrary start / end timing, and continuous data transfer is required during data transfer. More specifically, in the self-running data transfer mode, for example, the AT
When transferring data from the API drive 2 to an external system block, the buffer memory 11
The burst data from the API drive 2 is transferred to the external system block as continuous data at an arbitrary start / end timing. On the other hand, in the self-running data transfer mode, for example, when data from an external system block via the terminal 18 is transferred to the ATAPI drive 2, the buffer memory 11 stores any data from the external system block via the terminal 18. Is transferred to the ATAPI drive 2 as the burst data at the start and end timings. Thus, in the data controller 1 including the buffer memory 11, for example, data transfer of an AV stream composed of continuous audio and video data,
Data transfer such as a handshake transfer data stream with the encoder / decoder system block becomes possible.

Next, the operation of the main part of the ATAPI drive 2 conforming to the ATAPI standard of the information transfer system of the present embodiment will be described.

The interface unit 21 of the ATAPI drive 2 is an ATA / ATA that uses the ATAPI protocol for data transfer with the data controller 1.
An ATA / ATAPI interface conforming to the PI standard. The data controller 1 is connected via a cable (and the host CPU is connected via the data controller 1).
4).

The drive control unit 22 has various command block registers for the ATA device, and further has each control block register as necessary, and the ATA / ATAPI for the ATAPI drive 2.
Implements protocol operation. In the data register among these command block registers, for example, the host CPU 4 writes the main part data of the command description block (CDB) of the ATAPI command packet conforming to each operation code of the SCSI command, thereby controlling the drive. An ATAPI command description block (CDB) containing various control contents
Data can be imported.

The drive control unit 22 has an ATAPI
The system control of the drive 2 is performed. That is, the drive control unit 22 incorporates drive firmware for writing / reading data to / from a storage medium, and controls the operation of the medium write / read drive unit 27 based on the drive firmware. As a result, data is written / read to / from a cartridge cassette containing a storage medium suitable for the drive firmware.

The drive control unit 22 includes an MIC 31
When the MIC detection unit 23 detects that the cartridge cassette provided with
Upon receiving the detection signal from the MIC detection unit 23, the MIC detection unit 23 and the MIC detection unit 23 read information (MIC data) from the MIC 31 of the cartridge cassette or write (update) information to the MIC 31.
The operation of the writing unit 24 is controlled.

In this case, the drive control unit 22 receives the packet command data having the mode sense (MODE SENSE) operation code from the packet command data of the ATAPI protocol from the host CPU 4 via the ATA / ATAPI interface unit 21. When
The MIC bit is set to be valid as the data corresponding to the mode sense (MODE SENSE), and the host CPU 4 is informed that the MIC detection unit 23 is controlled to the MIC detection operation state. In this case, the MIC detector 23 sends the MIC 31
This is because the drive control unit 22 has already recognized that the MIC 31 exists in the cartridge cassette loaded in the loading unit 26 when receiving the detection signal indicating the presence of the MIC 31.

Further, when the MIC bit is set to valid, the drive control unit 22 selects a mode select (MODE SELECT) from the packet command data of the ATAPI protocol from the host CPU 4 via the ATA / ATAPI interface unit 21. The ATAPI drive 2 itself is readable and writable with respect to the MIC 31 (valid state) by data specified by a page code and a parameter code specified by packet command data having an operation code. I do. Then, when the operation code of the packet command data is a log sense (LOG SENSE) operation code, the drive control
By controlling the C detection unit 23, information (MIC data) is continuously output from the MIC 31, and the information is sent to the host CPU 4 via the ATA / ATAPI interface unit 21 as log sense response data. In addition, the drive control unit 22
ATA / AT when the opcode of the packet command data is a log select (LOG SELECT) opcode
The host CPU 4 via the API interface unit 21
MIC format update log data sent as log select log update data from
The MIC writing unit 24 is controlled to write the MIC 31 as update information.

Hereinafter, a flow of information transfer processing according to the ATAPI protocol in the information transfer system according to the embodiment of the present invention will be described with reference to FIG. In the following description, it is assumed that a protocol applied to the ATAPI standard may be used for a process not particularly specified.

First, when the power supply of the information transfer system of this embodiment is powered up, as step S1,
The host CPU 4 issues a predetermined software control function (SetDriveCpumod (1)) as a switching software instruction, and writes a switching effective value setting code in the root switch control register 15 inside the data controller 1. When the switching effective value setting code is written, the root switch control register 15 outputs a switching signal for causing the root switching switch 14 to select the switching terminal A side.
The host CPU 4 sends an AT via the interface unit 13
A route for the CPU control mode that allows direct access to the API drive 2 is formed. When the argument in the predetermined software control function (SetDriveCpumod ()) is 0, the route switch 14 is switched to the switching terminal B as the self-running data transfer mode of the data controller 1.

Next, the ATAPI drive 2 has the MIC3
When the cartridge cassette 3 provided with the “1” is loaded (loaded into the loading unit 26), the processing in step S2 corresponds to the ATAPI identification packet device command which is one of the ATA commands issued from the host CPU 4. And prepares to return response data indicating the function of the drive. The host CPU 4
Issued to the ATAPI drive 2 is an ATA command, and the ATA command code is A1h.

The host CPU 4 that has received the execution response data returned from the ATAPI drive 2 in response to the ATAPI identification packet device command
The medium 32 of the cartridge cassette loaded into the ATAPI drive 2 is determined by the upper byte in the word 0 included and described as the media type code in the 256 words obtained as the execution response data. It is determined whether the medium is a storage medium or not, and the most significant bit of the lower byte is 1 (=
If 1), it is confirmed that the medium 32 is a removable medium that can be stored in a cartridge cassette. At present, as described above, the word 0
Indicates that the medium 32 is an ATAPI device storage medium of a direct access drive, 84h indicates that it is a write-once ATAPI device storage medium, and 87h indicates that the medium is an optical memory. It can be determined that the storage medium is an ATAPI device storage medium of 88h, that it is an ATAPI device storage medium of a medium changer device at 88h, and that it is an ATAPI device storage medium of an array controller device at 8Ch. That is, the host CPU 4 determines whether or not the medium 32 is a storage device based on the upper byte of the word 0, and furthermore, when the uppermost bit of the lower byte is identified as 1 (= 1), 32 is a cartridge cassette 3
Is determined to be a storage medium for the ATAPI device stored in the.

Next, as a process of step S4, the host CPU 4 issues a mode sense command code as an operation code of the packet command data of the ATAPI protocol when a cartridge cassette containing the MIC 31 is loaded in the ATAPI drive 2. . When a cartridge cassette containing the MIC 31 is loaded, the drive control unit 22
A control signal is supplied to the C detection unit 23 to control the MIC detection unit 23 to the MIC detection operation state. Upon receiving the packet command, the drive control unit 22 sets the MI
When a detection signal indicating the presence of the MIC 31 is received from the C detection unit 23, mode sense response data in which the MIC bit indicating that is detected is returned to the host CPU 4 via the ATA / ATAPI interface unit 21.

Next, as a process of step S5, a step of initializing when the loaded cartridge cassette is not in the AIT mode will be described.
The host CPU 4 makes the AIT bit valid, and
AIT Cnfiguration Pa with C bit enabled (= 1)
A mode select command code is issued together with the ge (31h) page data as an operation code of the packet command data of the ATAPI protocol. Upon receiving the mode select command code as the operation code and the select data following the mode select command code, the drive control unit 22 of the ATAPI drive 2 converts the MIC detection unit 23 and the MIC writing unit 24
To enable (enable) the read and write (update) functions of the MIC 31 in the AIT mode. Subsequently, the host CPU 4 transmits the IDP (Initia
enable the tor defined partition (PSUM) bit
Medium Partiti with the artition Size Unit of Measured code set to 10b for AIT (b is a binary number)
A mode select command code is issued as an operation code of the ATAPI protocol packet command code data together with the on Parameter Page (11h) page data. Upon receiving the mode select command code (15h) as the operation code and the subsequent select data, the drive control unit 22 of the ATAPI drive 2 secures a partition including the user data area in the cartridge cassette and stores the partition information in the MIC 31. Secure. Thereby, in the ATAPI drive 2, the ATA / ATAPI interface 21
When receiving a log sense packet command and a log select packet command from the MIC 31, the information of the MIC 31 can be continuously taken and each function of writing (updating) can be realized.

Subsequently, as a process of step S6, the host CPU 4 performs a process of issuing a log sense packet command. In other words, the host CPU 4 sets the maximum number of parameters that the host buffer unit of 512 bytes or more can correspond to the byte count low and byte count high registers in the command block register provided in the drive control unit 22, the so-called task register. A code (specifically, for example, FFFFh for both, or the number of bytes of one cluster of the host-side file system) is set, and the A of the packet command belonging to the ATA command is set.
Write 0h. Then, the host CPU 4 reads the status register, or reads the status
e) After confirming that the writing setting has been completed normally by reading the status register, log sense packet command data is issued according to the ATAPI protocol. This is in accordance with the protocol described in the ATA / ATAPI standard.

Here, the log sense packet command is:
The operation code 4Dh is provided in the lower byte of word 0, and the upper byte is always LU in the ATAPI device.
The reservation is set to 00h with N = 0. Bit 7 and bit 6 of the lower byte of word 1
Is a page control (PC) bit and has a function of designating a read page type. Bits 5 to 0 are page codes and have a function of designating a read page. The first byte code of the readable page of the log page to be read from the upper byte of word 1 to the lower byte of word 3 indicates a normal setting value of 00h.
It is. Note that pages of all log page codes after the page code 00h are to be read when a read page is specified. The upper byte of word 5 is ATAP
I is a reserved byte and 00h is set. Since the log sense command belongs to a 10-byte command in the SCSI command, the ATAPI drive 2
When a byte packet command is supported, a padding byte is inserted into the sixth word to make an ATAPI packet command.

The read data length of the log sense command can be switched by setting the MIC bit valid when the mode select command of the host CPU 4 is issued in step S5. That is, the host CPU 4 executes step S7 as step S7.
5 based on the execution processing of the mode select packet data of the host CPU 4 by the host CPU 4 and the status confirmation result of the ATAPI drive 2 at that time, the validity / invalidity of the MIC function setting is determined.

In the determination processing in step S7, if the MIC function setting is not valid, for example, the processing in step S9 includes, for example, the correspondence information of a predetermined response log sense data length known in each tape drive or the like. Log page (page code is 00h, 18 bytes, 9
Word), tape capacity page (36 bytes (18 words) when page code is 31h and not in AIT mode)
1024 when the page code is 31h and in AIT mode
Bytes (512 words) are read in two steps of 512 bytes) at a predetermined number of words (10 bytes).

On the other hand, if the MIC function setting is valid, for example, the processing of step S8 is performed by setting the number of words of the log sense response data byte number (380 bytes), which is the data transfer length specified in the MIC format. (19
0 word) is set as a predetermined number of times, and set as the number of times of reading the log sense word data in the host CPU 4. For example,
In the MIC fixed length information page (page code is 3Dh), the cumulative system log (parameter code is 0015h) is acquired by 66 bytes (33 words), and the volume information (parameter code is 0016h) is acquired by 100 bytes (50h).
Word), and the MIC variable length information page (3Eh) also has a unique number of bytes of user data.
When the C bit is valid, the table list code of the number of data obtained by the MIC data access is set to selection enable, and the number of times of reading the log sense response data is selected from the table list code and set in the CPU control code.

Next, the host CPU 4 determines in step S10
Of the MIC 31 in the cartridge cassette 3
From the MIC data. In particular,
The drive control unit 22 of the ATAPI drive 2 has an MIC
By controlling the detection unit 23, the usage amount, access information, and user-defined information of the media 32 inside the cartridge cassette are extracted from the MIC 31 and returned to the host CPU 4 via the ATA / ATAPI interface unit 21 as log sense response data. The host CPU 4 checks the free memory capacity of the MIC 31 by setting the page code of the log sense command to 3Dh and the parameter code to 0003h. In this case, for example, 391 bytes of sense data including an 8-byte header is added to a word size adjustment byte by 1 byte (value is 0).
Import as 96 words.

Then, the host CPU 4 determines in step S1
As a process 1, a process of selecting data of the free space information portion of the MIC 31 from the read log sense data is performed. Since the read data is data in the MIC format format, the number of bytes of free capacity of the MIC 31 is obtained by a calculation of extracting the MIC data loaded on the memory of the MIC 31. Note that a plurality of data sets recorded in the user data area on the medium medium of the cartridge cassette are different program data and the like, and the cue index information data of the data sets is stored in the user volume note (Us
er Volume Note) The log sense data read when writing and reading data is used as follows. When reading the user volume node size (380 bytes), the page code is set to 3Eh and the parameter code is set to 0004h. When reading 380 bytes of the user volume note data subsequently, the log sense command ( The reading process is executed from the MIC 31 by setting the page code of 4Dh) to 3Eh and the parameter code to 0001h.

Next, the host CPU 4 proceeds to the processing in step S12. When the process proceeds to step S12, the host C
The PU 4 reads the user definition information from the log sense command packet received from the ATAPI drive 2 as the process of Step S13. Further, the host CPU 4
Creates new user-defined information in the MIC format as information for updating the information of the MIC 31 based on the read log sense response data as necessary in step S14.

Next, the host CPU 4 proceeds to step S15.
The processing of MI by the ATAPI packet command
Write information to C31. That is, the host CP
U4, based on the MIC data read from the MIC 31 and loaded into the memory 5, performs an addition operation on the used amount of the medium 32 in the additionally used cartridge cassette, and creates updated data in the MIC format. To process.

Next, the host CPU 4 proceeds to step S16.
As a process, a command code A0h is issued by a process according to the protocol described in the ATA / ATAPI standard similar to that described in the above-mentioned ATAPI protocol, and then a log select packet command of ATAPI packet command data is issued. I do.

Here, the log select packet command has the operation code 4Ch in the lower byte of word 0. In the upper byte, bits 7 to 5 are 0 since the logical unit number LUN is always one in the ATAPI, bits 4 to 2 are reserved 0, and the parameter code reset (PCR) bit 1 is not cleared. Therefore, the false designation 0, bit 0 is a bit indicating whether or not a nonvolatile memory exists in the ATAPI drive 2. Even if the MIC 31 exists, it is outside the drive, so each setting is set to 0. Done. Bits 7 and 6 of the lower byte of word 1 are page control (PC) bits and have a function of designating a target page type. Bits 5 to 0 are set to reserved 0 in the case of a log select command. The log select command is 1 in the SCSI command.
ATAPI drive 2 because it belongs to the 0 byte command
Corresponds to a 12-byte packet command, a padding byte is inserted into the sixth word to form an ATAPI packet command.

In step S15, MIC3
Although the write data to 1 has been created, the function of designating the write page in the case of updating the user volume note data is that the lower byte of the log select write data following the issue of the packet command is the MIC variable length information page 3E.
h is set, and then 0000h is entered in the parameter code column.
Is set. The upper byte of word 0 is reserved 00
h.

Next, the host CPU 4 proceeds to step S17.
In the processing of (1), the log select data created in step S5 of the calculation processing in the CPU is sent to the ATAPI drive 2 via the ATA / ATAPI interface unit 21.
A process for writing data to the MIC 31 of the cartridge cassette is performed. That is, the AT receiving this packet command
The drive control unit 22 of the API drive 2 controls the MIC writing unit 24 to cause the MIC 31 to write the updated usage amount of the medium 32 inside the cartridge cassette, the updated access information, or the updated user definition information. Here, the page code of the log sense command is 3Eh,
By setting the parameter code to 0003h, M
The free memory capacity of the IC 31 is updated and written. Here, for example, in the case of a single partition, 380-byte log select data including an 8-byte header is set to 1
Write as 90 words. ATAPI drive 2
Since the write function to the MIC 31 is set to be valid, when a log select packet command is issued to write the log select data, the update information is written to the MIC 31. In step S16, the MIC
As the preparation of the write data to the MIC 31, the log select write data in the case of updating the user volume note data has been created. By specifying the page code of 4Ch as 3Eh and the parameter code as 0001h, the user volume note data of the MIC 31 is updated and written.

Thereafter, when the data controller 1 executes data transfer in the self-running data transfer mode with the external system block as necessary, the host CPU 4 executes a predetermined software command as a switching software command in step S18. Software control function (SetD
riveSeqmod (1)), and writes the invalidation control code to the root switch control register 15 inside the data controller 1. When the invalidation control code is written, the root switch control register 15
4 outputs a switching signal to select the switching terminal B side.
A route in a free-running data transfer mode in which data transfer is performed between the API drive 2 and the external system block is formed. After the formation of the route, data transfer between the ATAPI drive 2 and the external system block is started.

The following is a reset operation for resetting the information transfer system of FIG. 1 in a state where the data controller 1 is operating and the cartridge cassette containing the MIC 31 is loaded in the ATAPI drive 2 by software. FIG. 3 shows a flowchart of the execution process.

Here, it is assumed that the operation mode of the information transfer system is the self-running data transfer mode by the data controller 1 at present. In the self-running data transfer mode, data is transferred between the internal medium 32 of the cartridge cassette and the data controller 1. At this time, the memory 5 on the CPU bus 6 includes
It is assumed that information (MIC data) previously read from the MIC 31 inside the cartridge cassette 3 by the host CPU 4 is stored. That is, the example of FIG. 3 shows a reset operation when the MIC data stored in the memory 5 is continuously used even after the execution of the software reset process of the system.

When the information transfer system is in the above-described state, first, the host CPU 4 performs a reset initial setting process of the data controller 1 as a process of step S21. That is, in this case, since the data controller 1 is in the free-running data transfer mode, the host CPU 4 sends the abort register 16 inside the data controller 1 to stop the execution of the free-running transfer mode of the data controller 1. Abort execution code to stop the execution of the data transfer setting of the tape medium. Then, the host CPU 4 performs an initial setting for setting each control pointer of the buffer memory 11 inside the data controller 1 to a predetermined point value.

Next, the host CPU 4 proceeds to step S22.
As a process, a route switching process is performed. That is, the host CPU 4 issues a predetermined software control function (SetDriveCpumod (1)) as a switching software instruction, and writes a switching effective value setting code in the root switch control register 15 inside the data controller 1. This allows
The root switch control register 15 outputs a switching signal that causes the root switch 14 to select the switching terminal A side, and switches the root switching switch 14 to the switching terminal A side to switch to the CPU control mode root. Become.

Subsequently, the host CPU 4 determines in step S2
As the process 3, a drive selection process is performed. At this time, the host CPU 4 writes the DEV bit of the ATAPI drive 2 corresponding to the drive 0 or the drive 1 in the ATA interface standard into the device select register by the ATA protocol. With this process,
ATAPI drive 2 will be selected.

Thereafter, the host CPU 4 proceeds to step S2
In the process 4, the ATAPI drive 2 is reset by issuing a device reset command belonging to the ATA command and a command code 08h. Note that the device reset command described above is called an ATAPI soft reset in the SFF8020 standard.
/ ATAPI-4 standard and later. Only the ATA / ATAPI interface unit 21 is reset here, and the setting values of the respective operation parameters inside the ATAPI drive 2 are stored as they are. Further, at this time, the MIC loaded on the memory 5 connected to the same bus as the host CPU 4 at the same time.
The data is held as it is, and the MIC data is continuously applied to the cartridge cassette which is still loaded in the ATAPI drive 2 after the reset processing in step S24 is completed.

The flowchart of FIG. 3 shows the flow of the software reset process. The process for resetting the hardware of the information transfer system of the present embodiment is shown in FIG.
The flow is as shown in FIG.

In the example shown in FIG.
Is operating, and MIC is added to ATAPI drive 2.
It is assumed that a cartridge cassette having the built-in 31 is loaded, and the operation mode of the information transfer system is a self-running data transfer mode by the data controller 1 at present. In the self-running data transfer mode, data is transferred between the internal medium 32 of the cartridge cassette and the data controller 1, and the memory 5 on the CPU bus 6 stores the cartridge It is assumed that the information (MIC data) read from the MIC 31 inside 3 is stored.

However, when the hardware reset is executed as in the example of FIG. 4, the MIC data stored in the memory 5 is discarded, and the cartridge cassette 3 loaded in the ATAPI drive 2 again. Read MIC data from MIC31 of
Load and use on top.

In FIG. 4, when the information transfer system is in the state described above, first, the host CPU
4 performs a reset initial setting process of the data controller 1 as the process of step S31. That is, since the data controller 1 in this case is in the free-running data transfer mode, the host CPU 4 sends the abort register 16 inside the data controller 1 to stop the execution of the free-running transfer mode of the data controller 1. The abort execution code is written and the execution of the data transfer setting of the tape medium is stopped. And the host CPU 4
Executes an initial setting for setting each control pointer of the buffer memory 11 inside the data controller 1 to a predetermined point value.

Next, the host CPU 4 determines in step S32
As a process, the drive hardware reset code (Drive Hardware Reset (Drv_RSR) is sent to the global reset register circuit 17 inside the data controller 1.
T = 0)) is written. As a result, a reset signal is issued to the reset signal line of the ATA / ATAPI cable. The ATAPI drive 2 receiving this executes a hardware reset.

Next, the host CPU 4 proceeds to step S33.
As a process, a route switching process is performed. That is, the host CPU 4 issues a predetermined software control function (SetDriveCpumod (1)) as a switching software instruction, and writes a switching effective value setting code in the root switch control register 15 inside the data controller 1. This allows
The root switch control register 15 outputs a switching signal that causes the root switch 14 to select the switching terminal A side, and switches the root switching switch 14 to the switching terminal A side to switch to the CPU control mode root. Become.

Subsequently, the host CPU 4 determines in step S3
As the process 4, a flash update process of the MIC data loaded in the memory 5 on the CPU bus 6 is executed. That is, the host CPU 4
The MIC data loaded and held in a format conforming to the data format is subjected to flash discard processing according to a hardware reset operation. This flash discarding process is performed, for example, by the host CPU 4 sending the MIC
This is realized by executing a process of overwriting 0 data in the data storage area.

Next, the host CPU 4 proceeds to step S35.
As a process, the mode sense response command data in which the MIC bit is valid (= 1) is read by issuing a mode sense packet command. It is reported to the host CPU 4 that the writing / reading function to the MIC 31 is set to be valid for the ATAPI drive 2,
The existence of the MIC 31 is recognized by the host CPU 4 again. At this time, the cartridge cassette 3 is set in the ATA
In the case of setting of the ATAPI drive 2 at a reset which has not been loaded and loaded into the PI drive 2, it is possible to skip the MIC presence / absence determination process by issuing the mode sense packet command.

Next, the host CPU 4 proceeds to step S36.
Log processing command code as ATAPI
Issued as an operation code of the packet command data of the protocol, the drive control unit 22 of the ATAPI drive 2 receiving the packet command transmits the MIC data of the medium 32 from the MIC 31 of the cartridge cassette 3 such as the usage amount of the medium 32, access information, and user-defined information. And read
It is provided to the host CPU 4 as log sense response data via the ATA / ATAPI interface unit 21. The host CPU 4 reloads the MIC data on the memory.

The ATAPI drive 2 is connected to the host CP
As response data returned in response to the log sense packet command from U4, one sector has 512 bytes, 25 bytes.
Since it is 6 words, word 0 of valid 171 words
391 bytes of data are arranged in this order, and the remaining fields may be 256-word sense data in units of one sector in which padding data of 0 is inserted. Similarly, since one sector is composed of 512 bytes and 256 words, write data is arranged up to 300 bytes sequentially from word 0 of valid 150-word data, and padding data 0 is placed in the remaining fields. The inserted sector data may be 256 watt units.

As another method different from that of FIG. 4, it is also possible to reset the hardware of the information transfer system according to the present embodiment by a flowchart as shown in FIG. 5, for example. In the flowchart of FIG. 5, FIG.
The same reference numerals as in FIG. 4 denote the same processes as in the flowchart in FIG. 4, and a description thereof will be omitted.

In FIG. 5, after execution of the data controller initialization processing in step S31, the host CPU
No. 4 performs a route switching process as the process of step S42. That is, the host CPU 4 sends a predetermined software control function (SetDriveCpum
od (1)), and writes the switching effective value setting code into the root switch control register 15 inside the data controller 1. As a result, the root switch control register 15
Outputs a switching signal for causing the route changeover switch 14 to select the changeover terminal A side.
4 is switched to the switching terminal A side and switched to the route of the CPU control mode.

Next, the host CPU 4 proceeds to step S43.
As a process, a drive hardware reset code (Drive Hardware Reset (Drv_RST = 0)) is written to the global reset circuit 17 inside the data controller 1. As a result, a reset signal is issued to the reset signal line of the ATA / ATAPI cable. The ATAPI drive 2 receiving this executes a hardware reset.

Next, the host CPU 4 proceeds to step S33.
As a process, the valid setting writing process is directly performed on the software reset bit (SRST: bit 2) of the control register of the ATA / ATAPI interface unit 21. This generates the same hard reset operation as the reset signal input for the ATAPI drive 2.

After the process in step S43, the process proceeds to the process in step S34 similar to FIG.

The information transfer method and apparatus of the present invention
MI according to the ATAPI protocol of the above-described embodiment
The present invention is not limited to the information transfer processing of the C data, and it goes without saying that various changes can be made without departing from the scope of the present invention.

As described above, the information transfer method and apparatus according to the present invention enable information stored in the MIC built in the cartridge cassette to be transferred by the ATAPI protocol. When an operation code is mounted on the packet command of MIC, when information is read from the MIC, first,
The log sense command is written as an operation code, and if the command byte length does not match, the byte length is issued as packet command data according to the ATAPI packet command by padding bytes. Then, at the time of the response, a predetermined number, for example, 380 bytes of data is read from the MIC, and a selection process of selecting memory free space information from a byte of a predetermined order of the read data is performed. In addition, when information is updated and written to the MIC, first, a log select command is written as an operation code, and a process of issuing the packet command data having a byte length adjusted by padding bytes is performed. Then, a process of writing the memory capacity information into the MIC is performed by calculating the data amount written in the current session and writing it as the second predetermined number of data amounts.

Here, referring to FIG. 6, a parallel bus in the ATAPI drive 2 is used in the case where data read-in of the programmed I / O (PIO) reading of the MIC data is performed from the drive to the host by the log sense command using the log sense command. An example of the above transfer protocol will be described.

First, the ATAPI drive 2 is selected. In the device selection process, the ATAPI drive 2
Set the device selection code in the device select register. Then, the drive control unit 22 of the ATAPI drive 2 executes the ATA / ATA
In the status register of the PI interface unit 21,
DRQ = 0 and BYS = 0 are set. Host CPU4
Reads this status register and confirms that BSY = 0 in the status code and DRQ = 0.

Next, each function parameter and command are set in each register of the ATA / ATAPI interface. The host writes and sets an overlap bit and a DMA bit in the feature register of the ATA / ATAPI interface unit 21. In the case of FIG.
No command overlap operation (= 0 clear) and no DMA transfer (= 0 clear) because of PIO transfer are set. The host then counts the maximum number of buffer bytes in one transfer of the host to the byte count high register,
Write the byte count low register as a continuous register. Then, the drive control unit 22 of the ATAPI drive 2 executes the ATA
DRQ = 0 and BSY = 0 are set in the status register of the / ATAPI interface unit 21. The host CPU 4 reads this status register or the Alternate status register holding the same read contents and reads the BSY in the status code.
= 0, DRQ = 0 is confirmed, and the process proceeds to the next process.

Subsequently, the host writes and sets a PACKET command (A0h), which is an ATA command, in the command register of the ATA / ATAPI interface unit 21. A on the ATA / ATAPI interface
Command description block (Command Discription Bloc) containing SCSI command opcodes for TAPI devices
This is to enable the use of a packet interface (k = CDB). Then, the drive control unit 22 of the ATAPI drive 2 executes the ATA
In the status register of the / ATAPI interface unit 21, BSY = 0 and DRQ = 1, and in the interrupt reason register, I / O = 0 (indicating that data is from the host to the device), C / D = 1 (The next data indicates CDB data.) Thereafter, the host CPU 4 reads this status register, clears BSY = 0 in the status code,
Check each bit of RQ = 1. Then, each bit of the interrupt reason register, I / O = 0 and C / D = 1 may be confirmed. Regarding the read confirmation operation of each bit of the interrupt reason register, when the BSY bit of the status register is cleared to 0, the bit setting is usually already determined as described above, so that it is obvious. It may be omitted.

Subsequently, the host transfers the ATAPI command description block shown in FIG. 7 to the drive through the ATAPI packet interface. Note that FIG.
7 shows a log sense packet command (Command Discription Block = CDB) in the case of ATAPI, and FIG. 7B shows log sense command response word data in the case of ATAPI.

ATA / ATAPI interface 2
1 in the command register, SC for ATAPI device
Command description block for ATAPI device including Command code of SI command
= CDB) is written into a word data register six times with the 12-byte packet data of 6 words. In the case of log sense, the lower byte of word 0 is operation code 4Dh, the page code of the lower byte of word 1 is 3Eh, and the parameter pointer specification from the upper byte of word 1 to the lower byte of word 4 is 0001h. When the allocation length expressed from the upper byte of word 4 to the lower byte of word 5 is 390 bytes (195 words) including the page header, 0186h byte in hexadecimal notation is inserted. Byte 9 of the byte is reserved 00h in the ATAPI.
Then, a 2-byte reserved byte of 1 word is appended to this, and the data register is written as a command description block (CDB) command for ATAPI of a 12-byte command of 6 words in total.

Next, the drive control unit 22 of the ATAPI drive 2 reports the transfer setting and the transfer data length to the host. After the ATAPI command description block (CDB) setting execution process, the drive control unit 22 of the ATAPI drive 2 executes the ATA / ATAPI interface unit 2
1 in the status register, BSY = 0, DRQ = 1,
Then, I / O = 1 (indicating that data is from the device to the host) in the interrupt reason register, C / D
= 0 (indicating that the next data is not CDB data). Then, it issues an interrupt request signal INTRQ to the host CPU 4. As a response operation, the host CPU 4 reads this status register, clears BSY = 0 in the status code, DRQ = 1,
Check each bit of.

Next, the host CPU 4 checks the transfer setting and the transfer data length. The host uses a byte count high register of the ATA / ATAPI interface unit 21,
The byte count low register is read and 390 bytes (19
A 5-hexadecimal number, 0186h bytes, is read as the transfer length. Subsequently, the interrupt reason register is read to confirm that I / O = 1 and C / D = 0.

Here, the host CPU 4 reads 390 bytes (including the header) of the log sense response data shown in FIG. The page code of the log sense data is 3Eh, the page length is 386 bytes after the parameter code, and the parameter code is the user volume note (User Volume No.
0001h as specified in te). DU bit, DS bit, T
The SD bit, the ETC bit, and the TMC bit are written. The next byte is a reserved byte, and the next two bytes are a hexadecimal number with a user data length of 390 bytes, 01
86h is entered. User volume note data, which is user data in the remaining 380 bytes and 195 words, is read.

When the predetermined number of bytes read processing is completed, the drive control unit 22 of the ATAPI drive 2
After setting BSY = 0 and DRQ = 0 in the status register of the ATA / ATAPI interface unit 21, it issues an interrupt request signal INTRQ to the host CPU 4. As this response operation, the host CPU 4 reads this status register and checks each bit of BSY = 0 clear and DRQ = 0 in the status code.

The above is the description of the reading operation of the user volume note data from the MIC by the log sense command using the ATAPI protocol.

The update operation by the log select command The write operation of the user volume note data to the MIC by the ATAPI protocol will be described. The host selects the drive from the drive by the log select command data opcode 4Ch of the ATAPI command block description block (CDB). There is (I / O = 0) in the data write direction to
Otherwise, the writing process is performed in the same manner as in the case of the reading by the log sense command described above.

In order to newly use the MIC in the cartridge cassette in the ATAPI drive,
At least the following flow processing is to be performed as preliminary processing.

First, in the log sense command packet,
The page 3Dh and the parameter code 0003h are designated to check the remaining free memory capacity of the MIC. In the log select command packet, page 3Eh,
A user volume note is created by designating the parameter code 0001h.

Then, in order to update the user volume note data, a log sense command packet
By specifying a fixed length page managed by the drive firmware of page 3Dh and the parameter code 0004h, the user volume note data size is acquired. Thereafter, as described above, the user can read the user volume note data by specifying the parameter code 0001h and the rewritable variable page of the page 3Eh by the log sense packet command. Then, the host CPU 4 modifies and modifies the data according to the MIC format by adding program information, index information, and the like on the work memory, and thereafter, by a log select packet command, a user-rewritable variable-length page of page 3Eh, The contents are updated by writing the user volume note data with 0001h specified.

A tape layout for a single partition will be described with reference to FIG. 8 as a format unique to the AIT drive.

A device area extends from the start point (BOM) of a physical medium to the start point (BOT) of a logical tape. The area from the BOM to the start point of the partition 0 is a system area. Subsequently, there is a partition 0. The user data read / write area occupying the top and most of the medium is the user data area. Subsequent to the end, there is an end of data (Endof Data) area. After that, the logical tape end point (EO
T) followed by the physical end of tape (EOM)
At the same time becomes a logical partition end point (EOP) in the case of a single partition.

The cartridge cassette in which the MIC described above is built is an ATAP obtained by the ATAPI protocol.
Among the device type candidates described in the packet device data obtained by the I-identify device, various storage media described as types such as storage devices, that is, magnetic tapes, CD-ROMs, optical devices, etc. It is built-in and is subjected to selection processing based on response information of an ATAPI identification device command.

Further, for example, DMA (Direct Memor) for automatically performing sequence control on an ATAPI device.
y Access) In the case of a system in which data sequence controller hardware having a circuit inside performs data transfer processing, when reading and writing data in the cassette memory by a log sense command and a log select command,
Under the control of the host CPU (Central Processing Unit), the access control process of the ATAPI device is switched to the data flow path, and the remaining capacity is calculated from the information in the cassette memory as a response to the command packet.

Alternatively, the MI cassette is loaded into the cartridge cassette loaded based on the validity of the information data bits in the memory in the cassette of the ATAPI drive acquired by issuing the mode select packet command.
By determining that the C is built in, and by specifying the data length of the parameter code obtained as a response to the log sense packet command that follows, the data length of the MIC acquisition information is switched. I have.

Furthermore, the present invention has mainly been described by taking an AIT type tape drive as an example. However, the present invention is not limited to this, and a media cartridge cassette with an MIC 31 of a removable medium which takes a long time to load / unload media, such as an optical disk cartridge cassette, The present invention can be similarly applied to an optical video disk magazine type cartridge cassette, a magnetic disk cartridge cassette and the like.

Further, as a protocol, ATAP
Although the PIO transfer protocol of the I-parallel bus has been described as an example, the application of the present invention is not limited to this case. The ATAPI bus protocol can be applied without departing from the spirit of the present invention.

That is, according to the information transfer method and apparatus of the present invention, the MIC function can be used while the ATAPI protocol is used as it is. Therefore, for example, a search or a position search of a plurality of disks by seeking a cartridge cassette is performed. It is possible to realize a function of quickly acquiring storage remaining amount information, content access information, and user-defined information without time loss due to a specified tape fast-forward / rewind.

[0106]

As is apparent from the above description, according to the information transfer method and apparatus of the present invention, the read enable for enabling the read function of the information stored in the auxiliary storage means to the drive means. A setting command is issued based on a predetermined transfer protocol, the information read from the information storage unit is held, and the operation of the driving unit is reset while maintaining the held information or after discarding the held information. Is issued based on a predetermined transfer protocol, the information in the auxiliary storage means provided on the recording medium can be transferred by a predetermined transfer protocol (for example, the ATAPI protocol). Operation can be reset.

[Brief description of the drawings]

FIG. 1 is a system configuration diagram showing a schematic configuration of an information transfer system according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating M by the information transfer system according to the embodiment of the present invention
5 is a flowchart showing the overall flow of reading / writing IC data.

FIG. 3 is a flowchart illustrating a flow of a software reset operation.

FIG. 4 is a flowchart illustrating an example of the flow of a hardware reset operation.

FIG. 5 is a flowchart illustrating another example of the flow of the hardware reset operation.

FIG. 6 shows a log sense command from drive to host M
FIG. 9 is a diagram used to explain an example of a transfer protocol on a parallel bus in an ATAPI drive when performing data lead-in for reading programmed I / O of IC data.

FIG. 7 is a diagram used for explaining a command description block of ATAPI.

FIG. 8 is a diagram used to explain a tape layout in the case of a single partition.

[Explanation of symbols]

1 data controller, 2 ATAPI drive,
3, 8, 9, 10 cartridge cassette, 4 CP
U, 5 memory, 6 CPU bus, 7 HDD,
11 buffer memory, 12 ATA / ATAPI interface in data transfer mode, 13 CP
ATA / ATAPI interface unit in U control mode, 14 route changeover switch, 15 route switch control register, 16 abort register, 17
Reset circuit, 18 connection terminal to external system block, 21 ATA / A of ATAPI drive
TAPI interface section, 22 drive control section, 23 MIC detection section, 24 MIC writing section,
26 loading unit, 27 media write / read drive unit, 31 MIC, 32 media, 33 tape media, 34 disk media

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] September 28, 1999 (1999.9.2)
8)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0052

[Correction method] Change

[Correction contents]

Then, the host CPU 4 determines in step S1
As a process 1, a process of selecting data of the free space information portion of the MIC 31 from the read log sense data is performed. Since the read data is data in the MIC format format, the number of bytes of free capacity of the MIC 31 is obtained by a calculation of extracting the MIC data loaded on the memory of the MIC 31. Note that a plurality of data sets recorded in the user data area on the medium medium of the cartridge cassette are different program data and the like, and the cue index information data of the data sets is stored in the user volume note (Us
er Volume Note) The log sense data read when writing and reading data is used as follows. When reading the user volume note size (380 bytes), the page code is set to 3Eh and the parameter code is set to 0004h. When reading 380 bytes of the user volume note data following this, the log sense command ( The reading process is executed from the MIC 31 by setting the page code of 4Dh) to 3Eh and the parameter code to 0001h.

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name]

[Correction method] Change

[Correction contents]

First, the ATAPI drive 2 is selected. In the device selection process, the ATAPI drive 2
Set the device selection code in the device select register. Then, the drive control unit 22 of the ATAPI drive 2 executes the ATA / ATA
In the status register of the PI interface unit 21,
DRQ = 0 and BSY = 0 are set. Host CPU4
Reads this status register and confirms that BSY = 0 in the status code and DRQ = 0.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0102

[Correction method] Change

[Correction contents]

Alternatively, the MIC is loaded into the cartridge cassette loaded based on the validity judgment of the information data bits in the memory in the cassette of the ATAPI drive obtained by issuing the mode sense packet command.
Is determined, and the data length of the MIC acquisition information is switched by specifying the data length of the parameter code obtained as a response to the subsequent log sense packet command. .

[Procedure amendment 4]

[Document name to be amended] Drawing

[Correction target item name] Fig. 1

[Correction method] Change

[Correction contents]

FIG.

 ──────────────────────────────────────────────────の Continued on the front page F term (reference) 5B025 AD00 AD04 AD05 AE00 5B065 BA05 CA13 CA15 ZA05 5B077 AA00 AA02 AA13 AA18 5D044 BC01 CC01 CC04 DE22 DE45 DE49 DE50 GK11 HL01 HL11 5K034 HH01 HH02 HH42

Claims (14)

[Claims] 1. An information transfer method for transferring write / read information to / from a recording medium arranged in a driving unit operating according to a predetermined transfer protocol and to an auxiliary storage unit provided in the recording medium, the method comprising: Issues a read enable setting command for enabling the function of reading information stored in the auxiliary storage means to the means based on the predetermined transfer protocol, and retains the information read from the information storage means. And a reset instruction command for instructing the drive unit to reset the operation of the drive unit based on the predetermined transfer protocol while maintaining the held information. . 2. The data transfer apparatus according to claim 1, wherein when the data transfer is being performed between the driving unit and an external device, the reset instruction command is issued after the data transfer is stopped. Information transfer method. 3. The predetermined transfer protocol is an ATAPI
The information transfer method according to claim 1, wherein the information transfer protocol is a protocol. 4. An information transfer method for transferring write / read information to / from a recording medium arranged in a driving means operating in accordance with a predetermined transfer protocol and to an auxiliary storage means provided in the recording medium. Issues a read enable setting command for enabling the function of reading information stored in the auxiliary storage means to the means based on the predetermined transfer protocol, and retains the information read from the information storage means. An information transfer method, wherein the held information is discarded, and a reset instruction command for instructing reset of the operation of the driving means is issued based on the predetermined transfer protocol. 5. The data transfer apparatus according to claim 4, wherein when the data transfer is being performed between the drive unit and the external device, the reset instruction command is issued after the data transfer is stopped. Information transfer method. 6. The predetermined transfer protocol is an ATAPI
The information transfer method according to claim 4, wherein the information transfer method is a protocol. 7. An information transfer apparatus for transferring recording / reading information to / from a recording medium provided in a driving means operating in accordance with a predetermined transfer protocol and to an auxiliary storage means provided in the recording medium, wherein the predetermined transfer is performed. Control means for controlling the operation of the driving means by issuing a command based on a protocol; and storage means used by the control means, wherein the control means stores the auxiliary storage for the driving means. Issuing a read enable setting command for enabling a read function of information stored in the means based on the predetermined transfer protocol, storing the information read from the information storage means in the storage means, The reset instruction command for instructing reset of the operation of the driving means while maintaining the information stored in the means is transmitted to the predetermined transfer program. An information transfer device for issuing based on a protocol. 8. The control means, when transferring data between the drive means and an external device, stop the data transfer, and after setting a path connecting the drive means and itself, 8. The information transfer device according to claim 7, wherein said reset instruction command is issued. 9. An execution suspending unit for suspending execution of data transfer between the driving unit and the external device, a data transfer path between the driving unit and the external device, and a connection between the driving unit and the control unit. And a data transfer control means having at least a switching means capable of switching the path according to the control from the control means, wherein the control means is provided between the driving means and an external device with respect to the execution suspending means. Issue an execution stop request command for requesting to stop execution of data transfer based on the predetermined transfer protocol, and after stopping the data transfer, control the switching means to connect the path to the driving means and the self side. Switching, and issuing the reset instruction command to the driving means via the data transfer control means after setting the path. Information transfer device of claim 8, wherein. 10. The predetermined transfer protocol is ATAP.
The information transfer device according to claim 7, wherein the information transfer device is an I protocol. 11. An information transfer apparatus for transferring write / read information to / from a storage medium provided in a drive unit operating in accordance with a predetermined transfer protocol and to an auxiliary storage unit provided in the storage medium, wherein: Control means for controlling the operation of the driving means by issuing a command based on the control means, and storage means used by the control means, wherein the control means is provided for the driving means with the auxiliary storage means Issues a read enable setting command for enabling the read function of the information stored in the storage means based on the predetermined transfer protocol, stores the information read from the information storage means in the storage means, Discards the information stored in the transfer means, and issues a reset instruction command for instructing reset of the operation of the driving means to the predetermined transfer program. An information transfer device for issuing based on a protocol. 12. The control means, when data transfer is being performed between the drive means and an external device, stop the data transfer and set a path connecting the drive means and itself, The information transfer device according to claim 11, wherein the reset instruction command is issued. 13. A reset unit for resetting data transfer on a signal line between the driving unit and an external device, a data transfer path between the driving unit and the external device, and a driving unit and a control unit. A data transfer control means having at least a switching means capable of switching a path between the control means and the control means, wherein the control means is provided between the drive means and an external device with respect to the reset means. A reset signal for resetting the data transfer on the signal line is sent out, and after the data transfer is stopped, the switching means is controlled to switch and set the path to a path connecting the driving means and the self, thereby setting the path. 13. The information transfer according to claim 12, wherein the reset instruction command is issued to the drive unit via the data transfer control unit later. Location. 14. The predetermined transfer protocol is ATAP.
The information transfer device according to claim 11, wherein the information transfer device is an I protocol.