JP2001060623A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To ensure dimensions of an aperture follow as designed, when an etching is performed on first and second insulating films, which are deposited in the order on a semiconductor substrate and respectively consist of different materials when forming the aperture. SOLUTION: A silicon oxide film (SiO2 film) 104 which substantially does not contain impurities and a BPSG film 105, which contains boron and phosphorus and is a silicon oxide film, are deposited in the order on a silicon substrate 101 and thereafter, a contact hole is formed in the films 105 and 104. After a polysilicon film 108 is deposited in the interior of the contact hole and on the film 105, etchback is conducted on the film 108 to form a contact plug 109 in the film 105. In this case, a recessed part is formed in the surface of the plug 109. The film 105 is selectively removed, using a vapor phase hydrofluoric acid to reduce the recessed part formed in the surface of the plug 109, and thereafter a wiring 110 is formed on the plug 109.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a contact plug or a buried wiring.

[0002]

2. Description of the Related Art In recent years, with miniaturization and high integration of semiconductor integrated circuits, low-resistance and high-reliability contact plugs have been widely demanded.

However, in order to form a contact plug, a conductive film is deposited over the entire surface of an insulating film including the inside of an opening, and then a portion of the conductive film exposed on the insulating film is formed. Must be removed by a chemical mechanical polishing method (CMP method) or an etch back, so that a step called a recess is formed on the surface of the obtained contact plug.

Therefore, Japanese Patent Application Laid-Open No. H11-168103 proposes a method for reducing a recess as described below.

A conventional example will be described below with reference to JP-A-11-168.
Regarding the method of manufacturing the semiconductor device shown in 103,
This will be described with reference to FIGS. 7A to 7C and FIGS. 8A to 8C.

First, as shown in FIG. 7A, after a field oxide film 11 is formed on the surface of a silicon substrate 10, an n ⁺ -type impurity diffusion layer 12 is formed.

Next, as shown in FIG. 7B, an interlayer insulating film 13 made of a silicon oxide film, a silicon nitride film 14, and a silicon oxide film 15 are sequentially formed on the field oxide film 11 and the impurity diffusion layer 12. After the deposition, a resist pattern 16 having an opening in a contact hole formation region is formed on the silicon oxide film 15.

Next, as shown in FIG. 7C, using the resist pattern 16 as a mask, the silicon oxide film 15, the silicon nitride film 14, and the interlayer insulating film 13 are sequentially subjected to dry etching to form contact holes. After the formation of the resist pattern 17, the resist pattern 16 is removed.

Next, as shown in FIG. 8A, over the entire surface of the silicon oxide film 15 including the inside of the contact hole 17, a laminated film of a lower titanium film and an upper titanium nitride film is formed. After depositing a base film 18
A tungsten film 19 is deposited thereon.

Next, as shown in FIG. 8B, the silicon oxide film 1
Etchback is performed using 5 as an etching stopper to form a contact plug 20 including a tungsten film 19A and a base film 18A remaining inside the contact hole 17. In this case, a recess is formed on the surface of the contact plug 20.

Next, as shown in FIG. 8C, the silicon oxide film 15 is removed by etch back. in this case,
The silicon nitride film 14 serves as an etching stopper when the silicon oxide film 15 is removed by etch back.

[0012] The above conventional method uses the contact plug 20.
Then, the silicon oxide film 15 serving as an etching stopper when the tungsten film 19 and the base film 18 are etched back is removed, so that the recess amount of the contact plug 20 is reduced.

[0013]

However, according to the above-mentioned conventional method, the etching selectivity between the silicon oxide film 15 and the silicon nitride film 14 is not so large. ,
Since the underlying silicon nitride film 14 is etched, there is a problem in the accuracy of controlling the recess amount.

In addition, since the silicon nitride film 14 having a higher relative dielectric constant than the silicon oxide film 15 remains on the interlayer insulating film 13, the electric capacity between wirings is increased, and signal delay is likely to occur. There's a problem.

In the process of forming the contact hole 17 by dry etching, the size shift of the contact hole 17 becomes large, so that an opening size as designed cannot be secured, or the resist pattern 16 disappears during the dry etching. There is a problem of getting lost. Hereinafter, this problem will be described in detail.

In the dry etching step for forming the contact hole 17, the contact hole 17 is formed.
Of the dimensional shift of the interlayer insulating film 13 and the silicon substrate 1
It is important to control the etching selectivity to 0 and to control the etching selectivity between the interlayer insulating film 13 and the resist pattern 16.

Therefore, generally, CHF ₃ , CH
With _{2 F 2, C 2 F 6} , C 4 F 8, C 5 F 8 or the like of carbon atoms in (C) and fluorine (F) laden etching gas, the dry etching while generating an appropriate polymer by plasma polymerization Are doing. That is, by etching while depositing the polymer on the silicon substrate 10 and the resist pattern 16 which are the bottom of the contact hole 17, the interlayer insulating film 13 (generally, a film mainly containing silicon oxide is used) is used. And silicon substrate 1
The selectivity with 0 (usually about 50) and the selectivity between the interlayer insulating film 13 and the resist pattern 16 (usually about 4) are improved. Thus, the etching rate of the silicon substrate 10 on which the polymer is deposited and the etching rate of the resist pattern 16 are reduced. Further, by depositing a polymer also on the wall surface of the contact hole 17, side etching in the interlayer insulating film 13 is suppressed, so that the opening size does not become larger than designed. In this case, since the silicon oxide film 15 contains oxygen, it is difficult for the polymer to be deposited on the silicon oxide film 15, but the silicon substrate 10 and the resist pattern 16 do not contain oxygen. Is easily deposited.

In the conventional method, the silicon nitride film 1 is formed to form the contact hole 17.
In etching the silicon nitride film 4, under normal dry etching conditions, the etching rate of the silicon nitride film 14 is low. Therefore, oxygen is added to the etching gas or the flow rate of oxygen is increased to reduce the amount of polymer generated. Therefore, the etching rate of the silicon nitride film 14 must be increased.

However, when oxygen is added to the etching gas or the flow rate of oxygen is increased, the amount of the polymer deposited on the wall surface of the contact hole 17 decreases, and the dimensional shift increases. There is a problem that it cannot be secured.

When oxygen is added to the etching gas or the flow rate of oxygen is increased, the resist pattern 16
Since the etching rate becomes high, the film thickness becomes thin, and the resist pattern 16 disappears during the subsequent etching of the interlayer insulating film 13, whereby the opening of the contact hole 17 in the interlayer insulating film 13 is removed. There is a problem that the peripheral region is etched.

These problems become more remarkable as the size of the contact holes becomes smaller as the miniaturization of semiconductor devices progresses. The reason is that as the size of the contact hole becomes smaller due to the so-called micro-loading effect, the dimension shift must be suppressed because the margin of the design dimension becomes smaller as the miniaturization of the semiconductor device progresses. This is because the etching rate of the interlayer insulating film in the hole decreases, and the selectivity between the interlayer insulating film and the resist pattern decreases.

In view of the above, the present invention provides a method for forming an opening by etching a first insulating film and a second insulating film, which are sequentially deposited on a semiconductor substrate and have different materials, to form an opening. It is an object of the present invention to ensure the opening size of the above.

[0023]

In order to achieve the above object, a first method of manufacturing a semiconductor device according to the present invention comprises the steps of: depositing a first insulating film on a semiconductor substrate; Depositing a second insulating film having a higher hygroscopicity than the first insulating film on the film, and selectively etching the second insulating film and the first insulating film to form a second insulating film; Forming an opening in the second insulating film and the first insulating film; depositing a conductive film on the second insulating film so as to fill the opening; Removing a portion exposed on the film to form a plug or a wiring made of a conductive film; and forming a second insulating film remaining on the first insulating film into a vapor phase fluoride. Selectively removing with hydrogen acid.

According to the first method for manufacturing a semiconductor device, the second insulating film contains a large amount of moisture because it has a higher hygroscopicity than the first insulating film, and thus remains on the first insulating film. In the step of selectively removing the second insulating film by using hydrofluoric acid in a gas phase, a large difference is obtained between the etching rate of the second insulating film and the etching rate of the first insulating film. As a result, a high etching selectivity can be obtained between the second insulating film and the first insulating film.

Therefore, there is no need to interpose a silicon nitride film serving as an etching stopper when removing the second insulating film between the first insulating film and the second insulating film.
It is not necessary to add oxygen to the etching gas in order to increase the etching rate for the silicon nitride film. For this reason, the amount of the polymer deposited on the wall surface of the opening increases, and the dimensional shift of the opening decreases, so that the opening can have the designed opening size.

In order to achieve the above object, a second method for manufacturing a semiconductor device according to the present invention comprises a step of depositing a first insulating film on a semiconductor substrate and a step of depositing a first insulating film on the first insulating film. Depositing a second insulating film having a higher hygroscopicity than the first insulating film, forming a resist pattern on the second insulating film, and using the resist pattern as a mask to form the second insulating film and the second insulating film. Etching the first insulating film to form openings in the second insulating film and the first insulating film; and removing the resist pattern and remaining on the first insulating film. Selectively removing the second insulating film with a gaseous hydrofluoric acid.

According to the second method for manufacturing a semiconductor device, the second insulating film has a higher moisture absorbing property than the first insulating film and therefore contains a large amount of water, so that the second insulating film remains on the first insulating film. In the step of selectively removing the second insulating film by using hydrofluoric acid in a gas phase, a large difference is obtained between the etching rate of the second insulating film and the etching rate of the first insulating film. As a result, a high etching selectivity can be obtained between the second insulating film and the first insulating film.

Therefore, when forming the openings in the second insulating film and the first insulating film, even if the resist pattern disappears, the already patterned second insulating film functions as a hard mask. Therefore, it is possible to secure the opening dimension as designed in the opening.

In the first or second method for manufacturing a semiconductor device, the opening is preferably a contact hole or a via hole.

In this way, even if the aspect ratio increases, a contact hole or a via hole having an opening dimension as designed can be formed.

In the first or second method for fabricating a semiconductor device, the first insulating film is a silicon oxide film containing substantially no impurities, and the second insulating film is formed of boron, phosphorus and fluorine as impurities. Is preferably a silicon oxide film containing at least one of the following.

With this configuration, the second insulating film can be made more hygroscopic than the first insulating film, so that the etching selectivity when etching with the hydrofluoric acid in the gas phase can be increased. In the step of forming openings in the second insulating film and the first insulating film, since there is no difference in etching rate between the second insulating film and the first insulating film,
Since the second insulating film and the first insulating film can be etched under the same conditions, it is possible to avoid a situation in which the size of the opening changes or the resist pattern disappears during the etching. In addition, since a silicon oxide film containing boron, phosphorus, or fluorine can be formed using existing equipment, new capital investment is not required, so that manufacturing cost can be reduced.

In the first or second method for manufacturing a semiconductor device, it is preferable that the first insulating film is a SiO ₂ film and the second insulating film is a BPSG film.

In this way, a high etching selectivity between the second insulating film and the first insulating film can be secured when etching with hydrofluoric acid in the gas phase, and the second In the step of forming an opening in the insulating film and the first insulating film, the second insulating film and the first insulating film can be etched under the same conditions.

[0035]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. 1 (a) to 1 (c) and 2 (a) to 2 (a). This will be described with reference to c).

First, as shown in FIG. 1A, a field oxide film 102 is formed on the surface of a silicon substrate 101, and then an n ⁺ -type impurity diffusion layer 103 is formed inside the field oxide film 102.

Next, as shown in FIG. 1B, a silicon oxide film (SiO ₂ film) substantially free of impurities as a first insulating film is formed on the field oxide film 102 and the impurity diffusion layer 103. ) 104 and BP as the second insulating film
SG film (silicon oxide film containing boron and phosphorus) 105
Are sequentially deposited, and a resist pattern 106 having an opening in a contact hole formation region is formed on the BPSG film 105.

Next, as shown in FIG. 1C, the BPSG film 105 and the silicon oxide film 104 are dry-etched using the resist pattern 106 as a mask to form a contact hole 107. Is removed. In this case, since both the BPSG film 105 and the silicon oxide film 104 are mainly composed of a silicon oxide film, they can be dry-etched under the same etching conditions and have substantially the same etching rate. However, the BPSG film 105 may have a higher etching rate depending on the concentrations of boron and phosphorus.

When dry etching is performed on a contact hole which is generally used, that is, when dry etching is performed using an etching gas containing C ₂ F ₆ , the etching gas is applied to the wall surface of the contact hole and the surface of the resist pattern. Since it has a characteristic of easily depositing a polymer, the silicon oxide film 104 and the BPSG film 105
The selection ratio with respect to the resist pattern 106 can be set high.
Therefore, it is possible to prevent the opening size of the contact hole 107 from becoming larger than the design value or the resist pattern 106 from being lost during the etching. Incidentally, instead of the etching gas containing C ₂ F ₆ ,
Other etching gas containing CHF ₃ , C ₄ F _8, C ₅ F _8, or the like and easily producing a polymer may be used.

Next, as shown in FIG. 2A, a polysilicon film 108 doped with phosphorus is deposited inside the contact hole 107 and on the BPSG film 105.

Next, as shown in FIG. 2B, the polysilicon film 108 is etched back using an etching gas containing Cl ₂ and HBr, so that a contact plug is formed in the contact hole 107. 109
To form By doing so, a recess is formed on the surface of the contact plug 109 by over-etching.

In this case, when the polysilicon film 108 is etched back, an etching gas containing Cl ₂ and HBr can have a high etching selectivity between the polysilicon film 108 and the BPSG film 105 (selectivity is 20%). As described above, the BPSG film 105 remains almost without being etched.

Instead of etching back the polysilicon film 108, a portion of the polysilicon film 108 existing on the BPSG film 105 may be removed by using a CMP method. However, a recess is formed on the surface of contact plug 109. The reason is that overpolishing must be performed in consideration of the polishing rate of the CMP and the variation in the thickness of the polysilicon film 108.

Next, as shown in FIG.
After the film 105 is selectively removed using gaseous hydrofluoric acid, a wiring 110 made of a tungsten silicide film (WSi film) is formed on the contact plug 109.

By the way, the hydrofluoric acid in the gas phase is BPS
A silicon oxide film having high moisture absorption and containing a large amount of moisture in the film like the G film 105 is etched well, but a silicon oxide film having a low moisture absorption and containing little moisture in the film is etched. Has the property of not etching much. Therefore, when the BPSG film 105 is removed using an etching gas composed of gaseous hydrofluoric acid, B
The etching selectivity between the PSG film 105 and the silicon oxide film 104 can be increased.

The gaseous hydrofluoric acid etches well a silicon oxide film which has a high hygroscopicity and contains a large amount of water, but has a low hygroscopicity and does not contain much water in the film. The reason why the silicon oxide film is not etched much will be described.

[0047] First, when the hydrofluoric acid in the gas phase is supplied onto the silicon oxide _{film, 2HF + H 2 O → H} 3 O + + HF 2 - ...... (1) (1) As shown in equation care The hydrogen fluoride (HF) in the phase reacts with the moisture (H ₂ O) in the silicon oxide film to generate active species (H ₃ O ⁺ , HF ₂ ⁻ ).

[0048] ^{_{SiO 2 + 2H 3 O + +}} 2HF 2 - → SiF 4 + 4H 2 O ...... (2) SiO 2 + H 3 O + + 3HF 2 - → SiF 6 2- + 3H 2 O ...... (3) active species are generated Then, the reaction of the formula (2) or the formula (3) occurs, and the silicon oxide film (SiO ₂ ) is decomposed.
Etching of the silicon oxide film proceeds. Therefore, when moisture is not contained in the silicon oxide film,
Since the reaction of the formula (1) does not occur, no active species is generated. Therefore, hydrofluoric acid in a gas phase cannot decompose a silicon oxide film containing no water.

According to the result of the experiment, the etching rate of the BPSG film 105 by the hydrofluoric acid in the gas phase is about 60 n.
m / sec, but with hydrofluoric acid in the gas phase,
Since the etching rate of the silicon oxide film 104 substantially containing no impurities was 0.3 nm / sec or less, the etching selectivity was 200 or more. Therefore, when the BPSG film 105 is selectively removed, the silicon oxide film 104 substantially containing no impurities is hardly etched.

When the relative intensities of the spectrum of the BPSG film and the SiO ₂ film at around 170 ° C. were compared by a thermal desorption spectroscopy, the amount of water desorbed from the BPSG film was found to be desorbed from the SiO ₂ film. It was about 13 times the amount of water. This also indicates that a high etching selectivity can be obtained between the BPSG film and the SiO ₂ film in the etching using gas phase hydrofluoric acid.

The hydrofluoric acid in the gas phase hardly etches the contact plug 109 made of the polysilicon film 108. Therefore, according to the first embodiment, the recess amount on the surface of the contact plug 109 is reduced by BPSG.
The thickness can be reduced by the thickness of the film 105. For example, when the recess amount of the contact plug 109 is 150 nm when the polysilicon film 108 is etched back, if the film thickness of the BPSG film 105 is set to 150 nm, it depends on the etching conditions and the over-etching rate. However, the final recess amount can be made almost 0 nm.

According to the first embodiment, the silicon oxide film 104 is used as the first insulating film, and the BPSG film 105 is used as the second insulating film. The etching rate of the silicon oxide film 104 is substantially equal to the etching rate of the BPSG film 105. Therefore, in the etching step for forming the contact hole 107,
It is possible to set an etching condition in which a relatively large amount of polymer is generated, and it is not necessary to change the etching condition on the way. Therefore, it is possible to secure the opening dimension as designed in the contact hole 107, and
The situation where the resist pattern 106 disappears during the etching can be avoided. Further, since the silicon nitride film is not used as an etching stopper, it is possible to avoid a situation where the silicon nitride film having a high relative dielectric constant increases the electric capacity between wirings and causes a signal delay.

As the gaseous hydrofluoric acid in the first embodiment, other chemicals such as acetic acid may be added to hydrofluoric acid. Any etching gas may be used.

As the second insulating film, instead of the BPSG film 105, a silicon oxide film containing a large amount of water, such as a silicon oxide film containing at least one of boron, phosphorus and fluorine. It may be. An existing facility can be used for the silicon oxide film containing at least one of boron, phosphorus, and fluorine, so that investment in a new facility is not required. Therefore, an increase in manufacturing cost can be suppressed.

As the first insulating film, instead of the silicon oxide film 104, a film having a small amount of water contained therein, for example, a silicon oxide film (TEOS film) using tetraethoxysilane as a source gas May be used, and as a deposition method, plasma enhanced chemical vapor deposition (CV) may be used.
D) method, normal pressure CVD method, low pressure CVD method, or the like may be used.

In the first embodiment, the polysilicon film 108 is used as the film for forming the contact plug 109. However, instead of this, another conductive film such as an aluminum film, a tungsten film or a copper film is used. May be used.
When a tungsten film is used, it is preferable to form a base film as shown in the conventional example, and when a copper film is used, it is preferable to form a base film for preventing copper diffusion.

Incidentally, the first embodiment can also be applied to a laminated contact and a laminated via. When a stacked contact or a laminated via is formed by a conventional method, the lower part of the contact hole and the upper part of the contact hole are misaligned due to misalignment of a mask in a lithography process, and the lower part and the upper part of the laminated contact or the laminated via are formed. The contact area with the contact may be reduced.

However, in the first embodiment, the BP
If the thickness of the SG film 105 is increased, the BPSG film 1
When 05 is removed, the contact plug 109 has a shape protruding from the surface of the silicon oxide film 104. Therefore, when an upper interlayer insulating film is deposited on the contact plug (lower portion of the stacked contact plug) 109 obtained in the first embodiment and the upper portion of the stacked contact plug is formed on the upper interlayer insulating film, a mask is formed. Even if a misalignment occurs, the upper portion of the stacked contact plug contacts both the upper surface and the side surface of the contact plug (the lower portion of the stacked contact plug) 109, so that a sufficient contact area can be ensured. Can be realized.

(Second Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a second embodiment of the present invention will be described with reference to FIG.
This will be described with reference to (a) to (c) and FIGS. 4 (a) to (c).

First, as shown in FIG. 3A, a silicon oxide film (SiO ₂ film) 202 substantially free of impurities as a first insulating film and a second insulating film After sequentially depositing a BPSG film 203 as a film, a resist pattern 204 having an opening in a buried wiring formation region is formed on the BPSG film 203.

Next, as shown in FIG. 3B, the BPSG film 203 and the silicon oxide film 202 are dry-etched using the resist pattern 204 as a mask to form wiring grooves 205, and then the resist pattern 204 is formed.
Is removed.

Next, as shown in FIG.
After a barrier layer 206 made of a tantalum nitride film is formed on the wall surface and bottom surface of the substrate 05 and the BPSG film 203, copper is deposited on the barrier layer 206 by plating, sputtering, or chemical vapor deposition (CVD). A film 207 is formed. Incidentally, the copper film 207 may be a copper film having a multilayer structure formed by combining the above-mentioned growth methods.

Next, as shown in FIG.
By the MP method, portions of the copper film 207 and the barrier layer 206 that are exposed on the BPSG film 203 are removed,
A buried wiring 208 including a copper film 207A and a barrier layer 206A is formed. By doing so, the copper film 207A
Since the barrier layer 206A is overpolished, a recess is formed on the surface of the embedded wiring 208.

Next, as shown in FIG.
The film 203 is selectively removed using hydrofluoric acid in a gas phase, so that the recess formed on the surface of the embedded wiring 208 is reduced.

Next, as shown in FIG. 4C, a silicon nitride film 209 for preventing copper diffusion and an interlayer insulating film 210 are formed over the entire surface of the silicon oxide film 202 including the buried wiring 208. Are sequentially deposited.

According to the second embodiment, after the buried wiring 208 is formed by the CMP method, the BPSG film 203 is selectively removed using gaseous hydrofluoric acid to form on the surface of the buried wiring 208. In order to reduce the recessed portion, the surface of the embedded wiring 208 can be flattened. Therefore, a fine pattern can be formed in a lithography process performed later.

Further, since the BPSG film 203 is removed by using gaseous hydrofluoric acid, the BPSG film 203 can be selectively removed, so that the recess formed on the surface of the buried wiring 208 can be removed accurately. can do.

As the gaseous hydrofluoric acid in the second embodiment, other chemicals such as acetic acid may be added to hydrofluoric acid. Any etching gas may be used.

As the second insulating film, instead of the BPSG film 203, a silicon oxide film containing a large amount of water, such as a silicon oxide film containing at least one of boron, phosphorus and fluorine. It may be.

As the first insulating film, instead of the silicon oxide film 202, a film having a small amount of water contained therein, for example, a silicon oxide film (TEOS film) using tetraethoxysilane as a source gas May be used, and a plasma CVD method, a normal pressure CVD method may be used as a deposition method.
Or a low pressure CVD method.

In place of the copper film 207, another conductive film such as an aluminum film or a tungsten film may be used. As the barrier layer 206, instead of tantalum nitride,
Another barrier film or a multilayer film such as titanium nitride may be used.

(Third Embodiment) Hereinafter, a method for manufacturing a semiconductor device according to a third embodiment of the present invention will be described with reference to FIG.
This will be described with reference to (a) to (c) and FIGS. 6 (a) to (c).

First, as shown in FIG. 5A, after forming a field oxide film 302 on the surface of a silicon substrate 301, an n ⁺ -type impurity diffusion layer 303 is formed inside the field oxide film 302. .

Next, as shown in FIG. 5B, a silicon oxide film (SiO ₂ film) substantially free of impurities as a first insulating film is formed on the field oxide film 302 and the impurity diffusion layer 303. ) 304 and BP as the second insulating film
After sequentially depositing the SG film 305, a resist pattern 306 having an opening in a contact hole formation region is formed on the BPSG film 305.

Next, as shown in FIG. 5C, a contact hole 307 is formed by performing dry etching on the BPSG film 305 and the silicon oxide film 304 using the resist pattern 306 as a mask. Is removed.

Next, as shown in FIG.
The film 305 is selectively removed using hydrofluoric acid in a gas phase.

Next, as shown in FIG. 6B, a polysilicon film 308 is deposited over the entire surface of the silicon oxide film 304 including the inside of the contact hole 307.

Next, as shown in FIG. 6C, the polysilicon film 308 is etched back to remove the portion of the polysilicon film 308 exposed on the silicon oxide film 304. After forming the contact plug 309 made of the polysilicon film 308, the wiring 310 made of the WSi film is formed on the contact plug 309.

When a fine contact hole 307 having a high aspect ratio is formed by etching, the etching rate for the silicon oxide film 304 is reduced inside the contact hole 307, so that it is necessary to perform etching for a long time. Therefore, the resist pattern 306 may disappear during the etching process. According to the conventional method, when the resist pattern 306 disappears, the silicon oxide film 304 is etched, and there is a problem that the shape of the contact hole, especially the shape of the upper part of the contact hole is disturbed.

However, as in the third embodiment, the distance between the silicon oxide film 304 and the resist pattern
If the PSG film 305 is interposed, the resist pattern 3
When 06 disappears, the BPSG film 305 serves as a hard mask, so that it is possible to avoid a situation in which the shape of the contact hole is disturbed.

Even if the BPSG film 305 is partially etched in the etching process,
Since 5 is removed after etching, there is no particular problem.

Further, BP is added using gaseous hydrofluoric acid.
When removing the SG film 305, as described above, the BP
Since the etching selectivity of the SG film 305 to the silicon oxide film 304 is 200 or more, the depth of the contact hole can be controlled with higher precision as compared with the conventional etching technique using a hard mask.

As the gaseous hydrofluoric acid in the third embodiment, other chemicals such as acetic acid may be added to hydrofluoric acid. Any etching gas may be used.

As the second insulating film, instead of the BPSG film 305, a silicon oxide film containing a large amount of water, such as a silicon oxide film containing at least one of boron, phosphorus and fluorine, is used. It may be.

In the third embodiment, the polysilicon film 308 is used as a film for forming the contact plug 309. However, instead of this, another conductive film such as an aluminum film, a tungsten film or a copper film is used. May be used.

As the first insulating film, instead of the silicon oxide film 304, a film having a small amount of water contained therein, for example, a silicon oxide film (TEOS film) using tetraethoxysilane as a source gas May be used, and a plasma CVD method, a normal pressure CVD method may be used as a deposition method.
Or a low pressure CVD method.

[0087]

According to the first method for manufacturing a semiconductor device,
Since it is not necessary to interpose a silicon nitride film serving as an etching stopper when removing the second insulating film between the first insulating film and the second insulating film, a dimensional shift of the opening can be reduced. In addition, it is possible to secure an opening dimension as designed in the opening.

According to the second method for manufacturing a semiconductor device, when forming openings in the second insulating film and the first insulating film,
Even if the resist pattern disappears, the already patterned second insulating film functions as a hard mask,
An opening dimension as designed can be secured in the opening.

[Brief description of the drawings]

FIGS. 1A to 1C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIGS. 2A to 2C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

FIGS. 3A to 3C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIGS. 4A to 4C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIGS. 5A to 5C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIGS. 6A to 6C are cross-sectional views illustrating steps of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

7A to 7C are cross-sectional views illustrating steps of a conventional method for manufacturing a semiconductor device.

FIGS. 8A to 8C are cross-sectional views illustrating steps of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 Reference Signs List 101 silicon substrate 102 field oxide film 103 impurity diffusion layer 104 silicon oxide film 105 BPSG film 106 resist pattern 107 contact hole 108 polysilicon film 109 contact plug 110 wiring 201 silicon substrate 202 silicon oxide film 203 BPSG film 204 resist pattern 205 wiring groove 206 Barrier layer 207 copper film 208 buried wiring 209 silicon nitride film 210 interlayer insulating film 301 silicon substrate 302 field oxide film 303 impurity diffusion layer 304 silicon oxide film 305 BPSG film 306 resist pattern 307 contact hole 308 polysilicon film 309 contact plug 310 wiring

 ──────────────────────────────────────────────────続 き Continuing from the front page F term (reference) AA10 DD16 FF01

Claims (5)

[Claims] A step of depositing a first insulating film on a semiconductor substrate; and a step of depositing a second insulating film having a higher hygroscopicity than the first insulating film on the first insulating film. A step of selectively etching the second insulating film and the first insulating film to form an opening in the second insulating film and the first insulating film; Depositing a conductive film on the insulating film so that the opening is filled; removing a portion of the conductive film exposed on the second insulating film; Forming a plug or a wiring, and selectively removing the second insulating film remaining on the first insulating film with gaseous hydrofluoric acid. A method for manufacturing a semiconductor device, comprising: 2. A step of depositing a first insulating film on a semiconductor substrate; and depositing a second insulating film having a higher hygroscopicity than the first insulating film on the first insulating film. Forming a resist pattern on the second insulating film; performing etching on the second insulating film and the first insulating film using the resist pattern as a mask; Forming an opening in the insulating film and the first insulating film; and, after removing the resist pattern, removing the second insulating film remaining on the first insulating film by gas-phase fluorine. Selectively removing with hydrofluoric acid. 3. The method according to claim 1, wherein the opening is a contact hole or a via hole. 4. The first insulating film is a silicon oxide film substantially free of impurities, and the second insulating film is
The method according to claim 1, wherein the silicon oxide film contains at least one of boron, phosphorus, and fluorine as an impurity. 5. The first insulating film is a SiO ₂ film,
3. The method according to claim 1, wherein the second insulating film is a BPSG film.