JP2001054016A - Serial signal transmitter and serial signal transmission method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a serial signal transmitter that can receive a serial signal of an HDTV system without the need for need for revising a reception circuit for receiving the serial signal of the HDTV system by dividing a valid video period into a plurality of areas and controlling a changeover circuit so as to insert a word level between the areas in a way that no consecutive same codes take place. SOLUTION: A level generating circuit 3 outputs a word level at which a serial signal produces no same specific codes. A changeover circuit 4 receives parallel video data with a valid video period in m-words, parallel video data with the valid video period in m-words that are delayed by k-words (k is an integer being one or over) by a k-word delay circuit 2 and an output of the level generating circuit 3. A control circuit 5 controls the changeover circuit 4. Controlling this changeover circuit 4 prevents a pattern of consecutive specific same codes from being longer than the serial signal of the HDTV system. Thus, the serial signal transmitter can receive the serial signal of the HDTV system.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a serial signal transmitting apparatus and a serial signal transmitting method for serial digital transmission of video signals of various formats used in a broadcasting station studio.

[0002]

2. Description of the Related Art SDTV (Std.) Transmission is performed in a serial digital format between various kinds of video equipment used in a broadcasting station studio and has 525 lines per video frame.
andardDefinition Television method is SMPTE (Soc
The SMPTE259M standard, which is a standard in the Society of Motion Picture and Television Engineers, has 1125 lines or 750 lines per video frame.
The HDTV (High Definition Television) method of this book is S
It has been standardized as the MPTE292M standard.

The operation of a conventional serial signal (serial digital interface) transmitter and receiver will be described with reference to the drawings. FIG. 2 shows a conventional SMPTE292M.
1 shows a block diagram of a standard serial digital interface (SDI) transmitter and receiver.

In FIG. 2, a transmitting device 9 comprises a formatter circuit 6, a parallel / serial converting circuit 7, and a scrambling circuit 8, and a receiving device 15 comprises a waveform equalizing circuit 10, a clock reproducing circuit 11, and a descrambling circuit 1.
2. It comprises a serial / parallel conversion circuit 13 and a deformatter circuit 14.

In the transmitting device 9, a 10-bit parallel digital format luminance (Y) signal and a multiplexed color (C) signal are input to the formatter circuit 6.
In the formatter circuit 6, the Y signal and the C signal are added to the horizontal and vertical timing reference signals EAV (En
d of Active Video) and SAV (Start of Active Vide)
o) is multiplexed. Also, the line number data and the error detection code are multiplexed with the Y signal and the C signal and output. The output of the formatter circuit 6 is a parallel / serial conversion circuit 7
And the parallel / serial conversion circuit 7
With the least significant bit (LSB) of the signal at the top, the signal is parallel / serial converted and output in the order of the C signal and the Y signal. The output of the parallel / serial conversion circuit 7 is input to a scramble circuit 8.

FIG. 3 is a block diagram of the scramble circuit 8. The scramble circuit 8 includes ten D-type flip-flops 80a and three exclusive ORs 80b, and is scrambled by a generator polynomial (X ⁹ + X ⁴ +1) (X + 1) and output.

The signal scrambled by the scramble circuit 8 is converted into a voltage according to the SMPTE292M standard and converted into a serial signal (serial digital interface).
Is output as

As described above, the serial digital interface (SDI) transmitter of the SMPTE292M standard serializes the parallel video data, scrambles and outputs it. The transmission speed is about 1.5 Gbps.

In the receiving device 15, the waveform equalizing circuit 10
Then, the scrambled serial signal is input from the transmission device 9. The waveform equalizing circuit 10 corrects the signal deterioration due to the coaxial cable used for the transmission line, and equalizes the waveform and outputs the result. In the clock recovery circuit 11, the waveform equalization circuit 1
In response to the output of 0, a clock component is extracted, a clock is reproduced, and serial data and a serial clock are output. In the descrambling circuit 12, the clock recovery circuit 1
1 to receive serial data and a serial clock, descramble and output. Serial / parallel conversion circuit 1
In 3, the descrambled serial data from the descrambling circuit 12 is received, serial / parallel converted, and parallel data is output. The deformatter circuit 14 receives the parallel data from the serial / parallel conversion circuit 13, converts the parallel data into video parallel data in the same format as when input to the transmission device 9, and outputs the video parallel data.

[0010] In the SMPTE 259M standard serial digital interface (SDI), the SMPTE
The same scrambling circuit as 292M is adopted,
The C signal is serialized in order from the LSB, scrambled, and output.

[0011]

However, SMP
In the transmission device of the serial digital interface (SDI) of the TE292M standard, a specific same code may be continuously generated in the serial data output depending on the word level of the parallel video data input to the transmission device. Such a serial digital interface (SDI)
For example, regarding the generation of the same code continuation in the transmitting device of the present invention, for example, “Pathological Check Code for Serial Digital Interface System (Patholog
ical Check Codes for Serial Digital Interface Syst
ems) ", SMPTE Journal, August 1992, 553-5
It is published on page 58.

A serial digital interface (SD
As a pattern generated by the transmitting apparatus of I) and having the same specific code continuously, as shown in FIG.
A pattern in which bits are 1 and 20 bits are 0, a pattern in which 1 bit is 1 and 19 bits are 0 as shown in FIG. 4B, and a pattern in which 1 bit is 0 and 19 bits are 1
There is a pattern. Such a pattern is called a pathological pattern, and may occur when the same scramble circuit as that of the serial digital interface (SDI) is used.

FIG. 4A shows a pattern in which 20 bits are 1 and 20 bits are 0, when the values shown in Table 1 are continuously generated in the parallel video data input by the transmitting apparatus. Can occur in output.

[0014]

[Table 1]

For example, if a1 in Table 1 is taken as an example, when 200h (h is a hexadecimal number) is continuously input to the C signal and 110h is input to the Y signal, the pattern of FIG. Can occur. In other words, in order for the pattern of FIG.
Must be continuously input.
In other words, when a different word is inserted even by one bit, the continuation of the same code on the serial signal stops.

On the other hand, the parallel video data contains 3FFh, 000h,
EAV and SAV timing reference signals including the word 000h are multiplexed. Therefore, when the SAV is input to the parallel video data, the continuation of the same code stops even if the pattern shown in FIG. 4 is continuously generated on the serial signal. Therefore, the maximum length of the continuous word shown in Table 1 is the effective video section from SAV to EAV.

There is also a possibility that this will occur in the horizontal blanking interval from EAV to SAV. However, auxiliary data packets are multiplexed in the horizontal blanking interval, and pedestal levels (Y signal is 0) except for auxiliary data packets.
40h, and the C signal is 200h). The maximum length of the data section of the auxiliary data packet is SMPTE29.
The 1M standard defines 255 words. Therefore,
In the horizontal blanking interval, the maximum number of consecutive words in which a pattern in which the same code continues in the serial signal may occur is 255 words, which is shorter than the effective video interval.

A pattern in which 1 bit is 1, 19 bits is 0, or 1 bit is 0 and 19 bits is 1 is a pattern in which the values shown in (Table 2) occur consecutively in the parallel video data input by the transmitting device. At the output of the transmission circuit. Similar to the pattern in which 20 bits are 1 and 20 bits are 0, 3FFh (h represents a hexadecimal number), 0
EAV and SA containing the words 00h, 000h
Since the V timing reference signal is multiplexed, the maximum length of the continuous word shown in (Table 2) is from SAV to EA
This is the effective video section up to V.

[0019]

[Table 2]

A serial digital interface (SD
In the receiving apparatus of I), a waveform equalizing circuit for correcting signal deterioration due to a coaxial cable used for a transmission path and a clock reproducing circuit for reproducing a serial clock from serial data are required. If the same code is continuously input to the receiver, the low-frequency component is cut off by the waveform equalization circuit, so that it becomes difficult to identify the digital values “0” and “1” after the waveform equalization. , An error may occur. Further, in the clock recovery circuit, an error may occur because the number of clock components to be extracted is reduced.

The effective video section per line of an HDTV signal having 1125 lines per frame is:
Each of the Y signal and the C signal has 1920 words, and the transmission speed of serial data is about 1.5 Gbps. Also,
For SDTV serial data, the effective video section per line is 720 words, and the transmission speed is HDT.
270 Mbps, which is lower than the V method. HDTV
In the case of transmitting one channel in each of the SDTV system and the SDTV system, a receiving circuit that operates correctly even when a signal having the same code continues as shown in FIG. 4 has already been realized.

On the other hand, an SDTV signal having a small data amount is
Multiple channels can be multiplexed and transmitted at about 1.5 Gbps, which is the transmission rate of HDTV serial data. However, when multiplexing a plurality of channels of the SDTV scheme, the effective video section (section from SAV to EAV) after the multiplexing may exceed the effective video section 1920 words of the HDTV scheme. Thus, a signal having more than 1920 words in the effective video section is transmitted at about 1.5 Gbps, which is the transmission rate of the HDTV system, and the same circuit as the waveform equalization circuit and the clock recovery circuit of the HDTV receiver is transmitted. When using and receiving,
When a serial signal of the HDTV system is received, even if correct operation is possible, an error occurs because the maximum length (that is, the effective video section) in which the same code is continuously generated becomes longer than that of the HDTV system. there's a possibility that.

Therefore, the present invention relates to a case where a signal whose number of words in the effective video section per line exceeds the number of words in the effective video section of the HDTV signal is transmitted at about 1.5 Gbps which is the serial transmission speed of the HDTV signal. , HD
It is an object of the present invention to realize a serial signal transmitting device and a serial signal transmitting method capable of receiving without changing a serial signal receiving circuit of a TV system. At the same time, HDTV
An object of the present invention is to realize a serial signal transmission device and a serial signal transmission method without changing a high-speed operation unit of a signal serial signal transmission device.

[0024]

In order to solve this problem, a serial signal transmitting apparatus and a serial signal transmitting method according to the present invention provide a level generating circuit for generating a word level in which a specific same code does not occur on a serial signal. And a k-word delay circuit for delaying the input parallel video data having an effective video section of m words (m is an integer of 1920 or more) by k words (k is an integer of 1 or more); , A switching circuit for switching data output from a k-word delay circuit and data output from a level generation circuit, and dividing an effective video section of m words of parallel video data into a plurality of areas of 1920 words or less. The switching circuit is controlled so as to insert a word level that does not generate k words of the same code continuity between areas of 1920 words or less. It is obtained by a control circuit.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a serial signal transmitting apparatus according to an embodiment of the present invention. In FIG. 1, 1 is a word insertion circuit, 2 is a k-word delay circuit, 3
Is a level generation circuit, 4 is a switching circuit, 5 is a control circuit, 6 is a formatter circuit, 7 is a parallel / serial conversion circuit, and 8 is a scramble circuit. Word insertion circuit 1
Comprises a k-word delay circuit 2, a level generation circuit 3, and a delay circuit 4.

The operation of the serial signal transmission device configured as described above will be described below.

The word insertion circuit 1 has m words (m is 1).
A parallel video signal having an effective video period of 920 or more is input. The input parallel video data having an effective video section of m words is converted into a k-word delay circuit 2.
Is input to the switching circuit 4.

The level generating circuit 3 outputs a word level at which a specific same code does not occur in the serial signal shown in FIG. Tables 1 and 2 show the word levels at which the pattern in which the specific same code shown in FIG. 4 continues may occur. As shown in (Table 1) and (Table 2),
When 10 bits (1024 levels) are defined as one word, and the values for two words are the values shown in (Table 1) and (Table 2), the same code may be the longest continuous on the serial data.

Taking a1 in (Table 1) as an example, 2
When the word of 00h and the word of 110h are repeatedly input to the Y signal, there is a possibility that a signal of 20 bits being 1 and 20 bits being 0 is generated on the serial data.
Similarly, if b2 in (Table 2) is taken as an example, 200
When the word 331h is repeatedly input to the word h and the Y signal, one bit is 1, 1 in the serial data.
There is a possibility that a signal in which 9 bits are 0, 1 bit is 0, and 19 bits are 1 is generated.

In other words, when a word other than a combination of the two words shown in (Table 1) and (Table 2) occurs in the C signal and the Y signal, the continuation of the same code on the serial signal stops. . As shown in (Table 1) and (Table 2), the level of one word at which the same code may be continuously generated is 2 in total by adding (Table 1) and (Table 2).
There are nine types. At the values other than the 29 word levels in which the same code may occur, the continuation of the same code is stopped.

In the effective video section, 000h, 0
01h, 002h, 003h, 3FCh, 3FDh, 3
Generating a total of eight levels (codes) of FEh and 3FFh is prohibited by the SMPTE292M standard. Therefore, if one word is inserted into the effective video section with 29 types of word levels at which a specific same code may be continuously generated on a serial signal and a word level other than the 8 types of prohibition codes, the serial data on the serial data can be obtained. It is possible to stop the continuation of the same code. Also, of the word levels other than the eight types of prohibition codes, the two levels shown in (Table 1) and (Table 2)
Even when two or more words other than the combination of words are inserted, the continuation of the same code on the serial data can be stopped.

Therefore, in the level generating circuit 3, a total of 29 kinds of word levels in which the same code may be continuous,
It is sufficient to generate and output a word level other than the total of eight levels, which is a prohibition code. For example, a word level of 040h, which is the pedestal level of the Y signal, may be generated.

In the switching circuit 4, the parallel video data having an effective video section of m words and the parallel video data having an effective video section of m words delayed by k words (k is an integer of 1 or more) by the k word delay circuit 2 are provided. Data and the output of the level generating circuit 3 are input.

In the control circuit 5, an effective video section of n words (n is 1920 words or less), a word level for stopping the same code continuation of k words output from the level generation circuit 3, and mn words (mn is The switching circuit 4 is controlled so as to be in the order of the effective video periods (an integer of 1920 or less). By controlling the switching circuit 4 in this manner, the HD
Effective video sections longer than the effective video section of the TV system will not be continuous.
It does not occur longer than in the case of HDTV serial signals. Therefore, it is possible to receive even with the serial signal receiving device of the HDTV system.

The output of the switching circuit 4 is input to the formatter circuit 6, and the EAV is added to the last word of the effective video section for serial transmission and the SAV is output prior to the effective video section.
V is added, and line number data and error detection data are multiplexed and output according to the SMPTE292M standard.

FIG. 5 is a timing chart of the present invention. (A) in FIG. 5 is parallel video data having an effective video section of m words. FIG. 5B shows the output of the formatter circuit 6 in FIG. In FIG. 5B, the word level for stopping the same code continuation is described as 040h. As shown in FIG. 5B, in the output of the formatter circuit 6, the section from SAV to EAV is (m
+ K) words.

The output of the formatter circuit 6 (the signal (b) in FIG. 5) is converted to serial data by using a parallel / serial conversion circuit 7 and a scramble circuit 8 which are the same circuits as those for transmitting the HDTV signal serial signal. Output at the same serial transmission speed.

The receiving apparatus can receive signals using the same circuit as the receiving apparatus of the HDTV system. In this case, the inverse processing of the word insertion circuit 1 may be performed at a subsequent stage of the receiving device (deformatter circuit) to convert the original signal.

In the above description, the apparatus has been described with a specific configuration. However, it is needless to say that the above processing can be realized by a method such as a program and executed by a computer or the like.

In the above description, the effective video section of m words is divided into two areas of 1920 words or less, and a word level at which a specific code is not continuously generated on a serial signal between the divided areas. Has been described, but the effective video section of m words is
It is also feasible to divide into two or more areas below a word, and insert a word level between the areas where a specific code does not occur continuously on the serial signal.

In the above description, the case where parallel video data having an effective video section longer than the word length of the effective video section of the HDTV system is transmitted at the transmission speed of the HDTV system has been described. However, the present invention is not limited to the case where the transmission is performed by using the transmission method, and the same can be realized when the transmission is performed at another transmission speed.

In the above description, the case where a coaxial cable is used for the transmission line has been described. However, the same can be realized when an optical fiber is used.

[0044]

As described above, according to the present invention, when the number of words in the effective video section per line exceeds the number of words in the effective video section of the HDTV signal, the signal is transmitted to the serial transmission speed of the HDTV signal. When transmitting at 1.5 Gbps, it is possible to realize a serial signal transmitting device and a transmitting method capable of receiving without changing the HDTV serial signal receiving device. At the same time, the serial signal transmission device and the transmission method can be realized without changing the high-speed operation section of the HDTV signal serial signal transmission device.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a serial signal transmission device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional serial signal transmitting device and a conventional receiving device.

FIG. 3 is a block diagram showing a configuration of a scramble circuit;

FIG. 4 is a waveform chart showing the same code continuous pattern of a serial signal.

FIG. 5 is a timing chart of the serial signal transmission device according to the embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 1 word insertion circuit 2 k word delay circuit 3 level generation circuit 4 switching circuit 5 control circuit 6 formatter circuit 7 parallel / serial conversion circuit 8 scramble circuit

Claims (4)

[Claims] 1. A method for transmitting parallel video data having an effective video section of m words (m is an integer of 1920 or more) longer than an effective video section of 1920 words specified by the SMPTE292M standard by serial transmission specified by the SMPTE292M standard. Speed 1.485 Gbps or 1.
485 / 1.001 Gbps serial transmission device for delaying input parallel video data having an effective video period of m words by k words (k is an integer of 1 or more)
A word delay circuit, a level generation circuit for generating a word level for stopping generation of a pathological pattern among word levels from 005h (h represents a hexadecimal number) to 3FBh, and an effective video of the input m words Parallel video data having a section, data output from the k-word delay circuit, a switching circuit for switching the output of the level generation circuit, and an effective video section of the parallel video data having an m-word effective video section, A control circuit for controlling the switching circuit so as to divide into a plurality of regions of 1920 words or less and to insert the output of the level generation circuit of k words between the regions divided into 1920 words or less. A serial signal transmitting device that converts an output of the switching circuit into a serial signal and outputs the serial signal. 2. Serial transmission of video data having an effective video section of m words (m is an integer of 1920 or more) longer than an effective video section of 1920 words specified by the SMPTE292M standard. Speed 1.485 Gbps or 1.
485 / 1.001 Gbps serial transmission, wherein the effective video section of m words of the parallel video data is divided into a plurality of areas of 1920 words or less.
Between each area divided into 0 words or less, a word level for stopping the generation of a pathological pattern among k word levels from 005h (h represents a hexadecimal number) to 3FBh is k words (k is an integer of 1 or more). ) A serial signal transmission method in which after insertion, the signal is converted to a serial signal and output. 3. The serial signal transmitting apparatus according to claim 1, wherein the word level for stopping the generation of the pathological pattern among the word levels from 005h to 3FBh is set to 040h. 4. The serial signal transmission method according to claim 2, wherein, of the word levels from 005h to 3FBh, the word level at which generation of the pathological pattern is stopped is set to 040h.