JP2001053717A - Receiver for communication using cdma transmission system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify the processing of data by setting correlation value data to data becoming a maximum value in the number of output bits when the number of bits on correlation value data between a digital signal from an analog/digital conversion circuit and an inverse diffusion code is judged to be larger than the prescribed number of bits. SOLUTION: A judgment means judges whether or not the number of bits on correlation value data is larger than the prescribed number of bits, which is smaller than the maximum number of bits on correlation value data decided by the number of sampling times on an analog/digital conversion circuit and the number of bits on a digital signal from the analog/digital conversion circuit. When the number of bits on correlation value data is judged to be not larger than the prescribed number of bits, an output means outputs correlation value data by the number of output bits, which is not more than the prescribed number of bits. When the judgment means judges that the number of bits on correlation value data is larger than the prescribed number of bits, correlation value data is set to be data becoming a maximum value in the number of output bits.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA (Code Diode) for performing multiple access using spread spectrum
The present invention relates to a communication receiver using a vision multiple access transmission system.

[0002]

2. Description of the Related Art FIG. 6 shows a schematic block diagram of a receiver in a CDMA transmission system using a wide band. In the receiver shown in this figure, a receiver (RX) 1 receives a spread modulation signal and outputs a baseband signal, and an automatic gain control circuit (AGC: Auto Gain Control) 2 linearly amplifies the baseband signal. The quadrature demodulator 3 quadrature demodulates the baseband signal linearly amplified by the automatic gain control circuit 2 into baseband signals I and Q.

An analog-to-digital converter (hereinafter, A / D)
Converter that) 4a outputs a digital signal I _D N-bit baseband signal I and digital conversion, A / D
Transducer 4b is a baseband signal Q by digital conversion to output a digital signal Q _D N-bit.

[0004] Here, as the sampling number of the A / D converters 4a and 4b, 2 ^M samplings are adopted in the symbol section, and the sampling of the A / D converters 4a and 4b is 1 to 4 in the chip section. Is done many times.

[0005] correlator 5a takes the correlation between the digital signal I _D and the despreading code and outputs the correlation value data S _I, correlator 5b takes the correlation between the digital signal Q _D despreading code The correlation value data _SQ is output. The demodulation unit 6
Demodulates the received data based on the correlation value data S _Q from the correlator 5b correlation value data S _I from the correlator 5a.

[0006]

In [0008] the above-described receiver, the maximum number of bits of the correlation value data S _I from the correlator 5a, the number of bits of the digital signal from the A / D converter 4a:
N and the number of samples: 2 ^M
M) bits.

Accordingly, as the number of output bits of the correlator 5a, in order to prevent overflow of the correlation value data S _I,
Since (N + M) bits are adopted and the demodulation unit 6 after the correlator 5a needs to process the correlation value data S _I having the maximum (N + M) bits, for example, there is a problem that the data processing amount increases. is there.

In view of the above, the present invention provides a receiver using CDMA transmission system communication that simplifies data processing after a correlator.

[0009]

According to the present invention, the number of effective bits of the correlation value data output from the correlator in consideration of the system specifications is usually equal to the sampling number of the analog-to-digital conversion circuit and the analog-to-digital conversion circuit. From the maximum number of bits of the correlation value data determined by the number of bits of the digital signal from.

That is, according to the first aspect of the present invention, an analog-to-digital conversion circuit for converting a baseband signal to a digital signal, and a correlation between the digital signal from the analog-to-digital conversion circuit and the despreading code. A correlator that outputs correlation value data, wherein the correlator is configured to output the number of samples of the analog-to-digital
First determining means (120) for determining whether or not the number of bits of the correlation value data is larger than a predetermined number of bits smaller than the maximum number of bits of the correlation value data determined by the number of bits of the digital signal from the digital conversion circuit (120) And output means (130) for outputting the correlation value data with an output bit number equal to or less than the predetermined number of bits when the first determination means determines that the number of bits of the correlation value data is not larger than the predetermined number of bits. , 140), and when the first determination unit determines that the number of bits of the correlation value data is larger than the predetermined number of bits, the data unit (151) sets the correlation value data as data having the maximum value in the number of output bits. , 15
2).

As described above, the number of bits of the correlation value data is
Since the number of output bits is smaller than the maximum number of bits of the correlation value data determined by the number of samples of the analog-to-digital converter and the number of bits of the digital signal from the analog-to-digital converter, data processing after the correlator is simplified. can do.

Here, when the number of bits of the correlation value data is larger than the predetermined number of bits, the data means keeps the accuracy of the received data because the correlation value data is the data having the maximum value in the number of output bits. can do.
By doing so, it is possible to prevent reception quality from deteriorating.

Further, according to the second aspect of the present invention, there is provided a second determining means (150) for determining whether the correlation value data is a positive value or a negative value, and the second determining means determines the correlation value. When it is determined that the data has a positive value, the data unit sets the correlation value data as data having a positive maximum value in the number of output bits, and determines that the correlation value data is a negative value by the second determination unit. When it is determined, the data unit may set the correlation value data to be data having a negative maximum value in the number of output bits.

The above-mentioned reference numerals in parentheses indicate the correspondence with specific means described in the embodiment described later.

[0015]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a first embodiment of the present invention. The communication receiver using the CDMA transmission method using the wide band according to the present embodiment has the same block configuration as the configuration shown in FIG. However, the correlator 5a (correlator 5b) of the present embodiment is
It has a smaller number of output bits than the number of output bits of the conventional correlator 5a (correlator 5b), and the demodulator 6 of the present embodiment demodulates received data according to this number of output bits.

Hereinafter, the processing of the correlator 5a of the present embodiment will be described with reference to the flowchart shown in FIG. However,
The correlator 5a of the present embodiment has a register X, a register Y, and a register Z.

First, the product of the digital signal _ID from the A / D converter 4a shown in FIG. 6 and the despreading code is obtained, and this product is sequentially added at each sampling timing of the A / D converter 4a to obtain a correlation value. for data S _I, and stores the correlation value data S _I in the register X (step 100). However, the register X stores the maximum number of bits of the correlation value data S _I : (M + N)
The correlation value data S _I has bits, and a negative value is indicated by a two's complement.

[0018] Here, the number of valid bits in the case of considering the correlation value data S _I a bit sequence, the communication system using the CDMA transmission method (system including mobile phones and base station), for example, FIG. 2 ( In the example of the register X shown in a), the LSB on the LSB side is changed from an arbitrary Q bit at most.
Is a bit.

Therefore, from the Q bit shown in FIG.
The “J” bit on the SB side and “J + L” shown in FIG.
The K bits on the LSB side excluding the bits can be omitted. However, the K-bit LSB side, regardless of the number of bits of the correlation value data S _I, can not be eliminated, processing is required as described below.

First, the absolute value of the correlation value data S _I (= TABS
(S _I )), and stores the absolute value in the register Y (step 110).
It is determined whether or not there is a bit in which “1” is set between the first and “J” bits (step 120).

Accordingly, it is determined whether or not the number of bits of the correlation value data S _I is larger than the number of (N + M−J) bits. However, the register Y has (M + N) bits.

[0022] Here, in step 120, when there is no bit to stand is "1" to "J" bit from the MSB in register Y {number of bits in the correlation value data S _I is (N + M-J) bit If it is smaller than or equal to｝, the process proceeds to step 130 as NO.

Subsequently, in step 130, the MSB data of the register X is stored in the MSB of the register Z, and the "Q" bit {MSB to "J + 1" bit} of the register X is shifted to the LSB side from the MSB of the register Z. The data obtained by cutting the “L” bit on the LSB side from the eye is stored,
It was stored in the register Z data and outputs it to demodulating section 6 as the correlation value data SA _I (step 140).

However, the register Z has an output bit number: (L + 1) bits smaller than the maximum bit number: (M + N) bits of the correlation value data S _I. The data of the MSB of register X and the register Y indicates the sign of the correlation value data S _I.

[0025] For example, in the example of register X shown in FIG. 2 (a), the register Y, as shown in FIG. 2 (b), the data is stored as the absolute value of the correlation value data S _I. In the register Y, "1" is set between the MSB and the "J" bit.
Since there is no is that bit set, the correlation value data S _I is a positive value (MSB of register X is "0"), FIG. 2
The data shown in (c) is output to the demodulation unit 6 as the correlation value data SA _I.

Further, in the example of register X shown in FIG. 3 (a), in the register Y, as shown in FIG. 3 (b), the data is stored as the absolute value of the correlation value data S _I. Since "J" until bit "1" no bit standing from MSB of the register Y, the correlation value data S _I is (the MSB of the register X "1") a negative value is, FIG. 3 (c the data shown in) to the demodulator 6 as the correlation value data SA _I.

In the examples shown in FIG. 2 and FIGS. 3A to 3C, "M + N" = 16, "L" = 8, and "J" = 4.

Next, at step 120, the number of bits {correlation values S _I when the register Y from the MSB is bit standing is "1" to "J" bit is (N + M-J) bit When it is larger than the number, the process proceeds to step 150 as YES.

Subsequently, at step 150, it is determined whether or not the MSB of the register X is "1". This makes it possible correlation values S _I to determine a positive value or a negative value.

Here, at step 150, the register X
When the MSB is “0” (correlation value data S_IIs a positive value
), The positive maximum value in the “L + 1” bit and
Is stored in the register Z,
Data obtained from the correlation value data SA _IOutput to the demodulation unit 6 as
(Step 140).

[0031] For example, in the example of register X shown in FIG. 4 (a), in the register Y, as shown in FIG. 4 (b), the data is stored as the absolute value of the correlation value data S _I. "1" from the MSB to "J" bit of register Y
Since the correlation value data S _I is a positive value (MSB of the register X is “0”),
The data shown in (c) is output to the demodulation unit 6 as the correlation value data SA _I.

Next, at step 150, M of the register X
When SB is "1" (when the correlation value data S _I is a negative value), "L + 1" to store the data as a negative maximum value in register Z at the bit, the correlation register Z stored data and outputs to the demodulator 6 as a value data SA _I (step 140).

[0033] For example, in the example of register X shown in FIG. 5 (a), in the register Y, as shown in FIG. 5 (b), the data is stored as the absolute value of the correlation value data S _I. Since the register Y have bits standing "1" to "J" bits from the MSB of a correlation value data S _I is negative (MSB of register X is "1"), Fig. 5 the data shown in (c) is output to the demodulation unit 6 as the correlation value data SA _I.

As described above, the maximum number of bits of the correlation value data SA _I (that is, the number of output bits of the correlator 5a) is “L +
The “L + 1” bits are correlation value data S _I determined by the number of samplings of the A / D conversion circuit 4a: 2 ^M and the number of bits of the digital signal from the A / D converter 4a: N. Is smaller than (N + M), so that data processing after the correlator 5a can be simplified.

As described above, since the maximum bit number (L + 1) of the correlation value data SA _I is smaller than the maximum bit number (N + M) of the correlation value data S _I , the correlator 5a and the following bits are used. Can be simplified.

Here, in determining the maximum bit number: (L + 1) of the correlation value data SA _I in the present embodiment,
As the values “J” and “L” necessary to determine the values, a number of values are set, simulations (or experiments) are performed, and values obtained when a desired bit error rate result is obtained are adopted. . Therefore, the maximum number of bits of the correlation value data SA _I : (L + 1) is equal to the maximum number of bits: (N +
M) Even if the number is smaller, desired accuracy of the received data can be obtained.

[Brief description of the drawings]

FIG. 1 is a flowchart showing the operation of a correlator according to an embodiment of the present invention.

FIGS. 2A to 2C are diagrams for explaining the operation of the correlator of FIG. 2;

FIGS. 3A to 3C are diagrams for explaining the operation of the correlator of FIG. 2;

FIGS. 4A to 4C are diagrams for explaining the operation of the correlator of FIG. 2;

FIGS. 5A to 5C are diagrams for explaining the operation of the correlator of FIG. 2;

FIG. 6 is a block diagram illustrating a configuration of a receiver for communication using the CDMA transmission method.

[Explanation of symbols]

 4a, 4b... A / D converters, 5a, 5b.

Claims (2)

[Claims] 1. A receiver for communication using a CDMA transmission method, comprising an analog-to-digital converter for converting a baseband signal into a digital signal.
A digital conversion circuit; and a correlator for correlating the digital signal from the analog-digital conversion circuit with the despreading code and outputting correlation value data, wherein the correlator performs sampling of the analog-digital conversion circuit. It is determined whether or not the number of bits of the correlation value data is larger than a predetermined number of bits smaller than the maximum number of bits of the correlation value data determined by the number and the number of bits of the digital signal from the analog-digital conversion circuit. A first determination unit (120) that determines that the number of bits of the correlation value data is not larger than the predetermined number of bits when the first determination unit determines that the correlation value data is equal to or less than the predetermined number of bits. Output means (130, 140) for outputting in the number of output bits; and the number of bits of the correlation value data determined by the first determination means. When it is determined to be greater than the predetermined number of bits,
Data means (151, 152) for setting the correlation value data to data having a maximum value in the number of output bits, the communication means using a CDMA transmission system. 2. The apparatus according to claim 1, further comprising a second determination unit configured to determine whether the correlation value data is a positive value or a negative value, wherein the correlation value data is a positive value by the second determination unit. When it is determined, the data means sets the correlation value data as data having a positive maximum value in the number of output bits, and the second determination means determines that the correlation value data is a negative value 2. The CDMA system according to claim 1, wherein the data unit sets the correlation value data as data having a negative maximum value in the number of output bits.
Receiver of communication using transmission method.