JP2001044402A - Solid-state image pickup element and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup element which has a superior display characteristic such that irregularities in color or sensitivity is prevented from generating, and a method of manufacturing thereof. SOLUTION: In this solid-state image pickup element, as shown in Fig. (a), a field oxide film 20 is formed only on a field part 4 and is removed from a pad part 5. Also, although an interlayer insulating film 21 is formed on the region between a gate part 3 and the field part 4, it is removed from the pad part 5. Accordingly, specifically for the pad part 5, that a thin gate oxide film, polysilicon 7 for a first layer, polysilicon 8 for a second layer, a pad electrode and a passivation film 11 are formed on a wafer 1. Moreover, in the gate part 3, as in a conventional method, a gate oxide film, an interlayer insulating film and a passivation film 11 are formed on the wafer 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device in which the thickness of a pad for forming a pad electrode is reduced, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In general, a solid-state imaging device (CCD) is shown in FIG.
As shown in FIG. 1A, a pixel portion (not shown) is formed in a rectangular formation region surrounded by a scribe line 2 of a substrate (wafer) 1.
And a register section (not shown), a gate section 3 serving as an active region, a field section 4 formed surrounding the gate section 3, and a pad section 5 formed with a pad electrode (not shown). It is formed.

In this solid-state image pickup device, as shown in FIG. 8A, which is a cross-sectional view taken along the line AA of FIG. Pad part 5
, A field oxide film 6 is formed on the substrate 1. On this field oxide film 6, a first polysilicon layer 7 and a second polysilicon layer 8 for forming a transfer electrode and the like in the active region are formed. The gate portion 3 to the field portion 4 covering the seventh and second polysilicon layers 8;
An interlayer insulating film 9 is formed over the pad portion 5.

The field part 4 is formed on the interlayer insulating film 9.
A pad electrode 10 made of Al is formed from to the pad portion 5, and a passivation film 11 is formed on the interlayer insulating film 9 so as to cover the pad electrode 10.
In the gate section 3, a color filter (not shown) and an on-chip lens (not shown) are formed on the passivation film 11 by a method using a resist, respectively, as described later.

[0005]

By the way, in such a solid-state image pickup device, the total thickness t of the gate portion 3 on the substrate 1 before the formation of the color filter and the on-chip lens is reduced. There is a large difference between the pad portion 5 and the total layer thickness t ′ on the substrate 1.

That is, in the gate portion 3, only a thin gate oxide film (not shown), an interlayer insulating film 9 and a passivation film 11 are formed on the substrate 1. A gate oxide film (not shown), a field oxide film 6, a first layer of polysilicon 7, a second layer of polysilicon 8, an interlayer insulating film 9, a pad electrode 10, and a passivation film 11 are formed. Therefore, the pad portion 5 has a thickness substantially equivalent to the total thickness of the field oxide film 6, the first-layer polysilicon 7, the second-layer polysilicon 8, and the pad electrode 10 as compared with the gate portion 3 ( The layer thickness is increased by t'-t).

However, since there is a large difference in the layer thickness between the gate portion 3 and the pad portion 5 and a large step between them, a portion near the pad portion 5 in the gate portion 3 is provided. In this case, the following inconvenience is caused by the influence of the step.

In the formation of a color filter, a technique of using a resist containing a dye and patterning the same for each pixel is adopted. In the formation of an on-chip lens, a resist made of an acrylic resin or a polypropylene resin is used. Again, a technique of patterning each pixel and then reflowing it is employed.

However, when a resist is applied when forming these color filters or on-chip lenses, for example, when forming a color filter, the applied resist 12 as shown in FIG. Affected,
A large thickness difference (x′−x) occurs in the gate portion 3. In other words, the resist thickness x ′ on the pad portion 5 side (field portion 4 side) in the gate portion 3 is much larger than the resist thickness x on the central portion side of the gate portion 3 due to the step formed under the resist 12. It will be.

Then, for example, in forming a color filter,
After the patterning of the resist 12, as shown in FIG. 8 (c), a difference occurs in the film thickness of the filter 13 made of the resist between the pixels, thereby causing variations in spectral sensitivity characteristics and causing color unevenness. Further, in the on-chip lens formation, the focal point also varies due to the variation in the height between the obtained lenses similarly to that shown in FIG. 8C due to the difference in the resist film thickness between the pixels. As a result, uneven sensitivity is caused. Further, although not shown, even when the window of the light receiving sensor section is opened in the gate section 3, a difference occurs in the thickness of the resist, so that the aperture of the light receiving sensor section varies, which also causes uneven sensitivity.

As a countermeasure for avoiding these inconveniences, it is conceivable to move the pad portion 5 away from the gate portion 3, but in that case, the theoretical yield is reduced and the cost is increased. In addition, it has been attempted to reduce unevenness by changing the resist coating sequence. However, with the recent miniaturization of chip size, the distance between the gate unit 3 and the pad unit 5 has been shortened. At present, it is often not possible to completely change.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a solid-state imaging device having excellent display characteristics in which occurrence of color unevenness and sensitivity unevenness is suppressed, and a method of manufacturing the same. It is in.

[0013]

Means for Solving the Problems Claim 1 of the present invention
In the solid-state imaging device described above, a pad electrode is formed on a pad section on a substrate without a field oxide film interposed therebetween.

According to a second aspect of the present invention, there is provided a solid-state imaging device in which a pad electrode is formed on a pad portion on a substrate without an interlayer insulating film interposed therebetween.

According to these solid-state imaging devices, the pad electrode is formed on the pad portion on the substrate without the field oxide film or the interlayer insulating film interposed therebetween. The difference between the layer thickness of the pad portion and the layer thickness of the gate portion is smaller than in the case where both are formed, so that the formation of a large step between the pad portion and the gate portion is suppressed.

According to the third aspect of the present invention, a field oxide film is formed on a substrate, and then the field oxide film is removed from the gate portion and the pad portion while leaving only the field portion. Then, a pad electrode is formed on the pad portion after the field oxide film has been removed as a means for solving the above problem.

According to this manufacturing method, the field oxide film formed on the substrate is removed from the gate portion and the pad portion while leaving only the field portion, so that the field oxide film is formed on the pad portion as in the prior art. As compared with the case where the pad portion and the gate portion have a smaller thickness, it is possible to suppress the formation of a large step between the pad portion and the gate portion.

According to a fourth aspect of the present invention, in the method for manufacturing a solid-state imaging device, a field oxide film is formed on the substrate, and then an interlayer insulating film is formed on the substrate so as to cover the field oxide film. In order to solve the above-described problem, it is possible to remove at least the interlayer insulating film of the pad portion while leaving the gate insulating film only in the gate portion and / or the field portion, and further to form a pad electrode in the pad portion after removing the interlayer insulating film. did.

According to this manufacturing method, the interlayer insulating film formed on the substrate over the field oxide film is removed only at least in the pad portion while leaving only the gate portion and / or the field portion. As compared with the case where an interlayer insulating film is also formed on the pad portion, the difference between the layer thickness of the pad portion and the layer thickness of the gate portion is reduced, and a large step is formed between the pad portion and the gate portion. Can be suppressed.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail.
FIGS. 1A to 1C are diagrams for explaining an embodiment of a solid-state imaging device according to the present invention. 1 (a) to 1 (c)
Are different from the conventional solid-state imaging device shown in FIGS. 8A to 8C in that the solid-state imaging device shown in FIGS.
In the solid-state imaging device shown in (c), the field oxide film and the interlayer insulating film are removed from the pad portion 5.

That is, in the solid-state image pickup device of this embodiment, FIG.
As shown in (a), the field oxide film 20 is formed only on the field portion 4 and is removed from the pad portion 5. Further, regarding the interlayer insulating film 21, the gate portion 3
, But is removed from the pad section 5. Therefore, especially in the pad portion 5, a thin gate oxide film (not shown) is formed on the substrate 1.
And first-layer polysilicon 7, second-layer polysilicon 8,
A pad electrode 10 and a passivation film 11 are formed. In the gate section 3, a gate oxide film (not shown), an interlayer insulating film 9, and a passivation film 11 are formed on the substrate 1 as in the conventional case.

Therefore, in the pad portion 5 of this solid-state imaging device, the field oxide film and the interlayer insulating film are removed from the substrate 1 as compared with the conventional device shown in FIG. There is no large difference between t ′ and the thickness t of the gate portion 3, so that no large step is formed. Therefore, as shown in FIG. 1B, when a resist 22 is applied thereon to form a color filter or an on-chip lens, the applied resist 22 does not form a large step on the base, so that the gate portion 3 The film thickness difference (x′−x) in the inside is also small.

Then, for example, in forming a color filter,
When the resist 22 is patterned to form the filter 23 as shown in FIG.
In this case, there is almost no difference in film thickness between pixels. Therefore, in the solid-state imaging device of the present example, it is possible to suppress the variation in the spectral sensitivity characteristics due to the difference in the film thickness of the filter 23 and to suppress the occurrence of color unevenness. Also, in the formation of the on-chip lens, the difference in the thickness of the resist between the pixels is also almost eliminated, so that the height variation between the lenses obtained is also almost eliminated, so that the focus variation is suppressed and the sensitivity unevenness is suppressed. Is done. Furthermore, even when the window of the light receiving sensor section is opened in the gate section 3, since there is almost no difference in the thickness of the resist, the aperture of the light receiving sensor section does not vary, and the sensitivity unevenness is suppressed.

Next, a method of manufacturing the solid-state imaging device having such a configuration will be described. First, as shown in (1) of FIG.
A field oxide film 2 is formed on a substrate 1 by a LOCOS method or the like.
0 is formed.

Next, as shown in FIG.
Resist pattern 2 having openings in gate region 3, part of field region 4, and pad region 5 respectively.
4 is formed. That is, as the resist pattern 24, a pattern in which the gate portion 3 and the pad portion 5 are opened as shown in FIG. 6A is used. (FIG. 6
In (a), the hatched portion indicates the resist pattern 24, and the white portion indicates the opening. )

Subsequently, using the resist pattern 24 as a mask, a part of the gate part 3 region, a part of the field part 4 region,
Then, the field oxide film 20 in the region of the pad portion 5 is etched to leave the field oxide film 20 only in a part of the region of the field portion 4 as shown in FIG. Thereafter, the resist pattern 24 is removed as shown in FIG.

Next, in order to form a transfer electrode or the like in the gate 3 region, a polysilicon film is formed on the entire surface of the substrate 1 as shown in FIG. A polysilicon layer 7 is formed. Next, as shown in FIG. 2 (6), a resist pattern 25 having a predetermined pattern (not shown) in the gate portion 3 region of the substrate 1 and opening a part of the field portion 4 is formed.

Subsequently, using the resist pattern 25 as a mask, the first layer of polysilicon 7 in a part of the gate part 3 and the part of the field part 4 is etched, and as shown in FIG. The first layer of polysilicon 7 is left in a part of the four regions and the pad portion 5 region, and is patterned into a predetermined shape in the gate portion 3 region. The polysilicon 7 formed in a part of the field part 4 region and the pad part 5 region is separated from the polysilicon (not shown) formed in the gate part 3 region and has an island-shaped isolated pattern. . Thereafter, the resist pattern 25 is removed as shown in FIG.

Next, similarly to the first layer of polysilicon 7, polysilicon is formed on the entire surface of the substrate 1 as shown in FIG. Then, a second layer of polysilicon 8 is formed while covering the field oxide film 20 and the first layer of polysilicon. Next, as shown in (10) of FIG. 3, a predetermined pattern (not shown) is provided in the gate portion 3 region of the substrate 1, and
A resist pattern 26 in which a part of the field part 4 is opened is formed.

Subsequently, using the resist pattern 26 as a mask, the second layer of polysilicon 8 in a part of the gate part 3 region and the part of the field part 4 is etched, and as shown in FIG. A second layer of polysilicon 8 is left in a part of the fourth region and a pad portion 5 region,
This is patterned into a predetermined shape in the gate portion 3 region. The polysilicon 8 formed in a part of the field portion 4 region and the pad portion 5 region is also separated from the polysilicon (not shown) formed in the gate portion 3 region in the form of an island like the polysilicon 7. It is an isolated pattern. Thereafter, the resist pattern 25 is removed as shown in FIG.

Next, as shown in FIG. 4 (13), an interlayer insulating film such as SiO ₂ is formed on the entire surface of the substrate 1 by covering the field oxide film 20, the first polysilicon layer 7, and the second polysilicon layer 8. A film 21 is formed. Next, as shown in FIG. 4 (14), a resist pattern 27 is formed in which a part of the field part 4 region and the pad part 5 region of the substrate 1 are opened. That is, as the resist pattern 27, a pattern in which a part of the field portion 4 and the pad portion 5 are opened as shown in FIG. 6B is used.
(In FIG. 6B, the hatched portion is the resist pattern 2
7 is shown, and the white part shows the opening part. )

Subsequently, using the resist pattern 27 as a mask, a part of the field portion 4 region and the pad portion 5 are formed.
The interlayer insulating film 21 in the region is etched, and (15) in FIG.
As shown in FIG. 7, the interlayer insulating film 21 is left only in the gate portion 3 region and a part of the field portion 4 region. Thereafter, (1) in FIG.
The resist pattern 24 is removed as shown in 6).

Next, as shown in FIG. 5F, an interlayer insulating film 21 and a second polysilicon 8 are formed on the entire surface of the substrate 1.
And a pad electrode layer 28 is formed.
Next, as shown in (18) of FIG. 5, a resist pattern 29 in which a part of the gate part 3 region and a part of the field part 4 region of the substrate 1 are opened is formed.

Subsequently, using the resist pattern 27 as a mask, a part of the field portion 4 region and the pad portion 5 are formed.
The interlayer insulating film 21 in the region is etched, and FIG.
As shown in (1), a pad electrode 30 is formed in a part of the gate part 3 region and a part of the field part 4 region. Thereafter, the resist pattern 24 is removed as shown in FIG. Next, as shown in (21) of FIG. 5, a passivation film 11 is formed on the entire surface of the substrate 1 so as to cover the interlayer insulating film 21, the second-layer polysilicon 8, and the pad electrode 10.

After the formation up to the passivation film 11 in this manner, a resist 12 is applied for forming a color filter and an on-chip lens as shown in FIG. 1B, and further as shown in FIG. 1C. This is patterned to obtain a solid-state imaging device having a color filter and an on-chip lens.

In such a manufacturing method, the field oxide film 20 formed on the substrate 1 is removed from the pad portion 5 while leaving only the field portion 4, and the interlayer insulating film 21 is removed from the gate portion. Since the interlayer insulating film 21 of the pad portion 5 is removed while leaving only the pad portion 5 and the field portion 4, the pad portion 5 has a smaller thickness than the conventional case where a field oxide film and an interlayer insulating film are also formed on the pad portion 5. The layer thickness can be made sufficiently thin, whereby the difference between the layer thickness of the pad section 5 and the layer section of the gate section 3 is reduced, and a large step is formed between the pad section 5 and the gate section 3. Can be suppressed.

Therefore, according to the method of manufacturing the solid-state imaging device of the present embodiment, it is possible to suppress the variation in the spectral sensitivity characteristic caused by the difference in the film thickness of the filter 23 and to suppress the occurrence of color unevenness. In forming on-chip lenses,
Almost no variation in height between the lenses, suppressing variations in the focal point, suppressing uneven sensitivity,
Further, even when the window of the light receiving sensor section is opened in the gate section 3, the variation in the opening of the light receiving sensor section can be eliminated, and the sensitivity unevenness can be suppressed.

Further, according to this manufacturing method, as compared with the conventional manufacturing method, a mask for etching the field oxide film 20 and a mask for etching the interlayer insulating film 21 are, for example, as shown in FIG. By simply replacing the mask for forming the resist pattern shown in (b), the manufacturing process itself can be performed without any change,
Therefore, an increase in production cost can be suppressed by eliminating a loss accompanying a process change. 1

In the above embodiment, both the field oxide film and the interlayer insulating film are removed from the pad portion 5. However, the present invention is not limited to this, and only one of them is removed. Alternatively, the other may be left in the pad section 5.

[0040]

As described above, the solid-state imaging device according to the present invention has a pad electrode formed on a pad portion on a substrate without a field oxide film or an interlayer insulating film interposed therebetween. As compared with the case where the field oxide film and the interlayer insulating film are both formed, the difference between the layer thickness of the pad portion and the layer portion of the gate portion is reduced, and a large step is formed between the pad portion and the gate portion. Is reduced.

Therefore, in this solid-state imaging device, since a large step is not formed between the pad portion and the gate portion, for example, when a color filter is formed by patterning a resist, There is almost no difference in film thickness between pixels. Therefore, it is possible to suppress the variation in the spectral sensitivity characteristics due to the difference in the film thickness of the color filters, and to suppress the occurrence of color unevenness.
Also, in forming an on-chip lens, the difference in the thickness of the resist between the pixels is almost eliminated, so that there is almost no height variation between the lenses. Therefore, the variation in the focal point is suppressed and the sensitivity unevenness is suppressed. can do. Further, even when the window of the light-receiving sensor section is opened in the gate section, there is almost no difference in the thickness of the resist, so that the variation in the opening of the light-receiving sensor section can be eliminated and the sensitivity unevenness can be suppressed.

Further, the method of manufacturing a solid-state imaging device according to the present invention is a method of manufacturing a solid-state imaging device having the above-described excellent effects by simply changing a mask for forming a resist pattern without greatly changing a conventional manufacturing process. And can be produced favorably.

[Brief description of the drawings]

FIGS. 1A and 1B are diagrams illustrating an embodiment of a solid-state imaging device according to the present invention, in which FIG. 1A is a cross-sectional view of a main part for explaining a basic configuration, and FIG. FIG. 4 is a cross-sectional view of a main part showing a state where the resist is applied, and FIG. 4C is a cross-sectional view of a main part showing a state where a resist is patterned from the state of FIG.

FIGS. 2 (1) to (6) are cross-sectional views of essential parts for explaining a method of manufacturing the solid-state imaging device in the state shown in FIG.

FIGS. 3 (7) to (11) are views for explaining a method of manufacturing the solid-state imaging device in the state shown in FIG. 1 (a);
FIG. 3 is an essential part cross-sectional view for sequentially explaining steps following (6) in FIG. 2.

FIGS. 4 (12) to (16) are views for explaining a method of manufacturing the solid-state imaging device in the state shown in FIG. 1 (a), and sequentially describe steps following (11) in FIG. FIG. 2 is a side sectional view of a main part for carrying out.

5 (17) to (21) are views for explaining a method of manufacturing the solid-state imaging device in the state shown in FIG. 1 (a), and sequentially describe steps subsequent to (16) in FIG. FIG. 2 is a side sectional view of a main part for carrying out.

6A is a plan view of a principal part showing a plan configuration of a resist pattern used for patterning a field oxide film, and FIG. 6B is a plan view of a resist pattern used for patterning an interlayer insulating film. It is a principal part top view shown.

FIG. 7A is a plan view of a main part showing an example of a solid-state imaging device formed on a wafer, and FIG. 7B is an enlarged view of a portion B of FIG.

FIG. 8 is a diagram illustrating an example of a conventional solid-state imaging device;
(A) is a sectional side view of a main part for explaining a basic configuration,
(B) is a cross-sectional view of a main part showing a state where a resist is applied from the state of (a), and (c) is a cross-sectional view of a main part showing a state where the resist is patterned from the state of (b).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate, 3 ... Gate part, 4 ... Field part, 5 ... Pad part, 20 ... Field oxide film, 21 ... Interlayer insulating film, 3
0 ... Pad electrode

Claims (4)

[Claims] 1. A solid-state imaging device, wherein a pad electrode is formed on a pad portion on a substrate without interposing a field oxide film. 2. A solid-state imaging device, wherein a pad electrode is formed on a pad portion on a substrate without interposing an interlayer insulating film. 3. A method for manufacturing a solid-state imaging device comprising a gate portion serving as an active region in which a pixel portion and a register portion are formed, a field portion in which a field oxide film is formed, and a pad portion in which a pad electrode is formed. Forming a field oxide film on the substrate, and then removing the field oxide film of the gate portion and the pad portion while leaving the field oxide film only in the field portion; and forming a pad portion on the pad portion after removing the field oxide film. A method for manufacturing a solid-state imaging device, comprising: forming an electrode. 4. A method for manufacturing a solid-state imaging device including a gate portion serving as an active region in which a pixel portion and a register portion are formed, a field portion in which a field oxide film is formed, and a pad portion in which a pad electrode is formed. Forming a field oxide film on the substrate; forming an interlayer insulating film on the substrate so as to cover the field oxide film; and thereafter, leaving at least the gate portion and / or the field portion to form at least the pad portion. A method for manufacturing a solid-state imaging device, comprising: a step of removing an interlayer insulating film; and a step of forming a pad electrode on a pad portion after removing the interlayer insulating film.