JP2001036088A - Method for manufacturing thin-film transistor and electrooptical device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To inexpensively form a fine pattern by nearly matching the extraction direction of a substrate being formed by extracting the molten glass of a thin- film transistor in a sheet shape to the scanning direction of a projection aligner. SOLUTION: A glass substrate that is formed by extracting molten glass from an arc-shaped slit in a sheet shape is used. 'Warpage' and 'undulation' are generated along the extraction direction of the glass substrate, and the difference in height along the extraction direction cannot be ignored as compared with the focus depth of a projection aligner. The difference in height in a direction that orthogonally crosses the extraction direction of the glass substrate is within the range of focus depth and hence can be ignored, so that the 'warpage' and 'undulation' in the same direction can be ignored. The extraction direction of the glass substrate, namely the direction where 'warpage' and 'undulation' are generated, is matched to the scanning direction of the projection aligner in a mirror projection type, and resist on the glass substrate is exposed to light while adjusting successive focusing along the scanning direction.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a thin film transistor (hereinafter, referred to as TFT).

[0002]

2. Description of the Related Art Flatness of a substrate in a photolithography technique has been conventionally discussed. For example, Japanese Patent Application Laid-Open No. Sho 60-17420 discloses a technique for manufacturing a liquid crystal display device or the like using a proximity exposure method in which a photomask and a substrate are brought into close contact with each other to perform exposure and pattern transfer. Here, a technique for improving the pattern accuracy by flattening the substrate by polishing or the like is disclosed.

[0003]

However, this method does not solve the problem of miniaturization with a mirror projection type exposure machine for the following reasons.
For example, in an active matrix liquid crystal device which is an example of an electro-optical device, a circuit region and a display region are formed on a glass substrate by processing a plurality of thin films by photolithography. Here, the circuit formed in the circuit area is a substitute for an external IC chip.
Since high performance is required, miniaturization of processing is required as much as possible.

In order to advance the miniaturization of a pattern formed on a glass substrate, the glass substrate needs to have high surface flatness. This is because when the resolving power of the exposure machine is increased, the depth of focus becomes smaller. Therefore, if "warp" or "undulation" is present in the glass substrate beyond the width of the depth of focus, a portion that is not in focus and a portion that is not focused are formed, and a pattern cannot be formed reliably.

The flatness of a sheet glass is represented by a deviation from an ideal plane. A macroscopic deviation is referred to as "warpage", a microscopic deviation is referred to as "undulation", and a microscopic deviation is referred to as "surface roughness". Distinguish. Here, the undulation is a surface irregularity having a cycle of about 1 mm or more, and usually has a cycle of about 5 to 20 mm.
Warpage is unevenness that appears about once or twice in the substrate.

As shown in FIG. 1, a glass substrate 4 formed by drawing molten glass out of a slit 400 into a sheet shape.
In No. 10, in an unpolished state, "warping" or "undulation" occurs along the drawing direction of the glass due to a change in the plate thickness depending on the drawing speed or temperature, and the surface flatness is lost. ing.

FIG. 4 shows a mirror projection type exposure machine. In a mirror projection type exposure machine, an arc-shaped slit on a mask (an irradiation part by a light source) is formed as an arc-shaped slit image on a substrate through a reflection optical system including a trapezoidal mirror, a concave mirror, and a convex mirror. An arcuate slit image on the substrate is scanned corresponding to the scan of the arcuate slit on the mask.
When performing exposure using the mirror projection type exposure apparatus shown in FIG. 4, since the scan is performed while exposing the area of the arc-shaped slits collectively, the above-described “warp” or “undulation” exists on the glass substrate. Then, a portion that is out of focus and a portion that is out of focus are generated within the range of the arcuate slit, and it is difficult to form a fine pattern. Specifically, a mirror projection exposure machine having a resolution of 2 μm or less has a depth of focus of 12 μm or less (the depth of focus is specified in a catalog or specification of the exposure device, and is also determined by a calculation formula described later. ), For example, low-temperature polysilicon TF
Conventionally, it has been difficult to realize the miniaturization of the 2 μm rule of T.

The prior art disclosed in Japanese Patent Application Laid-Open No. Sho 60-17420 for polishing and flattening a substrate cannot be directly applied to a mirror projection exposure method or a stepping exposure method currently used. There is a limit in increasing the flatness of the substrate, and it is particularly difficult to increase the flatness to a level at which the 2 μm rule can be miniaturized by the mirror projection exposure method. This is because, even if the flattening by polishing is possible, the cost is high, and the "habit" of the polishing jig remains on the surface in another form, which hinders the formation of a fine pattern.

The present invention has been made under the above-mentioned background, and a fine pattern can be formed by a mirror projection exposure method even if there is "warp" or "undulation" in the glass drawing direction of a glass substrate. In addition, it is an object of the present invention to provide a method for manufacturing a semiconductor device or a liquid crystal display device which can realize low cost.

[0010]

According to the present invention, there is provided a method of manufacturing a thin film transistor, comprising: forming a thin film transistor on a substrate; And the scanning direction of the exposure machine is substantially the same.

According to such a configuration of the present invention, the drawing direction of the glass substrate formed by drawing the molten glass into a sheet, that is, the direction in which "warping" or "undulation" occurs in the glass substrate, and the scanning direction , A focus margin can be ensured even if the depth of focus is small with miniaturization. In addition, a large glass substrate formed by drawing molten glass into a sheet from the slit,
Since it can be used in an unpolished state or a state in which it is easily polished, cost reduction can be realized.

The glass substrate formed by drawing the molten glass into a sheet may be a glass substrate formed by drawing the molten glass into a sheet from a slit, or a glass substrate formed by drawing the molten glass into a sheet by a float method. Substrates and the like can be mentioned.

In one aspect of the present invention, the exposure is performed while sequentially focusing along the scanning direction.

According to such a configuration, by performing exposure while sequentially focusing along the scan direction, focus is achieved even if the glass substrate has "warp" or "undulation" along the scan direction. And a fine pattern can be formed with uniform accuracy over the entire surface of the substrate.

In one embodiment of the present invention, the depth of focus is 12 μm.
(It may be described as ± 6 μm in the catalog specification.) It is characterized in that exposure is performed by a mirror projection type miniaturization exposure machine capable of miniaturization.

According to such a configuration, the TFT can be miniaturized, and the size and performance of the electro-optical device can be reduced.

In one embodiment of the present invention, a display region and a circuit region are formed on a glass substrate, and the thin film transistor formed in the display region and the peripheral drive circuit region is formed by a method according to any one of the above. Characterized by being formed by:

According to such a configuration, a high-performance thin film transistor which is miniaturized can be formed on a glass substrate.

An electro-optical device according to the present invention is characterized in that an electro-optical material is sandwiched between a first substrate and a second substrate on which a thin film transistor is formed by any one of the above-described manufacturing methods. I do.

According to such a configuration, a high-performance thin film transistor which is miniaturized can be formed in the electro-optical device, so that an electro-optical device having a high display capability can be realized.

In the present invention, the thin film transistor (TFT) can be a low-temperature polysilicon TFT. According to such a configuration, the low-temperature polysilicon TF
At T, the miniaturization of the 2 μm rule can be realized, and the size and performance of the liquid crystal device can be reduced.

According to the present invention, in particular, by miniaturizing the peripheral drive circuit, it is possible to realize a liquid crystal display device having a reduced size and lower power consumption, and a liquid crystal display device having an externally mounted IC chip. Peripheral drive circuits that are not inferior
They can be formed on the same glass substrate. Further, by miniaturizing the display area, a high-definition liquid crystal display device can be realized.

[0023]

Next, an embodiment of the present invention will be described.

Embodiment 1 As shown in FIG. 1, a glass substrate (30 cm.times.3
0 cm) was used. FIG. 3 shows the state of “warpage” and “undulation” on the glass substrate. As can be seen from FIG. 3, “warping” and “undulation” occur along the drawing direction X of the glass substrate. , The difference in height Z along the X direction is at most about 12 μm or more. This value cannot be ignored when compared with the depth of focus of the exposure machine of the 2 μm rule. On the other hand, the difference in height Z in the direction Y perpendicular to the drawing direction X of the glass substrate is within the range of the depth of focus, and can be ignored, and "warp" and "undulation" in the same direction can be ignored.

As shown in FIG. 2, the drawing direction of the glass substrate (the direction in which “warpage” and “undulation” occur) and the scanning direction of the mirror projection type exposure machine are matched, and the glass substrate is successively moved along the scanning direction. The resist on the glass substrate was exposed while the focus was adjusted.

A mirror projection type exposure machine is an
A = 0.15 and three wavelengths of g, h, and i rays were used. For exposure, a resist having high sensitivity to both g-line and i-line was used. As shown in FIG. 5, the width of the arc-shaped slit is 10 cm, and the radius of curvature of the arc-shaped slit is 110 m.
m, two scans were performed with a width of 15 cm to expose the entire substrate. The depth of focus is clearly described in the catalog or specifications of the exposure machine. However, it can be easily calculated from the following equation.

Resolution R in Photolithography
And the depth of focus DOF is based on the Reyleigh equation shown below.

R = k ₁ · λ / NA (1) DOF = k ₂ · λ / NA ² (2) where λ is a wavelength and NA is a numerical aperture. Although k ₁ and k ₂ are constants, they can be determined from the type of optical system and resist.

To reduce the resolution R (high resolution),
From the equation (1), whether the wavelength λ is reduced (g line → i line)
Alternatively, the numerical aperture NA may be increased. When the wavelength λ is reduced or the numerical aperture NA is increased, (2)
From the equation, the DOF also became smaller at the same time, resulting in "warping"
In a glass substrate having undulations or “undulations”, portions that are out of focus are formed, making it difficult to form a fine pattern. In the mirror projection type exposure apparatus used in the present embodiment, when NA = 0.15 and the wavelength is calculated as g-line,
At a resolution R = 2 μm, the depth of focus DOF is ± 6 μm (width 1).
2 μm).

As introduced in FIG. 3, the difference in Z along the drawing direction X of the glass is 12 μ or more at the maximum.
If not according to the present invention, the depth of focus is out of the range, and the pattern “blur” occurs. However, in the present invention, since the focus is sequentially adjusted along the glass drawing direction X (matching with the scanning direction), it is possible to perform exposure scanning within the range of the depth of focus over the entire surface of the glass substrate. The “warp” and “undulation” in the direction Y perpendicular to the drawing direction X of the glass substrate are ± 6 μm or less in the margin, and the length of the X component of the slit on the arc is ± 6 μm or less. Thus, a portion that is out of focus does not occur, and a fine pattern can be formed.

As a result of developing the exposed resist as described above, a 2 μm pattern of g-line resist was formed over the entire surface of the substrate with an in-plane uniform line width of 0.1 μm or less.

In the above embodiment, the g-line and the g-line
Instead of a line resist, i-line and i-line resists, h-line and h-line resists can be used.

The term "exposure with sequential focus adjustment" means that the exposure is performed while literally measuring the focus distance literally, or that the focus distance is measured in advance and the exposure is performed while changing the focus during the exposure scan. Needless to say, it includes things that do.

Embodiment 2 In Embodiment 2, a three-terminal MO is used as a switching element.
An example in which the present invention is applied to the manufacture of a liquid crystal device having an active matrix substrate using an S-type element will be described.

In FIG. 6, the TFT 21 (N
The scanning signal or the gate signal is applied to the TFT 21 in the display region as well as the manufacturing process of the channel TFT and the storage capacitor 22 as well as the peripheral region formed in parallel with the manufacturing process. Peripheral circuit in which TFTs are formed around the display area to drive
The manufacturing process of the TFTs (complementary TFT 60 (N channel) and TFT 61 (P channel)) therein is also described. The low-temperature polysilicon TFT is a technique for forming a polycrystalline silicon TFT by a low-temperature process, and the following manufacturing method is an example.

As shown in FIG. 6A, an insulating layer 32 is formed on a glass substrate 31, and an amorphous silicon layer is laminated thereon. Thereafter, the amorphous silicon layer is recrystallized by subjecting the silicon layer to a heat treatment such as a laser annealing treatment, thereby forming a crystalline polysilicon layer 40 (having a thickness of, for example, 50 nm). This first step is the same in the display area and the peripheral area.

Next, as shown in FIG. 6B, the formed polysilicon layer 40 is patterned so as to form a semiconductor layer S, and a gate insulating layer 30 is laminated thereon. The thickness of the gate insulating layer 30 is, for example, 100 to 1
It is about 50 nm. This second step is the same in the display area and the peripheral area.

Next, as shown in FIG. 6C, a region other than the region to be the connection portion 16 and the lower electrode 18 in the display region is masked with a resist 41 such as polyimide.

On the other hand, in the peripheral region, the entire surface is masked with a resist 41. Then, after the mask processing in both regions, for example, PH ₃ /
The polysilicon layer 40 is doped with H ₂ ions via the gate insulating layer 30. The doping conditions at this time are
For example, the dose of ³¹ P is 3 × 10 ^{15 to} 5 × 10
¹⁵ / cm ² , and the energy is 80 k
About eV is required. By this third step, the connection portion 16 and the lower electrode 18 are formed. Since PH ₃ / H ₂ ions are implanted after the gate insulating film 30 is formed, the polysilicon layer 40 is less likely to be damaged by the ion implantation, and the ion implantation is performed with higher energy. The electrode 18 can be manufactured.

Next, as shown in FIG. 6D, after doping the PH ₃ / H ₂ ions, the resist 41 is peeled off, and then the gate electrodes 8 and 4 of the respective TFTs are removed.
6 and 47 and the gate line 6b are formed. The formation of the gate electrode, the gate line, and the like is performed by, for example, forming a pattern of the gate electrode and the like on the resist, sputtering or vacuum depositing a film of chromium or tantalum, and then removing the resist.

Then, the gate electrodes 8, 46 and 47
After the formation of the gate line 6b, the TFT 61 in the peripheral region is formed.
A resist 42 is applied to each of the regions corresponding to the lower electrode 18 and the region corresponding to the lower electrode 18 in the display region 1 and masked, and then PH ₃ / H ₂ ions are doped again. The doping conditions at this time are, for example, a dose of ³¹ P of about 8 × 10 ¹⁴ to 2 × 10 ¹⁵ / cm ² and an energy of about 80 eV. The doping of the upper electrode is smaller than that of the lower electrode.
Through the above fourth step, the source region 10, the channel region 14, and the drain region 12 as the TFT 21 are formed, and the source region 43, the channel region 44, and the drain region 45 as the TFT 60 are formed.

Next, as shown in FIG. 6 (5), after doping the PH ₃ / H ₂ ions, the resists 42 are respectively stripped off, and thereafter, the region where the TFT 60 is formed in the peripheral region and the display are formed. Resist 48 in all areas
Is applied and masked, and then B for forming a P-type is formed.
Doping with ₂ H ₆ / H ₂ ions. The doping condition at this time is, for example, that the dose amount of ¹¹ B is 7 × 10
¹⁴ / cm ² or more, and the energy is 2
About 5 to 30 keV is required.

According to the fifth step, the source region 50, the channel region 51, and the drain region 5 as the TFT 61 are formed.
2 are formed.

Finally, as shown in FIG. 6 (6), after the resist 48 is peeled off, the first interlayer insulating layer 33 is laminated.
Then, contact holes C2 and C3 and TFT6
The positions of the contact holes corresponding to the respective electrodes 0 and 61 are opened, and the pattern of each electrode is patterned with a resist, and then a metal such as aluminum is sputtered or vapor-deposited.
54 and 55 and the data line 4a are formed.

Thereafter, a second interlayer insulating layer 34 is laminated to open a position to be a contact hole C1, and a pixel electrode 20 is formed in a predetermined region thereon by sputtering or vapor deposition to form a pixel portion shown in FIG. And the TFTs 60 and 61 in the peripheral region are completed. Thereafter, a liquid crystal device is completed through processes such as forming a counter electrode on a counter substrate (not shown) and filling liquid crystal between the pixel electrode 20 and the counter electrode. still,
Since the contact holes C1 and C2 establish electrical continuity with the pixel electrode 20, the drain region 12, the connection portion 16, and the pixel electrode 20 can be electrically reliably connected.

In the present embodiment, a step of exposing and developing a resist to form a resist pattern (for example, step (2), step (3), step (4), step (5) in the above embodiment) , Step (6), etc.), the method described in Embodiment 1 was applied. As a result, the line width of the low-temperature polysilicon TFT and the contact hole for the pixel portion TFT and the peripheral region TFT of the liquid crystal device are reduced by two.
The miniaturization of the μm rule was realized. And
The "frame" of the liquid crystal device could be narrowed, and the parasitic capacitance could be reduced due to the fine rule, so that the power consumption could be reduced.

(Other Embodiments) In the embodiment described with reference to FIG. 6, instead of providing the data line driving circuit and the scanning line driving circuit on the active matrix substrate 100, for example, TAB (tape auto A drive LSI mounted on a mated bonding substrate) may be electrically and mechanically connected via an anisotropic conductive film provided around the active matrix substrate 100. Further, on the side of the opposing substrate where the projected light is incident and on the side of the active matrix substrate 100 where the emitted light is emitted, for example, a TN (twisted nematic) mode, an STN (super TN) mode, a D-ST
A polarizing film, a retardation film, a polarizing plate, and the like are arranged in a predetermined direction according to an operation mode such as an N (double-STN) mode and a normally white mode / normally black mode.

The liquid crystal device according to each of the embodiments described above is applied to, for example, a color liquid crystal projector, so that three liquid crystal devices are used as light valves for RGB, and each panel has an RGB color separation. The light of each color decomposed via the dichroic mirror for light is incident as projection light. Therefore, in each embodiment, no color filter is provided on the opposing substrate. However, an RGB color filter may be formed on a counter substrate together with the protective film in a predetermined region facing the pixel electrode 20 where the second light-shielding film is not formed. In this way, the liquid crystal device according to each embodiment can be applied to a color liquid crystal device such as a direct-view or reflection type color liquid crystal television other than the liquid crystal projector. Further, a micro lens may be formed on the counter substrate so as to correspond to one pixel. In this case, a bright liquid crystal device can be realized by improving the efficiency of collecting incident light. Furthermore, a dichroic filter that produces RGB colors using light interference may be formed by depositing a number of interference layers having different refractive indices on the opposite substrate. According to the counter substrate with the dichroic filter, a brighter color liquid crystal device can be realized.

The switching element provided in each pixel is described as a normal stagger type or coplanar type polysilicon TFT.
The embodiments are also effective for other types of TFTs such as TFTs and amorphous silicon TFTs.

Further, as a switching element of each pixel of the liquid crystal device, a two-terminal non-linear element such as TFD and MIM may be used instead of the TFT. In this case, one of the scanning line and the data line is provided on a counter substrate to form a stripe-shaped counter electrode, and the other is provided on a substrate on which a switching element is formed, and each pixel electrode is provided via a TFD element or the like. It may be configured to be connected to. Alternatively, a passive matrix liquid crystal device may be configured without providing a switching element in each pixel of the liquid crystal device.

Further, as an electro-optical device, in addition to a liquid crystal device, the present invention can be applied to a plasma display panel (PDP), an electroluminescence (EL) panel, a field emission panel (FEP), a digital mirror device (DMD), and the like. .

(Electronic Apparatus) Next, an embodiment of an electronic apparatus including the electro-optical device (such as a liquid crystal device) 300 described in detail above will be described with reference to FIGS.

First, FIG. 7 shows a schematic configuration of an electronic apparatus having the liquid crystal device 300 as described above.

In FIG. 7, the electronic equipment includes a display information output source 1000, a display information processing circuit 1002, a drive circuit 10
04, a liquid crystal device 300, a clock generation circuit 1008, and a power supply circuit 1010. The display information output source 1000 includes a ROM (Read Only Memory), RA
M (Random Access Memory), a memory such as an optical disk device, a tuning circuit for tuning and outputting an image signal, etc.
Based on a clock signal from the clock generation circuit 1008, display information such as an image signal in a predetermined format is output to the display information processing circuit 1002. Display information processing circuit 1
Reference numeral 002 includes various known processing circuits such as an amplification / polarity inversion circuit, a serial-parallel conversion circuit, a rotation circuit, a gamma correction circuit, and a clamp circuit, and includes a display information input based on a clock signal. Digital signals are sequentially generated and output to the drive circuit 1004 together with the clock signal CLK. The drive circuit 1004 drives the liquid crystal device 100. The power supply circuit 1010 supplies a predetermined power to each of the above-described circuits. The driving circuit 1004 is provided on the active matrix substrate constituting the liquid crystal device 300.
May be mounted, and in addition to this, the display information processing circuit 10
026 may be mounted.

Next, FIG. 8 to FIG. 9 show specific examples of the electronic apparatus configured as described above.

Referring to FIG. 8, a liquid crystal projector 1100 as an example of an electronic apparatus has a liquid crystal device 300 in which the above-described drive circuit 1004 is mounted on an active matrix substrate.
Are prepared as projectors that are used as RGB light valves 100R, 100G, and 100B, respectively. In the liquid crystal projector 1100, when projection light is emitted from a lamp unit 1102 of a white light source such as a metal halide lamp, three mirrors 1106 and two dichroic mirrors 1108 light components R, G, and R corresponding to the three primary colors of RGB. B, and are led to light valves 100R, 100G, and 100B corresponding to each color. At this time, in particular, the B light is guided through a relay lens system 1121 including an entrance lens 1122, a relay lens 1123, and an exit lens 1124 in order to prevent light loss due to a long optical path. Then, light components corresponding to the three primary colors modulated by the light valves 100R, 100G, and 100B, respectively, are recombined by the dichroic prism 1112, and then are transmitted through the projection lens 1114 to the screen 112.
0 is projected as a color image.

In FIG. 9, a laptop personal computer (PC) 1200 for multimedia, which is another example of electronic equipment, has the above-described liquid crystal device 300 provided in a top cover case, and further has a CPU and a memory. , A main body 1204 containing a keyboard 1202 and a modem.

In addition to the electronic devices described above with reference to FIGS. 7 to 9, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a digital camera,
Car navigation systems, electronic organizers, calculators, word processors, engineering workstations (EW
S), a mobile phone, a videophone, a POS terminal, a device having a touch panel, and the like are examples of the electronic device.

[Brief description of the drawings]

FIG. 1 A swell that occurs in the direction in which a glass substrate is drawn out.
It is a perspective view for explaining warpage.

FIG. 2 is a perspective view for explaining the method of the present invention.

FIG. 3 undulations generated in the direction in which the glass substrate is pulled out;
It is a perspective view showing warpage.

FIG. 4 is a perspective view schematically showing a mirror projection type exposure machine.

FIG. 5 is a plan view for explaining a state of scanning a glass substrate.

FIG. 6 is a process chart sequentially showing a manufacturing process of the liquid crystal display device.

FIG. 7 is a block diagram illustrating a schematic configuration of an embodiment of an electronic device.

FIG. 8 is a cross-sectional view illustrating a liquid crystal projector as an example of an electronic apparatus.

FIG. 9 is a front view illustrating a personal computer as another example of the electronic apparatus.

[Explanation of symbols]

 4a Data line 6b Gate line 8 Gate electrode 10 Source 12 Drain 14 Channel 16 Connection 18 Lower electrode 20 Pixel electrode 21 TFT (N-channel) 30 Gate insulating film 31 Glass substrate 32 ... insulating film 33 ... first interlayer insulating film 34 ... second interlayer insulating film 35 ... aluminum electrode 40 ... polysilicon layer 41 ... resist 43 ... source 44 ... channel 45 ... drain 46 ... gate electrode 47 ... gate electrode 48 ... resist 50 ... Source 51 ... Channel 52 ... Drain 53 ... Aluminum electrode 54 ... Aluminum electrode 55 ... Aluminum electrode 60 ... TFT (N channel) 61 ... TFT (P channel) s ... Semiconductor layer c ... Contact hole 100 ... Active matrix substrate 300 ...・ Electro-optical device (liquid crystal device) 400 ・ ・ ・ Slit 410 ・ ・ ・ Gala Board

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 GA49 GA51 HA28 JA24 JA34 JA37 KA04 KA05 MA13 MA30 NA26 NA27 PA01 PA07 PA10 PA11 QA07 QA10 5C094 AA05 AA15 AA22 AA43 AA48 BA03 BA43 CA19 DA09 DA13 DB01 DB04 EA04 FB02 FB02 FB04 GB10 JA08 5F046 BA05 CC01 CC02 CC03 CC15 DA07 DA14 5F110 AA02 AA09 AA17 BB02 BB04 CC02 CC08 DD02 EE04 EE43 EE44 GG02 GG13 GG25 HJ01 HJ04 HJ12 HL03 HL23 HM17 NN03 NN72 PP03 QQ11

Claims (5)

[Claims] 1. A method for manufacturing a thin film transistor in which a thin film transistor is formed on a substrate, wherein a drawing direction of the substrate formed by drawing the molten glass into a sheet substantially coincides with a scanning direction of an exposure machine in a lithography process. A method for manufacturing a thin film transistor. 2. The method according to claim 1, wherein in the lithography step, the substrate is exposed while sequentially focusing along a scanning direction of a mirror projection type exposure machine. 3. The method according to claim 2, wherein the exposure is performed by a mirror projection type miniaturization exposure apparatus having a depth of focus of 12 μm or less. 4. A thin film transistor formed in a display region and a circuit region on a substrate, and formed in the display region and the peripheral drive circuit region by the manufacturing method according to claim 1. A method for manufacturing a thin film transistor, comprising: 5. An electric device comprising an electro-optical material sandwiched between a first substrate and a second substrate on which a thin film transistor is formed by the manufacturing method according to claim 1. Optical device.