JP2001024511A - Current addition d/a converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a current addition D/A converter capable of reducing current consumption. SOLUTION: The D/A converter having a bias generation circuit 2 and a plurality of current source cells 1 arranged in a matrix is provided with a dummy current source cell 21, a switch 24 for connecting the bias voltage outputted from the circuit 2 to the respective gates of a plurality of current source cells 1 and that of a current source transistor(TR) of the dummy current source cell 21 and a voltage comparator 22 for comparing the voltage of drain voltage of the current source TR in the cell 21 with that of reference voltage and outputting a control signal to the switch 24. When an external load resistor is not connected to the D/A converter, the switch 24 is turned off with the control signal outputted by the voltage comparator 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current addition type D / A converter used for a semiconductor integrated circuit, and more particularly to a D / A converter.
It is intended to reduce current consumption when the A converter is mounted on a semiconductor integrated circuit with multiple channels, or when a plurality of D / A converters are mounted on one semiconductor integrated circuit.

[0002]

2. Description of the Related Art FIG. 3 is a block diagram of a conventional current addition type D / A converter. A plurality of current source cells 1 are used in accordance with the number of input bits of the D / A converter, and are arranged in a matrix. The decode circuit 3 selects a predetermined number of the current source cells 1 according to the digital input signal code. The sum of the current values output from the selected current source cells 1 flows into the output terminal Iout of the D / A converter. This current is converted to an analog voltage output via a chip external load resistor RL connected between the ground outside the D / A converter and the output Iout of the D / A converter.

Each current source cell 1 includes PMOS transistors 11 to 13, and the PMOS transistor 11 is used as a current source transistor.
2 and 13 are used as current output selection transistors. Digital signals Vin and NVin of opposite phases are input to the gates of the PMOS transistors 12 and 13 from the current source selection decoder circuit 3. The drain voltage of the output selection PMOS transistor 13 is grounded to the ground inside the D / A converter, and the drain of the other output selection PMOS transistor 12 becomes the output Iout of the D / A converter.

The gate voltage of the current source transistor 11 is equal to the bias voltage Vib generated by the bias generator 2.
Is supplied. In such a case, the current Io output from the current source transistor 11 is selected by the digital input signal code given from the current source selection decoding circuit 3 of the D / A converter and flows into the ground side or the output terminal side Iout.

FIG. 4 is a configuration diagram of a D / A converter of a plurality of channels. FIG. 4 shows the D / D of the Y and C channels.
4 shows an A converter. The decoding circuit 3 in each channel is connected to the current source cell 1 according to the digital input signal code.
Is selected by a predetermined number, and the sum of the current values output from the selected current source cells 1 is equal to the output terminal YIout, of the D / A converter.
Flow into CIout.

When the D / A converter is used for a plurality of channels as described above, the bias generation circuit 2 is not used for each channel of each D / A converter. A common bias generation circuit 2 is used. In such a case, the D / A converter does not always use all the channels simultaneously depending on the use mode of the built-in semiconductor integrated circuit. Therefore, when not used, an external circuit is provided between the external ground of the semiconductor integrated circuit and the output terminal of the D / A converter in order to simplify the printed circuit board on which the semiconductor integrated circuit is mounted and to reduce the number of components outside the semiconductor integrated circuit. In some cases, the load resistance RL is not connected.

[0007]

However, since the bias voltage of the Y-channel current source transistor 11 and the C-channel current source transistor 11 of the D / A converter is common to all the channels used, When the digital input to the decoder circuit 3 cannot be controlled, the output current output from the D / A converter is output through the output selection transistors 12 and 13, respectively. Therefore, even when the load resistor RL outside the chip is not connected to the current addition type D / A converter (the D / A converter is not used), the current source bias voltage (gate voltage) is connected. Therefore, the output current of the D / A converter is always output to the ground side or the output terminal side. Therefore, in the conventional configuration of the D / A converter, current is consumed even though it is not used, which is disadvantageous in terms of current consumption.

Therefore, the present inventor senses that the D / A converter is unused, and controls the current source transistor so as not to apply a bias voltage (ie, a gate voltage). I thought it would go away.

Accordingly, it is an object of the present invention to provide a current addition type D / A converter capable of reducing current consumption.

[0010]

According to a first aspect of the present invention, there is provided a bias generating circuit comprising:
What is claimed is: 1. A current addition type D / A converter having a plurality of current source cells, comprising: a dummy current source cell; a bias voltage output from said bias generation circuit; and a current of said plurality of current source cells and said dummy current source cell. A switch that connects each gate of the source transistor, and a voltage comparator that compares a voltage value of a drain voltage of the current source transistor of the dummy current source cell with a reference voltage and outputs a control signal to the switch; When the external load resistance of the D / A converter is not connected,
A current addition type D / A converter that turns off the switch by a control signal output from the voltage comparator.

According to this configuration, when the external load resistance of the chip of the current addition type D / A converter is not connected (when the D / A converter is not used), the bias voltage is applied to the gate of the current source transistor. By switching the switch so that the current is not supplied, it is possible to prevent any current from being output to both the ground side and the output side of the D / A converter, thus avoiding the output current consumption of the D / A converter when not in use. can do. Therefore, as a result, the current consumption of the D / A converter can be reduced as a whole.

According to a second aspect of the present invention, in the configuration of the first aspect, a current addition type D / A converter is used for multiple channels, and each channel is provided with a bias voltage output from a bias generation circuit and a plurality of channels. A switch for connecting each gate of the current source transistors of the current source cell and the dummy current source cell, and a voltage value between a drain voltage of the current source transistor of the dummy current source cell and a reference voltage, and a control signal to the switch. And a voltage comparator that outputs a signal when the external load resistance is not connected in one channel. The current addition type D / A conversion that turns off the switch by a control signal output from the voltage comparator inside the one channel. It is a vessel.

According to this configuration, in addition to the effect of the first aspect of the invention, the voltage fluctuation of the drain voltage of the current source transistor of the unused channel is used as noise (the load resistance is connected). It can be prevented from propagating to the channel.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 shows a current addition type D according to an embodiment of the present invention.
It is a block diagram of a / A converter. This embodiment is particularly effective when a plurality of D / A converters are mounted on one semiconductor integrated circuit.

FIG. 1 is different from FIG.
And a switch 24 connecting the bias voltage output from the bias generation circuit 2 to the gates 11 of the current source transistors of the plurality of current source cells 1 and the dummy current source cells 21.
And a voltage comparator 22 that compares the voltage value of the drain voltage of the current source transistor of the dummy current source cell 21 with the reference voltage Vp and outputs a control signal to the switch 24. When the external load resistance RL of the D / A converter is not connected,
The switch 24 is controlled by a control signal output from the voltage comparator 22.
Is turned off.

A plurality of current source cells 1 are used according to the number of input bits of the D / A converter, and are arranged in a matrix. The output current values of the respective current source cells 1 are not the same. For example, when the number of input bits is 10, 130 current source cells 1 are prepared, and the output current values of the current source cells 1 are four types. That is, the output current ratio is 1: 1/2: 1
/ 4: 1/8 of four types of current source cells are prepared, 127 current source cells having an output current ratio of 1 and currents having other relative output current ratios of 1/2, 1/4, and 1/8. There is one source cell each.

The decoding circuit 3 has a predetermined number of current source cells 1 and dummy current source cells 2 according to a digital input signal code.
Select 1. The sum of the current values output from the selected current source cells 1 and the dummy current source cells 21 flows into the output terminal Iout of the D / A converter. This current is converted to an analog voltage output via a chip external load resistor RL connected between the ground outside the D / A converter and the output Iout of the D / A converter. The size of the current source transistor of the dummy current source cell 21 is smaller than the size of the current source transistor of the current source cell 1. Therefore, the dummy current source cell 21
Therefore, the effect on the D / A conversion accuracy can be reduced.

Each current source cell 1 and dummy current source cell 2
1 includes PMOS transistors 11 to 13 and a PMO
S transistor 11 is used as a current source transistor, and PMOS transistors 12 and 13 are used as current output selection transistors. Digital signals Vin and NVin of opposite phases are supplied from the current source selection decoder circuit 3 to the PMOS transistors 12 and 13 in the current source cell 1.
Input to the gate. Further, digital signals DVin and DNVin of opposite phases are inputted from the current source selection decoder circuit 3 to the gates of the PMOS transistors 12 and 13 inside the dummy current source cell 21. The drain voltage of the output selection PMOS transistor 13 is grounded to the ground inside the D / A converter, and the drain of the other output selection PMOS transistor 12 becomes the output Iout of the D / A converter.

The bias voltage Vib generated by the bias generation circuit 2 is applied to each current source cell 1 via the switch 24.
And current source transistor 11 of dummy current source cell 21
Is supplied as a gate voltage to the gates of. In this case, the current Io output from the current source transistors 11 of the current source cell 1 and the dummy current source cell 21 is selected by a digital input signal code given from the current source selection decoding circuit 3 of the D / A converter. Flows into the ground side or the output terminal side Iout.

One input terminal Vp of the voltage comparator 22 is supplied with a reference voltage, the other input terminal Vn is connected to the drain of the dummy current source transistor 11, and the voltage comparator 22 compares these voltages. I do. When the external load resistor RL is not connected to the D / A converter, the potential of Vn becomes higher than the potential of Vp, and therefore, a logical value (for example, H ), And when the external load resistor RL is connected and the D / A converter is used in the normal mode, the potential of Vn becomes Vp.
, The voltage comparator 22 outputs a logical value (for example, L) such that the switch 24 closes. As described above, the voltage comparator 22 determines whether the drain voltage of the current source transistor of the dummy current source cell 21 is higher or lower than the reference voltage Vp, and can obtain an appropriate logic output. Switch 24 with output voltage of 22
Opening and closing can be controlled.

In the conventional configuration, since the bias voltage is always supplied to the current source transistor from the bias generation circuit even when the D / A is not used, the current from the current source transistor is output and wasteful consumption occurs. Although the current has flowed, when the configuration of the present invention is used, when not used (the external load resistance is not connected), the output of the voltage comparator 22 is a logical value when the external load resistance RL is not connected (for example, H) is automatically output, and the switch 24 is opened so that the bias voltage from the bias voltage generation circuit 12 is not supplied to the current source transistor 11. Therefore, when the D / A converter is not in use, no current flows from the current source transistor, so that the power consumption of the semiconductor integrated circuit can be significantly reduced.

Also, when the D / A converter has multiple channels, only an arbitrary channel is used and another channel is not used, no external load resistance is connected to an unused channel. In such a case, similarly, in the conventional configuration, the current was consumed because the current source transistor was connected to the bias generation circuit. However, by applying the configuration of the present invention, the unused channel was similarly generated by the switch 24. , The power supply of the semiconductor integrated circuit equipped with the D / A converter can be reduced.

FIG. 2 is a block diagram of a multi-channel current addition type D / A converter according to the present invention. Figure 2 shows the Y channel and C
The D / A converter of a channel is shown.

The decode circuit 3 in each channel selects a predetermined number of current source cells 1 and dummy current source cells 21 in accordance with the digital input signal code, and selects each of the selected current source cells 1 and dummy current source cells. The sum of the current values output by 21 flows into output terminals YIout and CIout of the D / A converter. When the D / A converter is used for a plurality of channels as described above, the bias generation circuit 2 is not used for each channel of each D / A converter, but a bias common to all channels is used as shown in FIG. A generation circuit 2 is used.

Each channel includes a switch 24 for connecting the bias voltage output from the bias generation circuit to each of the gates of the current source transistors of the plurality of current source cells 1 and the dummy current source cell 21, and the current of the dummy current source cell 21. A voltage comparator 22 that compares a voltage value between a drain voltage of a source transistor and a reference voltage and outputs a control signal to a switch 24
And As in FIG. 1, in FIG. 2, when there are unused channels in the multi-channel current addition type D / A converter, the voltage comparators 22 in each channel change the state where the external load resistance is not connected. The detected switch 24 is turned off to separate the bias voltage common to the channels.

When the data cannot be separated by the switch, if data is input to the unused channel, the drain voltage of the current source transistor fluctuates, and this is transmitted as noise to the used channel. However, when the configuration of FIG. 2 is used, in addition to the effect of FIG. 1, since the switch 24 is provided for each channel, the bias voltage common to each channel can be separated, and the current of the unused channel can be reduced. The voltage fluctuation of the drain voltage of the source transistor is used as noise (load resistance is connected)
It can be prevented from propagating to the channel.

In this embodiment, the current addition type D /
Although the plurality of current source cells in the A converter are arranged in a matrix, an arrangement other than the matrix, such as a circular shape, may be used.

[0028]

As described above, according to the present invention, a semiconductor integrated circuit is provided with a current addition type D / A converter, and when there is an unused state, it is determined that the semiconductor integrated circuit chip is unused. Since a configuration is employed in which the presence / absence of an external load resistor RL to the output terminal is detected and the bias voltage of the unused D / A converter is not supplied, the current is not supplied to the unused D / A converter. It can be prevented from being consumed. Therefore, power can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a current addition type D / A converter for describing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a multi-channel current addition type D / A converter of the present invention.

FIG. 3 is a configuration diagram of a conventional current addition type D / A converter.

FIG. 4 is a configuration diagram of a conventional multi-channel current addition type D / A converter.

[Description of Signs] 1 current source cell 2 bias generation circuit 21 dummy current source cell 22 voltage converter 23 decoder circuit 24 switch

Claims (2)

[Claims] 1. A current addition type D / A converter having a bias generation circuit and a plurality of current source cells, comprising: a dummy current source cell; a bias voltage output from the bias generation circuit; and the plurality of currents. A switch for connecting the source cell and each gate of the current source transistor of the dummy current source cell; and a control signal to the switch by comparing a voltage value between a drain voltage of the current source transistor of the dummy current source cell and a reference voltage. And a voltage comparator that outputs a signal when the external load resistance of the D / A converter is not connected. The current addition type D / A converter turns off the switch by a control signal output from the voltage comparator. . 2. A current addition type D / A converter is used for multiple channels, each channel having a bias voltage output from a bias generation circuit and a plurality of gates of current source transistors of a plurality of current source cells and a dummy current source cell. And a voltage comparator for comparing a voltage value between a drain voltage of a current source transistor of the dummy current source cell and a reference voltage and outputting a control signal to the switch. 2. The current addition type D / A converter according to claim 1, wherein when the resistor is not connected, the switch is turned off by a control signal output from a voltage comparator inside the one channel.