JP2001024456A - Receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a receiver for obtaining an automatic gain control without generating any overlapped part in a circuit. SOLUTION: In a receiver for operating automatic gain control by controlling the attenuation of a variable attenuator 9 by attenuation control data DAGC calculated by a CPU 19, the input of the CPU 19 is provided with a variable amplifier 16, and the amplification degree of the variable amplifier 16 is controlled by inverted data G of the attenuation control data DAGC, and the attenuation to be applied to the variable attenuator 9 is offset by the amplification degree of the variable amplifier 16 by the automatic gain control so that a signal in the same level as that of the input of the variable attenuator 9 can be inputted to the CPU 19. Therefore, the operation of the CPU 19 can be prevented from being affected by the attenuation of the variable attenuator 9, and the overlapped part of the circuit in a conventional technique can be removed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver having an automatic gain control circuit, and more particularly to a receiver having an intermediate frequency circuit for controlling the gain.

[0002]

2. Description of the Related Art In a receiver which converts a high-frequency signal supplied from an antenna into a baseband signal and outputs the baseband signal, a receiver of a double conversion type in which a gain is controlled by a first intermediate frequency circuit is conventionally used. Used from.

FIG. 5 shows an example of a receiver according to the prior art. In this receiver, as shown in the figure, a received signal is fetched from an antenna input terminal 1 and finally subjected to a predetermined signal processing to obtain a baseband signal. And supplies it to the baseband unit 15.

For this purpose, first, a high-frequency signal input from an antenna input terminal 1 is converted into a first frequency mixer through a band filter 2 and an amplifier 3, a band filter 4 and an amplifier 5 of a predetermined frequency. 6, where it is converted to a first intermediate frequency signal of a predetermined frequency by a first local signal of a predetermined frequency.

Next, the first intermediate frequency signal output from the first mixer 6 is further supplied to a second frequency mixer 10 via a bandpass filter 8 and a variable attenuator 9, where Is converted to a second intermediate frequency signal of a predetermined frequency by a second local signal of the frequency of (2nd Local).

The second intermediate frequency signal output from the second frequency mixer 10 is also supplied to a third frequency mixer 14 via a bandpass filter 12 and an amplifier 13, where a predetermined frequency is output. Is converted into a baseband signal of a predetermined frequency by the third local signal (3rd Local) and supplied to the baseband unit 15.

By the way, in such a receiver, there is a level fluctuation in the signal received by the antenna. Therefore, it is inevitable to provide an automatic gain control (AGC) function for stabilizing the level of the output signal. Therefore, by providing the variable attenuator 9 and controlling the amount of attenuation by the variable attenuator 9, the level of the signal supplied to the baseband unit 15 is stabilized.

Then, for controlling the variable attenuator 9,
Take out the first intermediate frequency signal from its input side,
Like the second frequency mixer 10 and the bandpass filter 12 in the original signal processing system, the signals are processed by the second frequency mixer 26 and the bandpass filter 28, and then the DC detector 17, the A / D converter Data representing a signal level is input to a CPU 19 via 18, and the CPU 19 supplies attenuation control data D _AGC to the variable attenuator 9.

Here, first, the DC detector 17 detects the second intermediate frequency signal output from the bandpass filter 28 and outputs a DC signal representing the carrier wave level of the received signal supplied to the antenna input terminal 1. , That is, the carrier level signal is output.
, Where it is converted to digital carrier level data. Then, the CPU 19 calculates attenuation control data _DAGC for controlling the variable attenuator from the digital carrier level data.

Therefore, the variable attenuator 9, the second frequency mixer 26 and the bandpass filter 28 provided for controlling the attenuation of the variable attenuator 9, the DC detector 17, the A / D converter 18, and the CPU 19 There will be constituting the automatic gain control system, thereby, the attenuation of the variable attenuator 9 is controlled in accordance with the attenuation control data D _AGC representing the level of the signal received by the antenna, the third frequency The level of the baseband signal output from the mixer 14 is stabilized.

[0011]

The prior art described above has a problem that the circuit is complicated and the cost is increased, because the overlapping portion existing in the circuit is not considered. That is, in the conventional receiver of FIG. 5, in addition to the second frequency mixer 10 and the bandpass filter 12 in the original signal processing system, the frequency mixer 16 and the bandpass filter 17 in the automatic gain control system. Therefore, there is an overlap in the circuit, and the circuit becomes complicated. SUMMARY OF THE INVENTION It is an object of the present invention to provide a receiver capable of obtaining automatic gain control without causing an overlapping portion in a circuit.

[0012]

An object of the present invention is to provide a variable attenuator disposed on a transmission path of an input signal, and an arithmetic means for generating a control signal in accordance with the level of the input signal. In a receiver in which an automatic gain control function is provided by controlling the amount of attenuation of a variable attenuator, a variable amplifier whose amplification is controlled by an inverted signal of the control signal is provided at an input of the arithmetic means. The attenuation given by the variable attenuator to the input signal,
This is achieved by inputting a signal from the output of the variable attenuator to the arithmetic means in a state where the signal is canceled by the amplification degree of the variable amplifier.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a receiver according to the present invention will be described in detail with reference to the illustrated embodiments. FIG.
Is an embodiment of the present invention. In the figure, reference numeral 16 denotes a variable amplifier, 21 denotes a delay circuit, 22 denotes an inverting circuit, and the other configuration is the same as that of the conventional receiver described with reference to FIG.

The gain of the variable amplifier 16 is controlled by the gain control signal G, and its function will be described later. Next, the delay circuit 21 has the function of taking in the second intermediate frequency signal appearing at the output of the bandpass filter 12, giving it a predetermined delay, and outputting it. Further, the inversion circuit 22 functions to output data G (= −D _AGC ) in which the level of the attenuation control data D _AGC is inverted.

Before describing the operation of this embodiment, the automatic gain control system including the DC detector 17, the A / D converter 18, and the CPU 19 in the prior art shown in FIG. The reason why the antenna input level detection signal is taken in from the input side of the variable attenuator 9 will be described as follows.

That is, assuming that the signal for detecting the antenna input level is taken in from the portion after the output side of the variable attenuator 9, the CPU 1 is affected by the amount of attenuation of the variable attenuator 9.
This is because accurate input level data cannot be transmitted to 9.

For this reason, in the prior art, the signal for detecting the antenna input level must be taken in from the input side of the variable attenuator 9, so that the second mixer 26 and the bandpass filter 28 This overlaps with the two-mixer 10 and the bandpass filter 12.

Therefore, in the embodiment shown in FIG. 1, the variable amplifier 16 and the inverting circuit 22 are provided, whereby the variable amplifier 16 is controlled according to the amount of attenuation given by the variable attenuator 9.
Is increased, so that the input of the CPU 19
In this configuration, the amount of attenuation by the variable attenuator 9 is offset.

As a result, in the embodiment of FIG. 1, even if a signal for detecting the antenna input level is taken in from the output of the bandpass filter 12 after the variable attenuator 9, the effect of the attenuation of the variable attenuator 9 can be obtained. Without receiving the data, accurate data is transmitted to the CPU 19, and duplication of circuits can be avoided. Here, the delay circuit 21 is provided to create a time required for control timing adjustment.

FIG. 2 is an operation timing chart of this embodiment. Here, the solid line is the characteristic of the input level of the received signal at the input of the variable attenuator 9, the broken line is the attenuation of the variable attenuator 9, and the dashed line is the amplifier 13 , The two-dot chain line indicates the amplification degree of the variable amplifier 16.

Next, FIG. 3 is an explanatory diagram of the situation at each time in FIG. 2. Hereinafter, the operation of this embodiment will be described with reference to FIG. 2 and FIG. First, at this time, it is assumed that the target value of the level control is set so as to keep the level of the signal at the input of the amplifier 13 at +10 dBm, and when the attenuation control data _DAGC is 0, the variable attenuator is set. It is assumed that the attenuation of 9 and the amplification of the variable amplifier 16 are both set to the initial value of 0 dB.

Now, from the antenna input terminal 1 to the level +5
Assuming that a signal of 0 dBm is input, this signal is transmitted from the bandpass filter 2 to the bandpass filter 12 in order, and furthermore, the delay circuit 21, the variable amplifier 16, the DC detector 17, A
Data corresponding to a level of +50 dBm is input to the CPU 19 via the / D converter 18.

At this time, in FIG. 2, the signal transmission time in the circuit from the variable attenuator 9 to the amplifier 13 is ignored, and each time t
_1, t _2, and ...... t _4, the time t _5, t _6, the time interval ...... t _8, Yes drawn as equal to τ delay time of the delay circuit 21, the delay time τ is When the amplification of the variable amplifier 16 is controlled and changes, the time is set to be longer than the time required for the change to stabilize.

Therefore, in FIG.
Assuming that the time when the signal of the Bm level is supplied to the input of the variable attenuator 9 is time t ₁ , since the attenuation of the variable attenuator 9 is an initial value of 0 dB at this time, the input of the amplifier 13 is also applied to the time t ₁ , A signal of +50 dBm level appears.

On the other hand, at this time t ₁ , the variable amplifier 16
Is still at the initial value of 0 dB, the signal of the input +50 dBm level continues to appear on the output from time t ₁ to time t ₂ , and as a result, the input of the amplifier 13 The level remains at +50 dBm.

Next, this signal is processed by the CPU 19,
The output attenuation control data D _AGC is supplied to the variable attenuator 9 and the time at which the reception signal is input to the amplifier 13 is set to t _3.
Then, at this time t ₃ , the level of the attenuation control data D _AGC output from the CPU 19 becomes a magnitude necessary for setting the attenuation of the variable attenuator 9 to 40 dB. level of the input will become + 10dBm at the time t _3, will be controlled to the target value.

As a result, at time t ₄ after the elapse of the delay time τ by the delay circuit 21, the input of the variable amplifier 16 is also reduced from the level +50 dBm to the level +10 dBm. level amount control data D _AGC is variable attenuator 9 already at time t ₃
Is supplied to the variable amplifier 16 from the inverting circuit 22 as a signal G, whereby the amplification of the variable amplifier 16 is 0 dB, which is the initial value. To 40 dB.

Therefore, after the time t ₃ , the variable amplifier 16
Despite the input level of +50 dBm dropping from +50 dBm to +10 dBm, the CPU 19 continues to receive data of level +50 dBm, while the input level of the variable amplifier 16 has a transient delay, It will be controlled to the target value.

That is, since the variable amplifier 16 is controlled by the inverted data G of the attenuation control data D _AGC , the variable amplifier 16 always acts in a direction to cancel the signal level change due to the attenuation of the variable attenuator 9, and the variable attenuator 9 is controlled. Even if the amount of attenuation changes due to the automatic gain control operation, the CPU 19 can obtain the operation of continuously inputting the level of the antenna input terminal 1 as it is.

From time t ₄ to time t ₅ , the level of the signal input to antenna input terminal 1 is +5.
This shows a stable state with 0 dBm. Therefore, in this period, the signal level of the input of the amplifier 13 is controlled to the target value of +10 dBm.

Then, it is assumed that the level of the signal sensed at the antenna input terminal 1 drops to +40 dBm at time t ₅ as shown in the figure. Then, at this time, since the attenuation of the variable attenuator 9 is set to -40 dB, the signal level at the input of the amplifier 13 transiently immediately drops to 0 dBm as shown in the figure. I will.

On the other hand, this input signal has a level of +40 dBm.
Is input to the CPU 19 at time t ₆ after the elapse of the delay time τ by the delay circuit 21. Therefore, the CPU 19, from the time t _6, operation corresponding to the signal level + 40 dBm input is started, is supplied to the variable attenuator 9 newly created attenuation control data D _AGC becomes time t ₇ Will be.

Therefore, at time t ₇ , the variable attenuator 9
Is controlled to 30 dB, and as a result, the amplifier 13
The signal level at the input of returns to +10 dBm again,
Therefore, the automatic gain control based on the target level can be obtained only with a transient delay.

As a result, the input of the variable amplifier 16 is also transiently lowered from the level +40 dBm to the level 0 dBm at the time t ₆ , but at the time t ₇ , the level of the attenuation control data D _AGC becomes variable. The magnitude required for the attenuation of the attenuator 9 to be 30 dB is supplied as a signal G from the inverting circuit 22 to the variable amplifier 16, so that the amplification of the variable amplifier 16 is reduced from 40 dB to 3 dB.
It is reduced to 0 dB.

Therefore, also at this time, the variable amplifier 16
The variable attenuator 9 works in a direction to cancel the level change of the signal due to the attenuation of the variable attenuator 9, and the variable attenuator 9 by the automatic gain control operation.
Despite the change in the amount of attenuation, the operation of continuously inputting the level of the antenna input terminal 1 to the CPU 19 can be obtained.

Thus, the above results can be summarized as shown in FIG. Therefore, according to this embodiment, the CP
Despite the fact that the signal for detecting the antenna input level to U19 is fetched from the portion after the output side of the variable attenuator 9, accurate input level data can be given to the CPU 19. , A correct automatic gain control operation can be obtained. As a result, according to the above embodiment, the number of parts used can be reduced, the circuit pattern can be simplified, the mounting space can be reduced, the cost can be reduced, and the receiver can be reduced in size.

FIG. 4 shows another embodiment of the present invention. This embodiment differs from the embodiment shown in FIG. 1 only in that a CPU 25 is used to generate control data for the variable amplifier 16. Other configurations are the same. This CPU 25
In parallel with the CPU 19, the digital carrier level data output from the A / D converter 18 is fetched, whereby the arithmetic processing is executed similarly to the CPU 19,
The output of the control data D _AGC serves to output control data G (= −D _AGC ) whose level is inverted.

Therefore, in the embodiment of FIG. 4, the same operation as that of the embodiment of FIG. 1 can be obtained, and the automatic gain control can be performed correctly without giving the circuit any overlapping part.

[0039]

According to the present invention, it is possible to obtain a correct automatic gain control operation without giving an overlapping portion to the circuit, so that the number of parts used can be reduced, the circuit pattern is simplified, and the mounting space is reduced. Can be obtained, and cost reduction and downsizing of the receiver can be sufficiently achieved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a receiver according to the present invention.

FIG. 2 is a timing chart for explaining the operation of one embodiment of the present invention.

FIG. 3 is a diagram illustrating a situation at each time according to an embodiment of the present invention.

FIG. 4 is a block diagram showing another embodiment of the present invention.

FIG. 5 is a block diagram illustrating an example of a receiver according to the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Antenna input terminal 2 Band filter 3 Amplifier 4 Band filter 5 Amplifier 6 First mixer 8 Band filter 9 Variable attenuator 10 Second mixer 12 Band filter 13 Amplifier 14 Third mixer 15 Baseband section 16 Variable amplifier 17 DC detector 18 A / D converter 19 CPU 21 Delay circuit 22 Inverting circuit 25 CPU

Claims (1)

[Claims] A variable attenuator disposed on a transmission path of an input signal; and a calculating means for generating a control signal in accordance with a level of the input signal, wherein the control signal controls an amount of attenuation of the variable attenuator. By doing so, in a receiver provided with an automatic gain control function, a variable amplifier whose amplification is controlled by an inverted signal of the control signal is provided at the input of the arithmetic means, A receiving unit configured to input a signal from the output of the variable attenuator to the arithmetic unit in a state where the attenuation provided by the variable attenuator is canceled by the amplification degree of the variable amplifier. Machine.