JP2001023864A - Multiple electronic part - Google Patents
Multiple electronic partInfo
- Publication number
- JP2001023864A JP2001023864A JP11194003A JP19400399A JP2001023864A JP 2001023864 A JP2001023864 A JP 2001023864A JP 11194003 A JP11194003 A JP 11194003A JP 19400399 A JP19400399 A JP 19400399A JP 2001023864 A JP2001023864 A JP 2001023864A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- multiple electronic
- functional element
- substrate
- component according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は静電容量等の電気特
性が異なる同種機能素子を複数個連結した多連型電子部
品、またはコンデンサ素子、抵抗素子、サーミスタ等の
異種機能素子を複数個組み合わせて連結した多連型電子
部品に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiple-type electronic component in which a plurality of functional elements of the same type having different electrical characteristics such as capacitance are connected, or a plurality of heterogeneous functional elements such as a capacitor element, a resistor element and a thermistor. The present invention relates to a multiple-type electronic component connected by means of a connector.
【0002】[0002]
【従来の技術】電子機器の電子回路を構成する電子部品
の小型化、軽量化と、これら機能素子の回路基板に実装
作業を容易にするために、直方体や立方体のチップ型に
形成することは良く知られている。また、実装作業を容
易にし、かつ実装密度を高める方法として図9に示す特
開平6−251993号公報が公開されている。これは
相対向する両端面に外部電極43を形成した異種または
同種の積層コンデンサ素子41の四隅部に切り欠き部4
2を設け、外部電極43を形成していない側面でお互い
どうしを半田接合時に消滅するアクリル樹脂系有機接着
剤あるいは半田接合温度で不溶解かまたは不融解のガラ
スフリット系無機接着剤などの接着剤44を介して連結
接合した多連型電子部品45である。2. Description of the Related Art In order to reduce the size and weight of electronic components constituting an electronic circuit of an electronic device and to facilitate the work of mounting these functional elements on a circuit board, it is difficult to form them into a rectangular or cubic chip type. Well known. Japanese Patent Application Laid-Open No. 6-251993 shown in FIG. 9 discloses a method for facilitating the mounting operation and increasing the mounting density. This is because the notch 4
2 and an adhesive such as an acrylic resin-based organic adhesive or a glass frit-based inorganic adhesive that is insoluble or infusible at the soldering temperature at the side where the external electrode 43 is not formed, and disappears at the time of soldering. This is a multiple electronic component 45 connected and joined via the reference numeral 44.
【0003】[0003]
【発明が解決しようとする課題】この先行技術によれ
ば、外部電極43を形成していない側面でお互いどうし
を、半田接合時に消滅する熱分解性に富んだ接着剤44
で連結接合した多連型電子部品45を回路基板上に半田
付けすると、半田付け温度で接着剤44が昇華消滅し、
隣接する積層コンデンサ素子41間に空隙ができるの
で、積層コンデンサ素子41間での浮遊容量の発生を抑
えることができる。また外部電極43を形成していない
側面を半田接合温度で不溶解または不融解のガラスフリ
ット系無機接着剤44、例えば水ガラスやガラス半田
(PbO-B2O3-ZnO2-SiO2,PbO-B2O3-ZnO2-Al2O3)で溶融接
合した多連型電子部品45は連結強度が向上し、運搬や
取り扱い時に積層コンデンサ素子41が分離する不具合
が解消できるとしている。According to this prior art, a thermally decomposable adhesive 44 which disappears at the time of solder bonding between the sides on which the external electrodes 43 are not formed is used.
When the multiple electronic component 45 connected and joined by the above is soldered on the circuit board, the adhesive 44 sublimates and disappears at the soldering temperature,
Since a gap is formed between the adjacent multilayer capacitor elements 41, generation of stray capacitance between the multilayer capacitor elements 41 can be suppressed. The external electrodes 43 insoluble or infusible glass frit-based inorganic adhesive 44 formed non side by solder bonding temperature, such as water glass or glass solder (PbO-B 2 O 3 -ZnO 2 -SiO 2, PbO It is stated that the multiple electronic component 45 melt-bonded with -B 2 O 3 -ZnO 2 -Al 2 O 3 ) has improved connection strength and can eliminate the problem that the multilayer capacitor element 41 is separated during transportation or handling.
【0004】しかしながら前記技術で有機の接着剤44
を使用した場合、積層コンデンサ素子41の外部電極4
3を形成していない薄肉の側面でお互いどうしを連結結
合するため、多連型電子部品45の抗折力が低下し取り
扱い時に積層コンデンサ素子41どうしが分離する問題
がある。一方、無機接着剤44を使用した場合は、ガラ
スフリットを溶解する加熱温度で積層コンデンサ素子4
1の外部電極43表面が劣化し、基板へ実装時に半田付
不良が発生し易いという問題があった。[0004] However, the above-mentioned technique uses an organic adhesive 44.
Is used, the external electrode 4 of the multilayer capacitor element 41 is used.
Since the thin side surfaces where no 3 is formed are connected and connected to each other, there is a problem that the bending strength of the multiple electronic component 45 is reduced and the multilayer capacitor elements 41 are separated from each other during handling. On the other hand, when the inorganic adhesive 44 is used, the multilayer capacitor element 4 is heated at a heating temperature at which the glass frit is melted.
1 has a problem that the surface of the external electrode 43 is deteriorated, and soldering failure is likely to occur at the time of mounting on the substrate.
【0005】本発明は前記従来の問題点を解決する多連
型電子部品を提供することを目的とするものである。An object of the present invention is to provide a multiple electronic component which solves the above-mentioned conventional problems.
【0006】[0006]
【課題を解決するための手段】前記目的を達成するため
に本発明は、単一の基板上に複数個の機能素子を配置し
た多連型電子部品において、前記機能素子は相対向する
両端面に露出した内部電極の端部と電気的に接続し、か
つ上下主平面に折り返された外部電極が前記両端面の中
央部に設けられており、前記機能素子どうしは上下主平
面の何れか一方の面を熱硬化型接着剤で基板上に連結結
合された多連型電子部品である。この構成により、多連
型電子部品は機能素子の薄肉の側面でお互いどうしを接
着する方法に比べて抗折力が大きくなると共に、基板側
を加熱することで各機能素子と基板とを強固に連結接着
することができる。また各機能素子の上下いずれかの一
方の面に基板を接着するため、多連型電子部品を回路基
板に半田実装する側の外部電極折り返し部分は加熱によ
る影響が少なく、表面の劣化が無いので半田付性を低下
させることはなくなる。In order to achieve the above object, the present invention provides a multiple-type electronic component having a plurality of functional elements arranged on a single substrate, wherein the functional elements are opposed to each other on opposite end faces. An external electrode electrically connected to the end of the internal electrode exposed to the outside, and an external electrode folded on the upper and lower main planes is provided at the center of the both end faces, and the functional elements are connected to one of the upper and lower main planes. Is a multiple-type electronic component in which the surface is connected and bonded on a substrate with a thermosetting adhesive. With this configuration, the multiple-type electronic component has a greater bending strength than a method of bonding the functional elements to each other on the thin side surfaces, and the functional element and the substrate are firmly connected by heating the substrate side. Can be connected and bonded. In addition, since the board is bonded to one of the upper and lower surfaces of each functional element, the external electrode folded part on the side where multiple electronic components are solder-mounted on the circuit board is less affected by heating, and there is no deterioration of the surface. The solderability is not reduced.
【0007】[0007]
【発明の実施の形態】本発明の請求項1に記載の発明
は、単一の基板上に複数個の機能素子を配置した多連型
電子部品において、前記機能素子は相対向する両端面に
露出した内部電極の端部と電気的に接続し、かつ上下主
平面に折り返された外部電極が前記両端面の中央部に設
けられており、前記機能素子どうしは上下主平面の何れ
か一方の面を熱硬化型接着剤で基板上に連結結合した多
連型電子部品であり、これにより各機能素子の薄肉の側
面でお互いどうしを接着剤で接着する場合に比べて抗折
力が大きくなると共に、基板側を加熱することで接着剤
を硬化させ各機能素子と基板とを接着することができる
ので、完成した多連型電子部品を回路基板へ実装する際
に、回路基板と接する各機能素子の基板と反対側に折り
返された外部電極は樹脂硬化時の熱の影響が少なくな
り、外部電極と回路基板との半田付性を低下させないと
いう作用を有するものである。DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to claim 1 of the present invention is directed to a multiple-type electronic component in which a plurality of functional elements are arranged on a single substrate, wherein the functional elements are provided on opposite end faces. An external electrode electrically connected to the exposed end of the internal electrode and folded back to the upper and lower main planes is provided at the center of the both end faces, and the functional elements are connected to one of the upper and lower main planes. This is a multiple-type electronic component whose surface is connected and bonded to the substrate with a thermosetting adhesive, which increases the bending strength compared to the case where the thin side surfaces of each functional element are bonded to each other with an adhesive. At the same time, by heating the board side, the adhesive can be cured and the functional elements can be bonded to the board, so when mounting the completed multiple-type electronic component on the circuit board, each function that comes into contact with the circuit board The external electrode folded on the opposite side of the device substrate Thermal effects during fat hardening is reduced and has an effect of not lowering the solderability of the external electrode and the circuit board.
【0008】本発明の請求項2に記載の発明は、基板と
機能素子とを150℃より低い温度で硬化する接着剤を
用いて接着した請求項1に記載の多連型電子部品であ
り、これは各機能素子と基板とを接着する際に、機能素
子の外部電極に対する熱の影響を小さくし、回路基板へ
実装する際に、外部電極と回路基板との半田付性を低下
させないようにできる。According to a second aspect of the present invention, there is provided the multiple electronic component according to the first aspect, wherein the substrate and the functional element are bonded by using an adhesive which is cured at a temperature lower than 150 ° C. This is to reduce the effect of heat on the external electrodes of the functional element when bonding each functional element to the board, and not to reduce the solderability between the external electrodes and the circuit board when mounting on the circuit board. it can.
【0009】本発明の請求項3に記載の発明は、基板と
機能素子とを、機能素子の構成材料の誘電率より低い誘
電率の接着剤を用いて接着した請求項1または請求項2
に記載の多連型電子部品である。これは、隣り合う各機
能素子間及び基板間で発生する浮遊静電容量をより小さ
くするという作用を有するものである。According to a third aspect of the present invention, the substrate and the functional element are bonded by using an adhesive having a dielectric constant lower than the dielectric constant of the constituent material of the functional element.
2. A multiple electronic component according to (1). This has the effect of reducing stray capacitance generated between adjacent functional elements and between substrates.
【0010】本発明の請求項4に記載の発明は、基板と
機能素子とを、機能素子の構成材料の絶縁抵抗より高い
絶縁抵抗を有する接着剤を用いて接着した請求項1から
請求項3の何れか1つに記載の多連型電子部品であり、
これは各機能素子の基板側に接する主平面に折り返した
対向する外部電極間及び隣り合う機能素子の外部電極間
の表面絶縁抵抗が低下するのを防止することができる。According to a fourth aspect of the present invention, the substrate and the functional element are bonded using an adhesive having an insulation resistance higher than the insulation resistance of the constituent material of the functional element. A multiple electronic component according to any one of the above,
This can prevent the surface insulation resistance between the opposing external electrodes folded on the main plane in contact with the substrate side of each functional element and between the external electrodes of the adjacent functional elements from decreasing.
【0011】本発明の請求項5に記載の発明は、基板の
表面に機能素子個々の特性を表示した請求項1から請求
項4の何れか1つに記載の多連型電子部品であり、これ
は各機能素子の諸特性を測定機で確認することなく、目
視で容易に識別できる。According to a fifth aspect of the present invention, there is provided the multiple electronic component according to any one of the first to fourth aspects, wherein the characteristics of each of the functional elements are displayed on the surface of the substrate. This can be easily identified visually without checking various characteristics of each functional element with a measuring instrument.
【0012】本発明の請求項6に記載の発明は、基板が
絶縁体である請求項1から請求項5の何れか1つに記載
の多連型電子部品であり、これは各機能素子の基板側に
接する主平面に折り返した対向する外部電極間及び隣り
合う機能素子の外部電極間の表面絶縁抵抗が低下するの
を防止する。According to a sixth aspect of the present invention, there is provided the multiple electronic component according to any one of the first to fifth aspects, wherein the substrate is an insulator. It is possible to prevent the surface insulation resistance between the external electrodes facing each other folded on the main plane in contact with the substrate side and between the external electrodes of the adjacent functional elements from decreasing.
【0013】本発明の請求項7に記載の発明は、基板が
上下主平面に折り返した機能素子の外部電極端部と接し
ないように接着剤で接着した請求項1から請求項6の何
れか1つに記載の多連型電子部品であり、これは基板側
を加熱し接着剤を硬化させる際に外部電極に対する熱の
影響を小さくする。According to a seventh aspect of the present invention, the substrate is bonded with an adhesive so that the substrate does not come into contact with the ends of the external electrodes of the functional element folded on the upper and lower main planes. The multiple electronic component according to one of the aspects described above reduces the influence of heat on the external electrodes when the substrate side is heated to cure the adhesive.
【0014】本発明の請求項8に記載の発明は、基板が
上下主平面に折り返した機能素子の外部電極端部の厚さ
より厚いものを用いた請求項1から請求項7の何れか1
つに記載の多連型電子部品であり、これは基板側を加熱
し接着剤を硬化させる際に外部電極に対する熱の影響を
小さくする。According to the invention described in claim 8 of the present invention, the functional element whose substrate is folded on the upper and lower main planes is thicker than the thickness of the end of the external electrode of the functional element.
The multiple-type electronic component described in (1) reduces the influence of heat on the external electrodes when the substrate side is heated to cure the adhesive.
【0015】本発明の請求項9に記載の発明は、基板に
方向表示部を設けた請求項1から請求項8の何れか1つ
に記載の多連型電子部品であり、これは各機能素子を基
板上の所定の位置に確実に配置することができると共
に、完成した多連型電子部品を回路基板に実装する際の
方向性を目視で確認できる。According to a ninth aspect of the present invention, there is provided the multiple electronic component according to any one of the first to eighth aspects, wherein a direction indicator is provided on the substrate. The element can be reliably arranged at a predetermined position on the board, and the direction of mounting the completed multiple electronic component on the circuit board can be visually confirmed.
【0016】本発明の請求項10に記載の発明は、機能
素子の上下主平面方向の厚さと、幅方向の厚さを異なら
せた請求項1から請求項9の何れか1つに記載の多連型
電子部品であり、これは各機能素子の厚み方向と幅方向
を確実に区別することができるので、基板上に機能素子
を正しく整列配置することができる。According to a tenth aspect of the present invention, the thickness of the functional element in the upper and lower main plane directions and the thickness in the width direction are different from each other. This is a multiple-type electronic component. Since the thickness direction and the width direction of each functional element can be reliably distinguished from each other, the functional elements can be correctly aligned on the substrate.
【0017】本発明の請求項11に記載の発明は、機能
素子の上下主平面方向の厚さを幅方向の厚さより厚くし
た請求項1から請求項10の何れか1つに記載の多連型
電子部品であり、これは各機能素子の一方の主平面が基
板に接するように接着することにより、他方の主面に折
り返した外部電極の半田付け箇所が接着時の熱の影響が
少なくなり半田付性を低下させなくすると共に、完成品
の多連型電子部品を回路基板に実装する際、外部電極の
半田付け箇所と基板の間隔が長くなり、基板との接着面
が半田付けの熱で剥離するのを防止する。According to an eleventh aspect of the present invention, in the multiple unit according to any one of the first to tenth aspects, the thickness of the functional element in the upper and lower main plane directions is greater than the thickness in the width direction. This is a type electronic component, which is bonded so that one main surface of each functional element is in contact with the substrate, so that the soldered part of the external electrode folded back on the other main surface is less affected by heat during bonding. In addition to preventing the solderability from deteriorating, when mounting the completed multiple electronic component on the circuit board, the distance between the soldering location of the external electrodes and the board becomes longer, and the bonding surface with the board becomes less hot. To prevent peeling.
【0018】本発明の請求項12に記載の発明は、機能
素子を構成する内部電極の端部の幅を、機能素子内部に
形成した内部電極の幅より狭くした請求項1から請求項
11の何れか1つに記載の多連型電子部品であり、これ
は機能素子の内部電極の有効面積を広くし、端面に露出
した端部のみを狭くすることで、機能素子の性能を落と
すことなく、端部と電気的に接続する外部電極の幅を狭
くしても、内部電極との接続の信頼性を確保し、しかも
隣り合う外部電極間の間隔を広くし短絡を防止する。According to a twelfth aspect of the present invention, the width of the end of the internal electrode constituting the functional element is smaller than the width of the internal electrode formed inside the functional element. The multiple electronic component according to any one of the above, which increases the effective area of the internal electrode of the functional element and narrows only the end exposed on the end face, without deteriorating the performance of the functional element. Even if the width of the external electrode electrically connected to the end is reduced, the reliability of the connection with the internal electrode is ensured, and the interval between adjacent external electrodes is widened to prevent a short circuit.
【0019】本発明の請求項13に記載の発明は、機能
素子を構成する内部電極の端部の幅を外部電極の幅より
狭くした請求項1から請求項12の何れか1つに記載の
多連型電子部品であり、これは機能素子の端面に露出し
た内部電極の端部全体を外部電極で確実に覆い、端部と
の電気的接続の信頼性を向上させると共に、機能素子を
外部電極形成後にその表面にメッキ処理を施す場合、メ
ッキ液が内部電極端部から素体内に浸入するのを防止す
る。According to a thirteenth aspect of the present invention, the width of the end of the internal electrode constituting the functional element is smaller than the width of the external electrode. It is a multiple-type electronic component, which completely covers the entire end of the internal electrode exposed on the end face of the functional element with an external electrode, improves the reliability of electrical connection with the end, and externally connects the functional element. When a plating process is performed on the surface after the electrode is formed, it is possible to prevent the plating solution from entering the body from the end of the internal electrode.
【0020】本発明の請求項14に記載の発明は、機能
素子を構成する内部電極の端部と接続する外部電極を、
端部の面に対し垂直に形成した請求項1から請求項13
の何れか1つに記載の多連型電子部品であり、これは機
能素子の端面に露出した内部電極端部の全てと、外部電
極との電気的接続の信頼性を向上させる。According to a fourteenth aspect of the present invention, an external electrode connected to an end of an internal electrode constituting a functional element is provided.
14. The device according to claim 1, which is formed perpendicular to an end surface.
The multiple-type electronic component according to any one of the above, improves reliability of electrical connection between all of the internal electrode ends exposed on the end surface of the functional element and the external electrodes.
【0021】本発明の請求項15に記載の発明は、機能
素子の各稜部の面取りをした請求項1から請求項14の
何れか1つに記載の多連型電子部品であり、これは各機
能素子を基板上に接着したとき、隣接する機能素子の面
取りした稜部間が溝状となり、その部分に接着剤が回り
込み接着の信頼性を高めると共に、完成品の多連型電子
部品を回路基板に半田実装した場合、隣接する外部電極
間の空間距離が広くなり、短絡等の不具合の発生を防止
する。According to a fifteenth aspect of the present invention, there is provided the multiple electronic component according to any one of the first to fourteenth aspects, wherein each edge of the functional element is chamfered. When each functional element is bonded onto the substrate, the gap between the chamfered ridges of adjacent functional elements becomes a groove. When mounted on a circuit board by soldering, the spatial distance between adjacent external electrodes is increased, and problems such as short circuits are prevented.
【0022】本発明の請求項16に記載の発明は、機能
素子の外部電極の幅を、隣合う機能素子の外部電極どう
しの間隔より狭く形成した請求項1から請求項15の何
れか1つに記載の多連型電子部品であり、これによって
隣り合う機能素子の外部電極間の間隔が広くなり、完成
品の多連型電子部品を回路基板に実装した際、隣り合う
外部電極間で半田ブリッヂによる短絡を防止することが
できる。According to a sixteenth aspect of the present invention, the width of the external electrode of the functional element is smaller than the distance between the external electrodes of the adjacent functional elements. In this way, the distance between external electrodes of adjacent functional elements is increased, and when the completed multiple electronic component is mounted on a circuit board, soldering between adjacent external electrodes is performed. A short circuit due to a bridge can be prevented.
【0023】本発明の請求項17に記載の発明は、個々
の機能素子が積層コンデンサ素子である請求項1から請
求項16の何れか1つに記載の多連型電子部品であり、
これによって同特性、または異なる特性の積層コンデン
サ素子を複数連結した多連型積層コンデンサを提供する
ことが可能となる。According to a seventeenth aspect of the present invention, there is provided the multiple electronic component according to any one of the first to sixteenth aspects, wherein each functional element is a multilayer capacitor element.
As a result, it is possible to provide a multi-layer type multilayer capacitor in which a plurality of multilayer capacitor elements having the same or different characteristics are connected.
【0024】本発明の請求項18に記載の発明は、個々
の機能素子が抵抗体素子である請求項1から請求項16
の何れか1つに記載の多連型電子部品であり、これによ
って同特性または異なる特性の抵抗素子を複数連結した
多連型抵抗を提供することが可能となる。According to the invention described in claim 18 of the present invention, each of the functional elements is a resistor element.
The multiple electronic component according to any one of the above, whereby it is possible to provide a multiple resistor in which a plurality of resistance elements having the same or different characteristics are connected.
【0025】本発明の請求項19に記載の発明は、個々
の機能素子がサーミスタ素子である請求項1から請求項
16の何れか1つに記載の多連型電子部品であり、これ
によって同特性または異なる特性のサーミスタ素子を複
数連結した多連型サーミスタを提供することが可能とな
る。According to a nineteenth aspect of the present invention, there is provided a multiple electronic component according to any one of the first to sixteenth aspects, wherein each functional element is a thermistor element. It is possible to provide a multiple thermistor in which a plurality of thermistor elements having different or different characteristics are connected.
【0026】本発明の請求項20に記載の発明は、積層
コンデンサ素子、抵抗体素子またはサーミスタ素子の機
能素子を組み合わせて基板上に接着した請求項1から請
求項19の何れか1つに記載の多連型電子部品であり、
これにより電気特性の異なる電子部品を複数組み合わせ
て連結した多連型電子部品を提供することが可能とな
る。According to a twentieth aspect of the present invention, there is provided any one of the first to nineteenth aspects, wherein a functional element such as a multilayer capacitor element, a resistor element or a thermistor element is combined and adhered on a substrate. Of multiple electronic components,
This makes it possible to provide a multiple-type electronic component in which a plurality of electronic components having different electrical characteristics are combined and connected.
【0027】以下、本発明の一実施の形態の多連型電子
部品について、多連型積層セラミックコンデンサ(以
降、積層コンデンサと称する)を用いて説明する。Hereinafter, a multiple electronic component according to an embodiment of the present invention will be described using a multiple multilayer ceramic capacitor (hereinafter, referred to as a multilayer capacitor).
【0028】図1は積層コンデンサ素子のグリーンチッ
プの斜視図、図2はその展開図、図3は面取り後の積層
コンデンサ焼結体、図4は積層コンデンサ素子の斜視
図、図5は多連型積層コンデンサの展開図、図6は多連
型積層コンデンサの斜視図、図7は多連型積層コンデン
サの平面図、図8は多連型積層コンデンサの側面図であ
る。FIG. 1 is a perspective view of a green chip of a multilayer capacitor element, FIG. 2 is a development view thereof, FIG. 3 is a multilayer capacitor sintered body after chamfering, FIG. 4 is a perspective view of the multilayer capacitor element, and FIG. FIG. 6 is a perspective view of the multiple laminated capacitor, FIG. 7 is a plan view of the multiple laminated capacitor, and FIG. 8 is a side view of the multiple laminated capacitor.
【0029】図において、1はグリーンチップ、2はセ
ラミック誘電体層、3は内部電極、4は内部電極3の端
部、5は上部無効層、6は下部無効層、7は面取り後の
焼結体、8は平面、9は端面、10は側面、11は外部
電極、12,13,14,15は積層コンデンサ素子、
16は接着剤、17は基板、18は捺印、19は多連型
積層コンデンサ、20は切り欠き部である。In the figure, 1 is a green chip, 2 is a ceramic dielectric layer, 3 is an internal electrode, 4 is an end portion of the internal electrode 3, 5 is an upper ineffective layer, 6 is a lower ineffective layer, and 7 is a firing after chamfering. 8 is a plane, 9 is an end face, 10 is a side face, 11 is an external electrode, 12, 13, 14, and 15 are multilayer capacitor elements,
Reference numeral 16 denotes an adhesive, reference numeral 17 denotes a substrate, reference numeral 18 denotes a seal, reference numeral 19 denotes a multi-layered multilayer capacitor, and reference numeral 20 denotes a cutout.
【0030】先ず、公知の積層セラミックコンデンサの
製造方法を用い、セラミック誘電体層2のグリーンシー
トを作製する。First, a green sheet of the ceramic dielectric layer 2 is manufactured by using a known method of manufacturing a multilayer ceramic capacitor.
【0031】次に作製したセラミック誘電体層2のグリ
ーンシートを複数枚積層し上部無効層5、下部無効層6
を作製する。Next, a plurality of green sheets of the ceramic dielectric layer 2 produced are laminated to form an upper ineffective layer 5 and a lower ineffective layer 6.
Is prepared.
【0032】次いで、下部無効層6面にセラミック誘電
体層2のグリーンシートを積層し、その上に第一層目の
内部電極3層を印刷した後、第一層目の内部電極3層の
上にセラミック誘電体層2のグリーンシートを積層し、
その面に第一層目の内部電極3層と対になる第二層目の
内部電極3層を印刷する。更にその上にセラミック誘電
体層2のグリーンシートを積層した後、その面に第一層
目と同じ第三層目の内部電極3層を印刷する。続いてそ
の上にセラミック誘電体層2のグリーンシートを積層し
た後、第二層目と同じ第四層目の内部電極3層を印刷す
る。Next, a green sheet of the ceramic dielectric layer 2 is laminated on the surface of the lower ineffective layer 6, and the first three internal electrodes are printed thereon. A green sheet of the ceramic dielectric layer 2 is laminated thereon,
On the surface, a second layer of internal electrodes, which is paired with the first layer of internal electrodes, is printed. Further, after laminating a green sheet of the ceramic dielectric layer 2 thereon, the third inner electrode layer, which is the same as the first layer, is printed on the surface. Subsequently, after laminating a green sheet of the ceramic dielectric layer 2 thereon, the third internal electrode layer of the fourth layer same as the second layer is printed.
【0033】このようにして順次、セラミック誘電体層
2のグリーンシートの積層と、内部電極3層の印刷を交
互に所定数積層した後、最後に上部無効層5を重ねて加
圧積層して積層体グリーンブロック(図示せず)を作製
する。この時、奇数層の内部電極3と偶数層の内部電極
3は一方の端部4を、図2に示すように内部電極3より
狭く形成する。In this manner, a predetermined number of green sheets of the ceramic dielectric layer 2 and a printing of three internal electrodes are alternately laminated, and then the upper ineffective layer 5 is finally laminated under pressure. A laminated green block (not shown) is prepared. At this time, one end 4 of the odd-numbered internal electrodes 3 and the even-numbered internal electrodes 3 is formed to be narrower than the internal electrodes 3 as shown in FIG.
【0034】その後、積層体グリーンブロックを図1に
示すグリーンチップ1の形状に切断する。切断されたグ
リーンチップ1は、奇数層目の内部電極3層の端部4が
セラミック誘電体層2を挟んで一層おきに一方の端面9
に、偶数目の内部電極3層の端部4がセラミック誘電体
層2を挟んで一層おきに相対向する他端面9に交互に露
出する構造となっている。Thereafter, the laminated green block is cut into the shape of the green chip 1 shown in FIG. In the cut green chip 1, the end portions 4 of the odd-numbered internal electrode 3 layers are alternately provided with one end surface 9 at every other side of the ceramic dielectric layer 2.
In addition, the end portions 4 of the even-numbered three internal electrodes are alternately exposed on the other end surfaces 9 opposed to each other with the ceramic dielectric layer 2 interposed therebetween.
【0035】次に、グリーンチップを所定温度で焼成し
焼結体(図示せず)を作製する。Next, the green chip is fired at a predetermined temperature to produce a sintered body (not shown).
【0036】次いで、得られた焼結体をバレル研磨で面
取りし、焼結体の内部に形成した内部電極3の端部4を
焼結体7の端面9にそれぞれ露出させた後、図4に示す
ような露出した内部電極3の端部4全体を覆うようにし
て電気的に接続し、かつ上下平面8に折り返した外部電
極11を対向する両端面9の中央部に形成し、幅が0.
8mm、厚みが1.0mm、長さが1.6mmの積層コ
ンデンサ素子12を完成した。この時、外部電極11は
内部電極3の積層方向と垂直に交わり、かつ焼結体7の
端面9に露出した総ての端部4全体を覆うように形成
し、内部電極3との接続の信頼性を確保すると共に、外
部電極11の表面にメッキ処理を施す際に、メッキ液が
端部4に沿って焼結体7の内部に浸入するのを防止する
ようにしている。Next, the obtained sintered body is chamfered by barrel polishing to expose the end portions 4 of the internal electrodes 3 formed inside the sintered body to the end surfaces 9 of the sintered body 7, respectively. As shown in FIG. 2, an external electrode 11 which is electrically connected so as to cover the entire end 4 of the exposed internal electrode 3 and which is folded back on the upper and lower planes 8 is formed at the center of both end faces 9 facing each other. 0.
A multilayer capacitor element 12 having a thickness of 8 mm, a thickness of 1.0 mm, and a length of 1.6 mm was completed. At this time, the external electrodes 11 are formed so as to intersect perpendicularly with the laminating direction of the internal electrodes 3 and to cover all the end portions 4 exposed on the end face 9 of the sintered body 7. In addition to ensuring reliability, when plating the surface of the external electrode 11, the plating solution is prevented from entering the inside of the sintered body 7 along the end 4.
【0037】前記製造方法に従って、誘電率の異なるセ
ラミック材料を用い内部電極3の有効重なり面積とセラ
ミック誘電体層2の厚みとを変えた電気特性の異なる積
層コンデンサ素子13,14,15をそれぞれ作製し
た。According to the above-described manufacturing method, multilayer capacitor elements 13, 14, and 15 having different electrical characteristics by changing the effective overlapping area of the internal electrode 3 and the thickness of the ceramic dielectric layer 2 using ceramic materials having different dielectric constants are manufactured. did.
【0038】続いて、方向性を示す切り欠き部20を設
け、積層コンデンサ素子12〜15の外部電極11の端
部の厚さより厚く、しかも平面8に折り返した対向する
外部電極11間の端部の間隔より狭いガラスエポキシ製
の基板17上に、誘電率が5.1で体積抵抗率が4×1
014Ωcmのアクリル樹脂を主成分とする熱硬化型接着
剤16を塗布し、その上に積層コンデンサ素子12〜1
5の一方の平面8が接するように並列方向に並べ、紫外
線(80w/cm)を約10秒間照射し仮硬化させた
後、反転し基板17面を150℃の温度で約10秒間加
熱して硬化させた。尚、接着剤16の誘電率、体積抵抗
率の値については特に限定するものではない。また硬化
温度は100〜150℃の範囲が好ましい。Subsequently, a notch 20 indicating the directionality is provided, and the end portion between the opposing external electrodes 11 which is thicker than the end portions of the external electrodes 11 of the multilayer capacitor elements 12 to 15 and which is folded back on the plane 8 is provided. On a glass-epoxy substrate 17 narrower than the spacing of 5.1, the dielectric constant is 5.1 and the volume resistivity is 4 × 1.
0 14 acrylic resin by applying a thermosetting adhesive 16 mainly composed of [Omega] cm, the multilayer capacitor element thereon 1:12
5 are arranged in parallel so that one of the planes 8 is in contact with each other, irradiated with ultraviolet rays (80 w / cm) for about 10 seconds, temporarily cured, and then inverted to heat the surface of the substrate 17 at a temperature of 150 ° C. for about 10 seconds. Cured. The values of the dielectric constant and the volume resistivity of the adhesive 16 are not particularly limited. The curing temperature is preferably in the range of 100 to 150 ° C.
【0039】その後、基板17面に接着した積層コンデ
ンサ素子12〜15各々の特性を捺印18表示して図6
に示すような多連型積層コンデンサ19を完成させた。Thereafter, the characteristics of each of the multilayer capacitor elements 12 to 15 adhered to the surface of the substrate 17 are marked 18 to display FIG.
As a result, a multiple-layered multilayer capacitor 19 as shown in FIG.
【0040】尚、積層コンデンサ素子12〜15は、幅
が0.8mm、厚みが1.0mm、長さが1.6mmの
ものを用いているため、幅方向の厚さと平面8方向の厚
み方向を容易に識別でき基板17上に平面8が密着する
ように、それぞれ並列方向に配置することができるとと
もに、基板17は方向性を示す切り欠き部20を設けて
いるため電気特性の異なる積層コンデンサ素子12〜1
5を所定の位置に確実に並べることができる。Since the multilayer capacitor elements 12 to 15 have a width of 0.8 mm, a thickness of 1.0 mm and a length of 1.6 mm, the thickness in the width direction and the thickness in the plane 8 direction are used. Can be easily identified, and the planes 8 can be arranged in parallel so that the planes 8 are in close contact with each other. Element 12-1
5 can be reliably arranged in a predetermined position.
【0041】更に、外部電極11の端部の厚さより厚い
基板17を平面8に折り返した対向する外部電極11間
の端部と接しないように接着しているため、多連型積層
コンデンサ19を回路基板に半田実装するとき、積層コ
ンデンサ素子12〜15の基板17と反対面の半田付け
を行う外部電極11の箇所は、接着剤16の硬化時の熱
で表面が劣化し半田付性を悪化させることを防止するこ
とが可能となる。また更に、積層コンデンサ素子12〜
15は基板17と確実に接着されているので、運搬や、
取り扱い時に積層コンデンサ素子12〜15が基板17
から分離することが無くなる。Furthermore, since the substrate 17 thicker than the end of the external electrode 11 is adhered so as not to contact the end between the opposing external electrodes 11 turned back to the plane 8, the multiple type multilayer capacitor 19 is mounted. When soldering to a circuit board, the surface of the external electrode 11 to be soldered on the surface opposite to the board 17 of the multilayer capacitor elements 12 to 15 is deteriorated in surface by heat at the time of curing of the adhesive 16 and solderability is deteriorated. Can be prevented. Furthermore, the multilayer capacitor elements 12 to
Since 15 is securely bonded to the substrate 17, it can be transported,
When handling, the multilayer capacitor elements 12 to 15
No more separation from
【0042】更には、接着剤16の誘電率がセラミック
材料の誘電率に比べ小さい5.1のアクリル系樹脂を用
いているため、積層コンデンサ素子12〜15間及び基
板17間の浮遊静電容量を小さく抑制することができ
る。また、絶縁抵抗がセラミック材料の絶縁抵抗に比べ
て大きい4×1014Ωcmを用い、しかも基板17はガ
ラスエポキシを用いているので、基板17を挟んで対向
する外部電極11間の表面絶縁抵抗を低下すること無
く、外部電極11間のマイグレーションや短絡ショート
を防止することができる。Further, since the adhesive 16 uses an acrylic resin whose dielectric constant is smaller than the dielectric constant of the ceramic material, the stray capacitance between the multilayer capacitor elements 12 to 15 and between the substrates 17 is reduced. Can be suppressed small. In addition, since 4 × 10 14 Ωcm, which is larger than the insulation resistance of the ceramic material, is used for the substrate 17 and glass epoxy is used for the substrate 17, the surface insulation resistance between the external electrodes 11 opposed to each other with the substrate 17 interposed therebetween is reduced. Without lowering, it is possible to prevent migration or short circuit between the external electrodes 11.
【0043】多連型コンデンサ19は、積層コンデンサ
素子12〜15の稜部を面取りしているため、隣り合う
積層コンデンサ素子12〜15間に溝状の空隙が生じ、
接着剤16がこれに回り込み基板17に強固に接着され
ると共に、隣り合う外部電極11どうしの間隔より狭く
形成する外部電極11どうし間の距離がより広くなり、
回路基板へ実装した際、隣り合う外部電極11間で半田
ブリッヂによる短絡を防止することができる。In the multiple capacitor 19, since the ridges of the multilayer capacitor elements 12 to 15 are chamfered, a groove-like gap is generated between the adjacent multilayer capacitor elements 12 to 15,
The adhesive 16 wraps around this and is firmly adhered to the substrate 17, and the distance between the external electrodes 11 formed narrower than the distance between the adjacent external electrodes 11 becomes wider,
When mounted on a circuit board, a short circuit due to a solder bridge between adjacent external electrodes 11 can be prevented.
【0044】特性表示の捺印18において、Cはコンデ
ンサ素子、Hは定格50V、Kは許容差±10%、Bは
B特性、102は1nF、152は1.5nF、222
は2.2nF、103は10nFを表している。In the seal 18 of the characteristic display, C is a capacitor element, H is a rated voltage of 50 V, K is a tolerance ± 10%, B is a B characteristic, 102 is 1 nF, 152 is 1.5 nF, and 222
Represents 2.2 nF and 103 represents 10 nF.
【0045】本実施の形態において機能素子に積層コン
デンサ素子12〜15のみの組み合わせで多連型電子部
品を形成したが、抵抗体素子、サーミスタ素子等の機能
素子を組み合わせた複合体で構成することもできる。In the present embodiment, the multiple electronic components are formed by combining only the multilayer capacitor elements 12 to 15 with the functional elements. However, the multiple electronic parts are formed by combining functional elements such as resistor elements and thermistor elements. Can also.
【0046】このようにして作製した本発明の多連型積
層コンデンサ19と、従来例の多連型積層コンデンサ
(無機系接着剤を使用)について半田付性と抗折力強度
を比較調査し、その結果を(表1)(表2)に示した。The multi-layered multilayer capacitor 19 of the present invention manufactured in this way and the conventional multi-layered multilayer capacitor (using an inorganic adhesive) were compared with each other in terms of solderability and bending strength. The results are shown in (Table 1) and (Table 2).
【0047】[0047]
【表1】 [Table 1]
【0048】半田付けはそれぞれ10個の多連型コンデ
ンサ19,45を所定の回路基板に、260℃リフロー
半田槽に浸漬して行い、評価方法は多連型コンデンサ1
9,45の総ての外部電極11,43面が面積比で3分
の1以上半田で覆われた場合を(○)、1箇所でも3分
の1未満のものがあった場合は(×)とした。The soldering is performed by immersing ten multiple capacitors 19 and 45 on a predetermined circuit board in a 260 ° C. reflow solder bath, respectively.
The case where all the external electrodes 11 and 43 surfaces of 9, 45 were covered with the solder by one third or more in terms of area ratio (○), and the case where at least one of the external electrodes 11 and 43 was less than one third (×) ).
【0049】(表1)に示したように、本発明品は10
個総ての半田付性が(○)であるのに対して、従来例は
4個の(×)があった。これは従来例の無機系接着剤4
4は、水ガラスやガラス半田((PbO-B2O3-ZnO2-SiO2,P
bO-B2O3-ZnO2-Al2O3)を使用しているため、それを溶解
し積層コンデンサ素子41どうしを接着させるには20
0℃以上の加熱処理が必要となり、その温度で外部電極
43表面が熱劣化し半田付性不良(×)が4個発生した
ものと思われる。As shown in Table 1, the product of the present invention was 10
While the solderability of all the pieces was (o), the conventional example had four (x). This is the conventional inorganic adhesive 4
4, water glass or glass solder ((PbO-B 2 O 3 -ZnO 2 -SiO 2, P
Since bO—B 2 O 3 —ZnO 2 —Al 2 O 3 ) is used, it takes 20 to dissolve it and bond the multilayer capacitor elements 41 together.
It is considered that a heat treatment of 0 ° C. or more was required, and at that temperature, the surface of the external electrode 43 was thermally degraded, and four poor solderability (×) were generated.
【0050】本発明品は紫外線(80w/cm)を約1
0秒間照射し仮硬化させた後、150℃で約10秒の短
時間基板17側を加熱硬化させるため、外部電極11の
表面が熱劣化しなく半田付不良が発生しない。更に積層
コンデンサ素子12〜15の半田付けを行う外部電極1
1の端部と基板17との間隔が広いため、熱分解性に富
んだアクリル系の接着剤を用いても、半田付け時の熱で
基板17との接着面が剥離していないことが確認されて
いる。The product of the present invention emits ultraviolet rays (80 w / cm) for about 1
Since the substrate 17 is heated and cured at 150 ° C. for about 10 seconds for a short time after irradiating for 0 second and temporarily curing, the surface of the external electrode 11 is not thermally degraded and no soldering failure occurs. Further, an external electrode 1 for soldering the multilayer capacitor elements 12 to 15
Since the distance between the edge of the substrate 1 and the substrate 17 is wide, it was confirmed that the adhesive surface with the substrate 17 was not peeled off by heat during soldering even when an acrylic adhesive having high thermal decomposability was used. Have been.
【0051】[0051]
【表2】 [Table 2]
【0052】(表2)に示すように、本発明品の抗折力
強度の平均値は5.57kgであるのに対し、従来例で
は2.48kgと小さな値を示した。これは従来例は、
積層コンデンサ素子41の外部電極43が形成していな
い薄肉の側面でお互いどうしを接着しているため本発明
品より小さい。本発明はガラスエポキシ製の基板17に
積層コンデンサ素子12〜15を接着剤16で接着して
いるため抗折力強度が従来例より遥かに大きなものとな
ることは明らかである。As shown in Table 2, the average value of the transverse rupture strength of the product of the present invention was 5.57 kg, whereas the conventional example showed a small value of 2.48 kg. This is a conventional example,
The laminated capacitor element 41 is smaller than the product of the present invention because it is bonded to each other on the thin side surfaces where the external electrodes 43 are not formed. In the present invention, since the multilayer capacitor elements 12 to 15 are adhered to the glass epoxy substrate 17 with the adhesive 16, it is clear that the transverse rupture strength is much larger than that of the conventional example.
【0053】[0053]
【発明の効果】以上本発明によれば、単一の基板上に複
数個の機能素子を配置した多連型電子部品において、機
能素子は相対向する両端面に露出した内部電極の端部全
体を覆うように電気的に接続し、かつ上下主平面に折り
返された外部電極が両端面の中央部に設けられており、
機能素子どうしは上下主平面の何れか一方の面を熱硬化
型接着剤で基板上に連結結合することで、多連型電子部
品の抗折力が大きくなると共に、完成品を回路基板に半
田実装する際に、半田付性を低下させない信頼性の高い
多連型電子部品を提供することが可能となる。As described above, according to the present invention, in a multiple-type electronic component in which a plurality of functional elements are arranged on a single substrate, the functional elements are entirely exposed at the end portions of the internal electrodes exposed at opposite end faces. External electrodes electrically connected so as to cover the upper and lower main planes are provided at the center of both end faces,
By connecting one of the upper and lower principal planes to the board with a thermosetting adhesive, the bending strength of the multiple electronic components is increased, and the finished product is soldered to the circuit board. When mounting, it is possible to provide a highly reliable multiple electronic component that does not reduce solderability.
【図1】本発明の一実施の形態の積層セラミックコンデ
ンサ素子のグリーンチップの斜視図FIG. 1 is a perspective view of a green chip of a multilayer ceramic capacitor element according to an embodiment of the present invention.
【図2】同グリーンチップの展開斜視図FIG. 2 is an exploded perspective view of the green chip.
【図3】同面取り後の焼結体の斜視図FIG. 3 is a perspective view of the sintered body after the chamfering.
【図4】同積層セラミックコンデンサ素子の斜視図FIG. 4 is a perspective view of the multilayer ceramic capacitor element.
【図5】同多連型積層セラミックコンデンサの展開斜視
図FIG. 5 is an exploded perspective view of the multiple-layer ceramic capacitor.
【図6】同多連型積層セラミックコンデンサの完成品の
斜視図FIG. 6 is a perspective view of a completed product of the multiple-layer ceramic capacitor.
【図7】同多連型積層セラミックコンデンサの完成品の
平面図FIG. 7 is a plan view of a completed product of the multi-layer ceramic capacitor.
【図8】同、多連型積層セラミックコンデンサの完成品
の側面図FIG. 8 is a side view of a completed product of the multi-layer monolithic ceramic capacitor.
【図9】従来品の多連型電子部品の完成品の斜視図FIG. 9 is a perspective view of a completed product of a conventional multiple electronic component.
1 グリーンチップ 2 セラミック誘電体層 3 内部電極 4 端部 5 上部無効層 6 下部無効層 7 面取り後の焼結体 8 平面 9 端面 10 側面 11 外部電極 12,13,14,15 積層セラミックコンデンサ素
子 16 接着剤 17 基板 18 捺印 19 多連型積層セラミックコンデンサ 20 切り欠き部DESCRIPTION OF SYMBOLS 1 Green chip 2 Ceramic dielectric layer 3 Internal electrode 4 End part 5 Upper ineffective layer 6 Lower ineffective layer 7 Sintered body after chamfering 8 Plane 9 End face 10 Side face 11 External electrode 12, 13, 14, 15 Multilayer ceramic capacitor element 16 Adhesive 17 Substrate 18 Marking 19 Multiple-layered multilayer ceramic capacitor 20 Notch
フロントページの続き Fターム(参考) 5E001 AB03 AD03 AH04 AH06 AJ02 AZ01 5E082 AA01 BC31 CC05 DD03 EE04 EE35 FG06 FG26 FG54 GG10 GG26 JJ03 JJ15 KK07 KK08 MM06 MM24 MM26 MM28 PP01 PP02 PP05 PP06 PP09 Continued on front page F-term (reference) 5E001 AB03 AD03 AH04 AH06 AJ02 AZ01 5E082 AA01 BC31 CC05 DD03 EE04 EE35 FG06 FG26 FG54 GG10 GG26 JJ03 JJ15 KK07 KK08 MM06 MM24 MM26 MM28 PP01 PP02 PP05 PP06
Claims (20)
した多連型電子部品において、前記機能素子は相対向す
る両端面に露出した内部電極の端部と電気的に接続し、
かつ上下主平面に折り返された外部電極が前記両端面の
中央部に設けられており、前記機能素子どうしは上下主
平面の何れか一方の面を熱硬化型接着剤で基板上に連結
結合した多連型電子部品。1. A multiple electronic component having a plurality of functional elements arranged on a single substrate, wherein the functional elements are electrically connected to end portions of internal electrodes exposed at opposite end faces,
External electrodes folded on the upper and lower main planes are provided at the center portions of the both end faces, and the functional elements are connected to each other by connecting one of the upper and lower main planes to the substrate with a thermosetting adhesive. Multiple electronic components.
度で硬化する接着剤を用いて接着した請求項1に記載の
多連型電子部品。2. The multiple electronic component according to claim 1, wherein the substrate and the functional element are bonded together using an adhesive that cures at a temperature lower than 150 ° C.
料の誘電率より低い誘電率の接着剤を用いて接着した請
求項1または請求項2に記載の多連型電子部品。3. The multiple electronic component according to claim 1, wherein the substrate and the functional element are bonded together using an adhesive having a dielectric constant lower than the dielectric constant of the constituent material of the functional element.
料の絶縁抵抗より高い絶縁抵抗を有する接着剤を用いて
接着した請求項1から請求項3の何れか1つに記載の多
連型電子部品。4. The multiple unit according to claim 1, wherein the substrate and the functional element are bonded together using an adhesive having an insulation resistance higher than the insulation resistance of the constituent material of the functional element. Electronic components.
した請求項1から請求項4の何れか1つに記載の多連型
電子部品。5. The multiple electronic component according to claim 1, wherein characteristics of each of the functional elements are displayed on a surface of the substrate.
5の何れか1つに記載の多連型電子部品。6. The multiple electronic component according to claim 1, wherein the substrate is an insulator.
の外部電極端部と接しないように接着剤で接着した請求
項1から請求項6の何れか1つに記載の多連型電子部
品。7. The multiple electronic component according to claim 1, wherein the substrate is bonded with an adhesive so as not to be in contact with an end of the external electrode of the functional element folded on the upper and lower main planes. .
の外部電極端部の厚さより厚いものを用いた請求項1か
ら請求項7の何れか1つに記載の多連型電子部品。8. The multiple electronic component according to claim 1, wherein the substrate has a thickness that is larger than the thickness of the end of the external electrode of the functional element folded back on the upper and lower main planes.
請求項8の何れか1つに記載の多連型電子部品。9. The multiple electronic component according to claim 1, wherein a direction indicator is provided on the substrate.
幅方向の厚さを異ならせた請求項1から請求項9の何れ
か1つに記載の多連型電子部品。10. A thickness of the functional element in the upper and lower main plane directions,
The multiple electronic component according to any one of claims 1 to 9, wherein the thickness in the width direction is different.
方向の厚さより厚くした請求項1から請求項10の何れ
か1つに記載の多連型電子部品。11. The multiple electronic component according to claim 1, wherein the thickness of the functional element in the upper and lower main plane directions is greater than the thickness in the width direction.
幅を、機能素子内部に形成した内部電極の幅より狭くし
た請求項1から請求項11の何れか1つに記載の多連型
電子部品。12. The multiple type according to claim 1, wherein the width of the end of the internal electrode constituting the functional element is smaller than the width of the internal electrode formed inside the functional element. Electronic components.
幅を外部電極の幅より狭くした請求項1から請求項12
の何れか1つに記載の多連型電子部品。13. The device according to claim 1, wherein the width of the end of the internal electrode constituting the functional element is smaller than the width of the external electrode.
The multiple electronic component according to any one of the above.
接続する外部電極を、端部の面に対し垂直に形成した請
求項1から請求項13の何れか1つに記載の多連型電子
部品。14. The multiple type according to claim 1, wherein an external electrode connected to an end of the internal electrode constituting the functional element is formed perpendicular to a surface of the end. Electronic components.
項1から請求項14の何れか1つに記載の多連型電子部
品。15. The multiple electronic component according to claim 1, wherein each edge of the functional element is chamfered.
能素子の外部電極どうしの間隔より狭く形成した請求項
1から請求項15の何れか1つに記載の多連型電子部
品。16. The multiple electronic component according to claim 1, wherein a width of the external electrode of the functional element is smaller than a distance between the external electrodes of the adjacent functional elements.
である請求項1から請求項16の何れか1つに記載の多
連型電子部品。17. The multiple electronic component according to claim 1, wherein each of the functional elements is a multilayer capacitor element.
求項1から請求項16の何れか1つに記載の多連型電子
部品。18. The multiple electronic component according to claim 1, wherein each functional element is a resistor element.
る請求項1から請求項16の何れか1つに記載の多連型
電子部品。19. The multiple electronic component according to claim 1, wherein each functional element is a thermistor element.
はサーミスタ素子の機能素子を組み合わせて基板上に接
着した請求項1から請求項19の何れか1つに記載の多
連型電子部品。20. The multiple electronic component according to claim 1, wherein a functional element such as a multilayer capacitor element, a resistor element or a thermistor element is combined and adhered on a substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11194003A JP2001023864A (en) | 1999-07-08 | 1999-07-08 | Multiple electronic part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11194003A JP2001023864A (en) | 1999-07-08 | 1999-07-08 | Multiple electronic part |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2001023864A true JP2001023864A (en) | 2001-01-26 |
Family
ID=16317363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11194003A Pending JP2001023864A (en) | 1999-07-08 | 1999-07-08 | Multiple electronic part |
Country Status (1)
Country | Link |
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JP (1) | JP2001023864A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001093709A (en) * | 1999-09-27 | 2001-04-06 | Koa Corp | Multiple resistance element and method for manufacturing thereof |
JP2009076788A (en) * | 2007-09-21 | 2009-04-09 | Tdk Corp | Laminated ceramic element and mounting structure thereof |
JP2015228481A (en) * | 2014-05-09 | 2015-12-17 | 株式会社村田製作所 | Multilayer ceramic electronic component |
JP2016219624A (en) * | 2015-05-21 | 2016-12-22 | 京セラ株式会社 | Laminated capacitor and mounting structure thereof |
JP2018056543A (en) * | 2016-09-29 | 2018-04-05 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer capacitor and manufacturing method thereof |
JP2018129435A (en) * | 2017-02-09 | 2018-08-16 | Tdk株式会社 | Multilayer feed-through capacitor and electronic component device |
CN109216030A (en) * | 2017-07-04 | 2019-01-15 | 卓英社有限公司 | Composite function clement |
-
1999
- 1999-07-08 JP JP11194003A patent/JP2001023864A/en active Pending
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001093709A (en) * | 1999-09-27 | 2001-04-06 | Koa Corp | Multiple resistance element and method for manufacturing thereof |
JP4510958B2 (en) * | 1999-09-27 | 2010-07-28 | コーア株式会社 | Multiple resistance element and manufacturing method thereof |
JP2009076788A (en) * | 2007-09-21 | 2009-04-09 | Tdk Corp | Laminated ceramic element and mounting structure thereof |
JP4548466B2 (en) * | 2007-09-21 | 2010-09-22 | Tdk株式会社 | Multilayer ceramic element and its mounting structure |
KR100995489B1 (en) | 2007-09-21 | 2010-11-22 | 티디케이가부시기가이샤 | Multilayer Ceramic element and mounting structure thereof |
US7974070B2 (en) | 2007-09-21 | 2011-07-05 | Tdk Corporation | Multilayer ceramic device and mounting structure therefor |
JP2015228481A (en) * | 2014-05-09 | 2015-12-17 | 株式会社村田製作所 | Multilayer ceramic electronic component |
JP2016219624A (en) * | 2015-05-21 | 2016-12-22 | 京セラ株式会社 | Laminated capacitor and mounting structure thereof |
JP2018056543A (en) * | 2016-09-29 | 2018-04-05 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer capacitor and manufacturing method thereof |
JP2018129435A (en) * | 2017-02-09 | 2018-08-16 | Tdk株式会社 | Multilayer feed-through capacitor and electronic component device |
CN109216030A (en) * | 2017-07-04 | 2019-01-15 | 卓英社有限公司 | Composite function clement |
CN109216030B (en) * | 2017-07-04 | 2020-09-11 | 卓英社有限公司 | Composite functional element |
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