JP2001018463A - Dma controller and dma controlling method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a DMA controller for printer in which the order of data can be matched even if a user is unconscious of the type of printer control board or the type of data being transferred. SOLUTION: A CPU in an engine body reads out the value of a configuration register 328 in a printer control board and makes a decision which printer control board is inserted by that value. Based on the decision results, a data bus select register 310 is latched to Low or High so that the order of data is matched between the printer control board and the engine body thus selecting connection of the data bus between them. At the same time, connection of the data bus is altered depending on the type of data being transferred such that the order of data is matched between the printer control board and the engine body.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DMA (Direct Memory Access) control device and a DMA control method in a printer device.

[0002]

2. Description of the Related Art Conventionally, in an electrophotographic printer represented by a laser beam printer, print data (code data, image data, etc.) is received from an external device such as a host computer, and the received print data is added to the print data. Based on the developed bitmap data, after the development is completed, the developed bitmap data is output to the printer engine as video data.

[0003] In recent years, the resolution of this type of device has become extremely high, and accordingly, an enormous amount of bitmap data to be transferred has been required.

In order to solve this problem, bitmap data has been conventionally transferred as serial data, but recently bitmap data has been transferred as parallel data.

[0005] Recently, a printer control board (printer control unit) that expands received data to be printed transmitted in various data formats such as data described in PDL (page description language) into a memory as raster image data. Or a PDL board) and an engine control unit of the printer engine main body by using a standard parallel interface (hereinafter, referred to as an I / F) to connect bitmap data, a printer control board, and a printer. A method of exchanging communication between engines using the same bus has been adopted.

As typical I / Fs (interfaces), for example, VL (VESA-Local) -I / F, PCI (Pe
ripheral Component Interconnect), IDE (Integra
tedDevice Electronics) I / F. And
Using these I / Fs, the bitmap data developed by the printer control board is temporarily stored in the RAM (random access memory) of the engine control unit of the engine main body and then printed, or the command / command is transmitted using the same bus. It also exchanges status data.

[0007]

However, when bitmap data and command / status data are transferred using the same bus, the data arrangement between the printer control board and the engine control unit of the printer engine does not match. In some cases, problems may occur.

For example, as shown in FIGS. 4 and 5, the image data developed in the memory in the printer control board is a data sequence in which the upper left of the page is LSB (least significant bit). The image data stored in the memory of the engine control unit of the printer engine main body is a case where the data is arranged such that the MSB (most significant bit) is at the upper left of the page. In this case, the connection of the data bus must be changed so that the LSB of the image data transferred from the printer control board corresponds to the MSB of the engine control unit of the printer engine main unit. In some cases, the data buses must be connected so that the LSBs correspond to each other.

Further, when a plurality of types of printer control boards are connected to one printer engine, bitmap data and command / status data may be converted to data of an engine control unit of the printer engine body depending on the printer control boards. Some may be the same as the row. Therefore, the connection between the printer control board and the data of the printer engine itself must be changed according to the type of printer control board to be connected and the type of data to be transferred.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to determine which printer control board is connected, and to connect the connected printer control board and printer based on the determination result. The printer is controlled by changing the connection of the data bus so that the data of the printer control board and the printer engine are aligned according to the type of data to be transferred. To provide a DMA control device and a DMA control method for a printer device that enable automatic alignment of data arrangement without the user being conscious of the type of board and the type of data to be transferred. It is in.

[0011]

According to a first aspect of the present invention, an engine body is connectable to a plurality of types of printer control boards, and a parallel connection is provided between the printer control board and the engine body. Image data and command / status data via the data bus
In the DMA control device of the printer device that performs the A transfer, a configuration register provided in the printer control board and preliminarily storing a value indicating the identification of the printer control board, and a value of the configuration register in the printer control board A determination means in the engine main body for determining which printer control board is connected, and a case where the arrangement of command / status data and image data is different from the arrangement of data of the engine main body depending on the printer control board. And a data bus connection selecting means in the engine main body for selecting the connection of the data bus so that the data of the printer control board and the data of the engine main body are aligned based on the judgment result of the judgment means. It is characterized by doing.

Here, the printer control board further includes data discriminating means for discriminating whether data to be transferred is image data or command / status data, and the data bus connection selecting means is sent from the data discriminating means. Based on the data determination result, the connection of the data bus is selected so that the data of the printer control board and the data of the engine main body are aligned.

[0013] The data bus connection selecting means has a plurality of DMA transfer channels for the same and different data bus connections, and the data bus connection selecting means determines which printer control channel from the value of the configuration register of the printer control board. It may be characterized in that it is determined whether a board is connected or not, and the DMA transfer channel is selected so that the data of the connected printer control board and the data of the engine main body match.

According to a fourth aspect of the present invention, an engine body is connectable to a plurality of types of printer control boards, and the printer control board and the engine body are connected via a parallel data bus. Image data and
In a DMA control device of a printer device for transferring command / status data by DMA, a configuration register provided in the printer control board and preliminarily storing a value indicating the identification of the printer control board; The connection of the data bus is selected based on a value of a configuration register and an arrangement of data of the engine body so that an arrangement of command / status data and image data of the printer control board and the engine body is matched. Data bus connection selecting means in the printer control board.

Here, the DMA transfer may be performed via a bidirectional buffer, a master controller, and a target controller.

Further, the present invention is characterized by having two sets of DMA transfer channels in which a pair of FIFO and DMA controllers are integrated into one.

Further, the image data may be bitmap data.

The printer device may be a digital electronic device or an information processing system having a printer mechanism including at least a printer, a copier, a facsimile device, and a complex peripheral device.

According to a ninth aspect of the present invention, an engine body is connectable to a plurality of types of printer control boards, and the printer control board and the engine body are connected via a parallel data bus. Image data and
In a DMA control method for a printer device for transferring command / status data by DMA, a step of storing in advance a value representing the identification of the printer control board in a configuration register in the printer control board;
A determination step of determining which printer control board is connected according to the value of the configuration register; and, depending on the printer control board, the arrangement of command / status data and image data differs from the arrangement of data of the engine body. In such a case, based on the result of the determination in the determination step, the data of the printer control board and the data of the engine body are aligned,
A data bus connection selecting step of selecting the connection of the data bus.

Here, the method further comprises a data discriminating step of discriminating whether the data to be transferred is image data or command / status data. In the data bus connection selecting step, the data bus connection selecting step is performed based on the data discrimination result in the data discriminating step. In this case, the connection of the data bus is selected so that the data of the printer control board and the data of the engine main body are aligned.

In addition, the data bus connection has a plurality of DMA transfer channels of the same or different data bus connections. In the data bus connection selecting step, which printer control board It may be characterized in that it is determined whether a board is connected or not, and the DMA transfer channel is selected so that the data of the connected printer control board and the data of the engine main body match.

[0022]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIG. 1 shows a configuration example of a printing system provided with a DMA control device to which the present invention is applied. In this example, a PCI bus is used as an example.

In FIG. 1, reference numeral 1 denotes a printer control board (also referred to as a printer control unit) for expanding received data to be printed transmitted in various data formats, such as data described in PDL, into a memory as image data. Reference numeral 2 denotes an engine control unit that controls the printer 206 to print bitmap data supplied from the printer control board 1 via the PCI bus 3.

In the printer control board 1, a display panel 101 is connected to a bus 110 in the printer control board via a panel I / F 102. Reference numeral 103 denotes a host I / F, which is an interface for connecting to an external device 104 such as a host computer. An image data generator 105 generates bitmap data (image data). The generated bitmap data is stored in the RAM 10.
6 is written. ROM (read only memory) 1
In 07, a program for controlling the operation of the CPU (Central Processing Unit) 108 and font data are written in advance. A PCI (Peripheral) 109 transfers image data and command / status data written in the RAM 106 to the engine control unit 2 of the printer engine.
al Component Interconnect) controller and P
It is connected to the CI bus 3.

In the engine control unit 2 of the printer engine, reference numeral 201 denotes a PCI controller in the printer engine.
The CI controller 109 transfers bitmap data and command / status data sent via the PCI bus 3 to the RAM 204 in the printer engine. 202 is a CP for controlling the operation of the printer engine.
U and 203 are ROs in which the control program is written in advance.
M and 205 are printer I / F units that transfer image data stored in the RAM 204 to the printer 206.

FIG. 2 shows one embodiment of the present invention.
2 shows a detailed internal configuration of the PCI controller 109 of FIG.
2, reference numeral 301 denotes a read signal in the printer control board 1, 302 denotes a data bus in the printer control board 1, and 303 denotes an address bus in the printer control board. Reference numerals 336, 337, and 338 denote an AD (address) bus, a control signal, and a command / byte enable signal on the PCI bus side.

305 is a bidirectional buffer, 334 is a master controller, and 335 is a target controller. 313 is a selector, 322 and 323 are FIFOs
(First-in first-out circuit). 324, a DMA controller; 326, an address decoder; 328, a configuration register;
9 is a decoder. 315 and 319 are NAND circuits,
310 and 318 are data bus selection registers, 312 is an address counter, and 306 is a bidirectional buffer.

In the above configuration, when command data is transferred from the RAM 106 in the printer control board 1 to the RAM 204 in the engine control unit 2 in the printer engine, the bidirectional buffer 305 is transferred from the data bus 302 of the printer control board 1 to the printer. The data on the data bus 308 in which the data arrangement is unchanged and the data on the data bus 309 in which the data arrangement is reverse to the data
3, since the selection signal 311 is Low (low level) at this time, the data bus 308 is selected by the selector 313, and the command data is output to the data bus 314 without being changed. You.

The reason is that the RAM 2 of the engine control unit 2
Prior to transferring the command data to the configuration register 32, the CPU 202 of the printer engine reads the value of the configuration register 328 via the data bus 333, the target controller 335, and the AD (address) bus 336, and calls the configuration register 32.
After determining which printer control board is connected to the printer based on the value of 8, the data bus selection register 310 is latched via the AD bus 336, the target controller 335, and the data bus 325 to select the printer control board. This is because the signal 311 is set to Low.

Here, the address decoder 326 decodes the signal on the address bus 327 to generate a signal 316 for selecting the data bus selection register, and
29 decodes the command / byte enable signal 338 to create a write signal 320. A write signal for a data bus selection register is created by a NAND (Negative AND) circuit 315 to which the signal 316 and the signal 320 are input. A read signal 3 generated by decoding the command / byte enable signal 338 by the decoder 329
21 reads data from the configuration register 328 to the data bus 333.

Command data is temporarily stored in a FIFO (first-in-first-out circuit) 323 for a buffer memory, and then stored in a master controller 334.
And is output to the PCI bus 336 via the CPU and written to the RAM 204 of the engine control unit 2. The write destination address to the RAM 204 is determined by the engine CPU 202 by the PCI
The data is set in the DMA controller 324 via the bus 336, the target controller 335, and the data bus 325, further input to the master controller 334 via the address bus 332, and output from the AD bus 336.

The printer engine status data is R
AM 204 to PCI bus 336, master controller 334, buffer FIFO 322, bidirectional buffer 3
The data is output to the printer control board data bus 302 via the CPU 05 and stored in the RAM 106. Also in this case, the data arrangement is transferred without change.

On the other hand, the RAM 10 of the printer control board 1
When the bitmap data is transferred from the CPU 6 to the RAM 204 in the printer engine, the control signal (data bus selection signal) of the engine CPU 202 is transmitted to the AD bus 33.
6, target controller 335, data bus 325
Is latched in the data bus selection register 310 via the CPU. When the arrangement of the bitmap data in the printer control board is different from the arrangement of the data in the engine body, the engine CPU 202 stores the H in the data bus selection register 310.
High (high level) is latched, so that the selection signal 311 becomes High via the OR (OR) circuit 356.

As a result, the data bus 309 in which the data arrangement is reversed (the LSB / MSB of the bitmap data of the printer control board is connected to the data MSB / LSB of the engine body) is selected by the selector 313, and the data arrangement is changed. The inverted bitmap data is stored in the data bus 31.
4, the RAM 323 via the FIFO 323, the data bus 331, the master controller 334, and the AD bus 336.
04.

If the arrangement of the bitmap data in the printer control board is the same as the arrangement of the data in the engine body, the engine CPU 202 sets the data bus selection register 3
10 is latched low (low level), the selection signal 311 becomes low via the OR circuit 356, and the data bus 308 is selected by the selector 313.
The bitmap data in the printer control board is transferred to the RAM 204 without changing the data arrangement.

In FIG. 2, reference numeral 317 denotes a signal for selecting the transfer source address register 318, and reference numeral 319 denotes a NAN for generating a transfer source address register write signal.
This is a D circuit. The address set by the transfer source address register 318 is output to the printer control board via the address counter 312 and the bidirectional buffer 306.

In the above description, the data bus selection signal is set by the CPU 202 in the printer engine.
The setting may be made from the CPU 108 in the printer control board, and the same effects as in the above-described embodiment can be obtained. In FIG. 2, reference numerals 351 to 357 denote these parts, 351 denotes a data bus, 352 denotes a write signal in the printer control boat,
3 is a NAND circuit, 354 is a data bus selection register,
356 is an OR circuit, 357 is a data bus selection register 3
This is a decoder for selecting 54.

The decoder signal of the decoder 357 and the write signal 352 input from the printer control board are
The write signal is input to the AND circuit 353 to generate a write signal for the data bus selection register 354. The OR circuit 356 receives the latch output 355 of the data bus selection register 354 and generates a data bus selection signal 311. The data bus selection signal 311 is supplied to the selector 313 as described above,
The data bus is selected.

(Second Embodiment) FIG. 3 shows a second embodiment of the present invention.
An embodiment will be described. FIG. 3 shows a case where the FIFO 322, the FIFO 323, and the DMA controller 324 for controlling the DMA transfer in FIG. 2 are integrated into one, and two DMA transfer channels 402 and 403 are provided.
Here, in FIG. 3, the same blocks as those in FIG. 2 are given the same numbers.

In FIG. 3, the RA of the printer control board
When the command data is transferred from the M106 to the RAM 204 in the printer engine, the data is transferred from the printer control board data bus 302 via the bidirectional buffer 305 via the bidirectional buffer 305 via the data bus 308 where the data sequence is kept, and then temporarily transferred from the DMA transfer channel 402. Stored in the FIFO of
The data is input to the selector 409 via the data bus 405.

The write destination address to the RAM 204 of the printer engine is determined by the CPU 2 of the printer engine.
02 is a PCI bus 336, a target controller 33
5, DMA transfer channel 4 via data bus 325
02 is set to the DMA controller in the address controller 02, and further input to the selector 409 through the address bus 406.

By the way, the CPU 20 of the printer engine
The second control signal (data bus selection signal) is latched in the data bus selection register 310 via the AD bus 336 and the target controller 335, and the selection signal 311 from the data bus selection register 310 is set to low.
The selector 409 is selected according to the Low of the selection signal 311.
Selects the data bus 405 and the transfer destination address bus 406, and the data / address on each bus is
The data is output to the data bus 331 and the address bus 332, output to the PCI bus 336 via the master controller 334, and written to the RAM 204 of the printer engine without changing the data arrangement.

The status data of the printer engine is R
The data is output from the AM 204 to the printer control board data bus 302 via the PCI bus 336, the master controller 334, the FIFO in the DMA transfer channel 402, the selector 401, and the bidirectional buffer 305, and is stored in the RAM 106 of the printer control board 1. Again,
The data arrangement is transferred to the RAM 106 without change.

On the other hand, the RAM 106 of the printer control board
When transferring bitmap data from the printer engine to the RAM 204 in the printer engine, the CPU 20 of the printer engine
2 is determined by the value of the configuration register 328.
If it is determined that the arrangement of the bitmap data in the printer control board and the data in the engine is different, the CPU 202 of the printer engine sends a control signal (data bus selection signal) to the data bus via the AD bus 336 and the target controller 335. The data is latched in the selection register 310, and the selection signal 311 from the data bus selection register 310 is set to High. As a result, the data bus 30
8, and the data on the data bus 407 output via the FIFO in the DMA transfer channel 403 is selected by the selector 409, but the data bus 407 reverses the data arrangement (LSB / MS of the printer control board data).
B is connected to the data MSB / LSB of the engine body), so that the bitmap data in which the data arrangement is reversed is stored in the data bus 331 and the master controller 33.
4. The printer engine R via the AD bus 336
Transferred to AM 204.

Similarly, the RAM 2 of the printer engine
04 is written in C of the printer engine.
The PU 202 is set as a DMA controller in the DMA transfer channel 403 via the PCI bus 336, the target controller 335, and the data bus 325, and further input to the selector 409 via the address bus 408.
The signal is selected by the selector 409 and output to the PCI bus 336 via the address bus 332 and the master controller 334.

The RAM 106 of the printer control board
When transferring bitmap data from the printer engine to the RAM 204 in the printer engine, the CPU 202 of the printer engine
Determines from the value of the configuration register 328 that the arrangement of the bitmap data in the printer control board and the data in the printer engine are the same, the CPU 202 of the printer engine changes the control signal to A
It is latched in the data bus selection register 310 via the D bus 336 and the target controller 335, and the selection signal 311 from the data bus selection register 310 is set to low. As a result, the selector 409 allows the data bus 40
5 is selected, and the bitmap data is transferred to the RAM 204 of the engine body without changing the data arrangement.

The selector 401 is selected by the DMA transfer channel selection signal 404.
This is a circuit for selecting which of the DMA transfer channels 402 and 403 to use when transferring data from the M204 to the RAM 106 in the printer control board.

(Other Embodiments) Even if the present invention is applied to a system composed of a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), an apparatus (one device) For example, the present invention may be applied to a copying machine, a facsimile machine, and the like.

Another object of the present invention is to provide a recording medium (storage medium) recording software program codes for realizing the functions of the above-described embodiments to a system or apparatus, and to provide a computer for the system or apparatus. Needless to say, the present invention is also achieved when the CPU (or the CPU or the MPU) reads out and executes the program code stored in the recording medium.

In this case, the program code itself read from the recording medium implements the functions of the above-described embodiment, and the recording medium on which the program code is recorded constitutes the present invention.

Examples of a recording medium for recording the program code and variable data such as a table include a floppy disk (FD), hard disk, optical disk, magneto-optical disk, CD-ROM, CD-R, magnetic tape, A nonvolatile memory card (IC memory card), a ROM, or the like can be used.

When the computer executes the readout program code, not only the functions of the above-described embodiment are realized, but also the operating system (OS) running on the computer based on the instruction of the program code. It goes without saying that an operating system) may perform some or all of the actual processing, and the processing may realize the functions of the above-described embodiments.

[0054]

As described above, according to the present invention,
The CPU of the engine main body reads the configuration register in the printer control board, judges which printer control board is inserted, latches the data bus selection register to Low or High, and stores the data between the printer control board and the engine. Since the connection of the bus is selected, the data arrangement can be automatically adjusted without considering the type of the printer control board and the type of the data to be transferred.

[Brief description of the drawings]

FIG. 1 is a block diagram of a printer control device.

FIG. 2 is a block diagram showing the inside of a PCI controller according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing the inside of a PCI controller according to a second embodiment of the present invention;

FIG. 4 is a diagram showing an arrangement of print data in a printer control board memory.

FIG. 5 is a diagram showing an arrangement of print data in an engine main body memory.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Printer control board 2 Engine control part 3 PCI bus 101 Display panel 102 Panel I / F 103 Host I / F 104 External device 105 Image data generation part 106 RAM 107 ROM 108 CPU 109 PCI controller 110 Bus in printer control board 201 PCI controller 202 CPU 203 ROM 204 RAM 205 Printer controller 206 Printer 301 Read signal in printer control board 302 Data bus in printer control board 303 Address bus in printer control board 304 Read signal in printer control board 305 Bidirectional buffer 306 Bidirectional buffer 307 Data bus 308 data bus 309 data bus 310 data bus selection register 311 data bus selection signal 312 address clock Counter 313 selector 314 data bus 315 NAND circuit 316 data bus selection register selection signal 317 transfer source address register selection signal 318 transfer source address register 319 NAND circuit 320 write signal 321 read signal 322 FIFO 323 FIFO 324 DMA controller 325 data bus 326 address decoder 327 Address bus 328 Configuration register 329 Decoder 330 Data bus 331 Data bus 332 Address bus 333 Data bus 334 Master controller 335 Target controller 336 PCI AD bus 337 PCI control signal 338 PCI command / byte enable signal 351 Data bus 352 Printer control board Write signal 353 AND circuit 354 data bus select register 355 data bus selection signal 356 OR circuit 401 selector 402 DMA transfer channel 403 DMA transfer channel 404 DMA transfer channel selection signal 405 data bus 406 an address bus 407 data bus 408 an address bus 409 selector

Claims (11)

[Claims] 1. An engine main body is connectable to a plurality of types of printer control boards, and image data and command / status data are DMA-transferred between the printer control board and the engine main body via a parallel data bus. In the DMA control device of the printer device, a configuration register provided in the printer control board and previously storing a value indicating the identification of the printer control board, and a value of the configuration register in the printer control board, Determining means in the engine main body for judging whether a printer control board is connected, and depending on the printer control board, even if the arrangement of command / status data and image data is different from the arrangement of data of the engine main body, Judgment by the judgment means DMA control, comprising: data bus connection selecting means in the engine main body for selecting connection of the data bus so that the data of the printer control board and the data of the engine main body are aligned based on the result. apparatus. 2. The printer control board according to claim 1, further comprising a data discriminating means for discriminating whether the data to be transferred is image data or command / status data, wherein said data bus connection selecting means includes a data transmitted from said data discriminating means. 2. The DMA controller according to claim 1, wherein the connection of the data bus is selected so that the data of the printer control board and the data of the engine main body are aligned based on the determination result. 3. The printer according to claim 1, further comprising: a plurality of DMA transfer channels for connecting the same data bus and different data bus connections, wherein the data bus connection selecting means determines which printer control is to be performed based on a value of a configuration register of the printer control board. 3. The DMA transfer channel according to claim 1, wherein it is determined whether a board is connected, and the DMA transfer channel is selected so that the data of the connected printer control board and the data of the engine main body are aligned. DMA controller. 4. An engine main body can be connected to a plurality of types of printer control boards, and image data and command / status data are DMA-transferred between the printer control board and the engine main body via a parallel data bus. In the DMA control device of the printer device, a configuration register provided in the printer control board and preliminarily storing a value indicating the identification of the printer control board; a value of the configuration register in the printer control board; A data bus in the printer control board for selecting a connection of the data bus based on the arrangement of the data in the main body so that the arrangement of the command / status data and the image data of the printer control board and the engine main body is matched; Having connection selection means DMA controller according to claim. 5. The DMA controller according to claim 1, wherein the DMA transfer is performed via a bidirectional buffer, a master controller, and a target controller. 6. The DMA controller according to claim 1, wherein the DMA controller has two sets of DMA transfer channels in which a pair of FIFO and DMA controllers are integrated into one. 7. The DMA control device according to claim 1, wherein said image data is bitmap data. 8. The information processing system according to claim 1, wherein the printer device is a digital electronic device or a data processing system having a printer mechanism including at least a printer, a copier, a facsimile device, and a composite peripheral device. A DMA controller according to any one of claims 1 to 3. 9. The engine main body can be connected to a plurality of types of printer control boards, and image data and command / status data are DMA-transferred between the printer control board and the engine main body via a parallel data bus. In the DMA control method for a printer device, a step of storing in advance a value indicating the identification of the printer control board in a configuration register in the printer control board, and which printer control board is connected by the value of the configuration register Determining whether or not the command / status data and the image data are arranged in a different sequence from the data in the engine body, depending on the printer control board. Control board and A data bus connection selecting step of selecting a connection of the data bus so that an arrangement of data of the engine main body is aligned. 10. A data bus connection selecting step for determining whether data to be transferred is image data or command / status data. In the data bus connection selecting step, the data bus connection selecting step is based on a data determination result in the data determining step. 10. The DMA control method according to claim 9, wherein the connection of the data bus is selected so that the data of the printer control board and the data of the engine main body are aligned. 11. The data bus connection selecting step includes the step of selecting a printer control board based on a value of a configuration register of the printer control board. 11. The DMA transfer channel according to claim 9, wherein it is determined whether a board is connected, and the DMA transfer channel is selected so that the data of the connected printer control board and the data of the engine main body are aligned. DMA control method.