JP2001013929A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display a high quality image without the horizontal resolutive deterioration and a ghost by reducing load capacitance of a display signal supply wiring part of a column signal electrode drive circuit and reducing a waveform bluntness on the analog switch input terminal of the column signal electrode drive circuit. SOLUTION: This device is a liquid crystal display device provided with the column signal electrode drive circuit 10 having analog switches S1, S2, S3,... successively sampling a display signal and sending it out to column signal electrodes of plural display pixel electrodes arranged in matrix, and the analog switch S of the column signal electrode drive circuit 10 is divided to at least two sets or more (e.g. the set of S1, S3, S5,... and the set of S2, S4, S6,...), and plural parallel display signal supply wirings (e.g. L1, L2) connected to the input terminals of respective sets of these divided analog switches are provided, and the same display signal Video is supplied to these plural display signal supply wiring (L1, L2).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to an active matrix type liquid crystal display device which is provided in a liquid crystal projector or the like and incorporates a suitable driving circuit.

[0002]

2. Description of the Related Art FIG. 4 shows a configuration example of a conventional active matrix type liquid crystal display device. In FIG. 4, on an active matrix substrate of an active matrix type liquid crystal display device, a plurality of column signal electrodes D1, D2, D3,.
., Di are arranged in parallel, and each of these column signal electrodes D
A plurality of row scan electrodes G1, G2, G3,..., Gi are arranged in a direction orthogonal to 1, D2, D3,. At the intersection of each column signal electrode D and row scanning electrode G,
As shown in FIG. 5, a display pixel PX including a switching transistor Tr and an auxiliary capacitance Cs is formed.

The column signal electrode driving circuit 100 includes a horizontal shift register 101 and analog switches S1, S2, S
3,..., Si. The input side of the analog switches S1, S2, S3,.
and the output side is connected to the corresponding column signal electrodes D1, D2, D
,..., Di. The output of the horizontal shift register 101 is connected to the control terminals of the analog switches S1, S2, S3,..., Si.

The column signal electrode drive circuit 10 having such a configuration
0, the horizontal shift register 101 is driven by a horizontal start signal HST and a horizontal shift clock HCK supplied from a drive timing pulse generation circuit (not shown), and the analog switches S1, S2, S3,... Accordingly, the display signal Video for one horizontal period is
Are sequentially sampled on the column signal electrodes D1, D2, D3,..., Di.

On the other hand, the row scanning electrode drive circuit 102 includes a vertical shift register having a number of stages corresponding to the total number of display rows. The vertical shift register is driven by a vertical start signal VST and a vertical shift clock VCK supplied from a drive timing pulse generation circuit (not shown), and receives row scan electrodes G1, G2, G3,.
The scan pulse is sequentially output for every horizontal period for i.

As a result, the row scanning electrodes G1, G2, G3,
Are sequentially turned on row by row, and the column signal electrodes D1, D2,
Display signal Vid sampled to D3,..., Di
The voltage of eo is accumulated / held in the auxiliary capacitance Cs of the adjacent pixel. Thereby, in each pixel PX, a voltage between the pixel electrode and the common electrode is applied to the liquid crystal, and the degree of light modulation of the liquid crystal changes accordingly, and an image is displayed.

Next, FIG. 6 shows another configuration example of a conventional active matrix type liquid crystal display device. In the configuration of FIG. 6, the same components as those of the configuration of FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted.

In the active matrix type liquid crystal display device shown in FIG. 6, the display signal is divided / parallelized into two phases in advance to reduce the driving frequency of the column signal electrode driving circuit 100.

That is, in the configuration shown in FIG. 6, a display signal is supplied to Video1 and Vid by a phase expansion circuit (not shown).
eo2 is two-phase parallelized, and the two-phase parallelized display signals Video1 and Video2 are input to the column signal electrode drive circuit 100.

Each of the analog switches S1, S2, S3,..., Si constituting the column signal electrode drive circuit 100 has 1
The display signals Video1 and Video2 are respectively provided every other column.
Are connected to the display signal supply lines L101 and L102 corresponding to. As a result, the display signals Video1 and V
The video2 is simultaneously sampled by the output of each stage of the horizontal shift register 101.

According to the configuration of FIG. 6, the driving frequency (shift register clock and display signal rate) of the row scan electrode driving circuit 102 is 1/1 of the single-phase configuration shown in FIG.
2, a high resolution liquid crystal display device having a large number of display pixels and a high frequency rate of a display signal can be realized.

[0012]

Next, FIG. 7 shows a display signal (Video1) in the column signal electrode driving circuit 100.
Alternatively, each analog switch S1, S2, S3,..., Si for sampling Video1, Video2)
An example of the configuration will be described.

The analog switch S shown in FIG.
It is composed of a CMOS circuit combining a set of P-channel / N-channel MOS transistors. The input side of the switch is connected to a display signal (Video1 or Video1, Vid
eo2) are commonly connected to a supply line (L or L101, L102), and the output side is connected to the corresponding column signal electrode D. The control terminal of the analog switch, ie, NM
Output pulses of the horizontal shift register 101 are supplied to the gates of the OS and PMOS transistors with positive / negative polarity, respectively, and are turned on / off.

The analog switch S shown in FIG. 7 applies a display signal (Video1) to the column signal electrode D of the display pixel PX section.
Alternatively, since it is necessary to sample Video 1 and Video 2) at high speed, low on-resistance characteristics are required. For that purpose, it is necessary to increase the gate channel width of the transistor having the CMOS structure.

On the other hand, when the size of the transistor is increased, the diffusion capacitance of the transistor input part is also increased proportionally, so that the display signal supply wiring (L or L101, L10
The capacitance component of 2) also increases.

FIG. 8 is a simplified illustration of the electrical characteristics of the wiring portion of the display signal supply wiring (L or L101, L102) of the column signal electrode drive circuit 100.

In FIG. 8, a display signal (Video1 or Video1, Video2) supplied via an analog buffer circuit Buf is supplied to an internal wiring resistance Ri.
Through n, it is led to the display signal supply wiring (L or L101, L102) of the column signal electrode drive circuit 100. The display signal supply line (L or L10) of the column signal electrode drive circuit 100
1, L102) are the analog switches S1, S2, S
3,..., Si input diffusion capacitance Cj, wiring stray capacitance C
It can be equivalently approximated to a lumped constant circuit as shown by p and the wiring resistance R.

Thus, the analog switches S1, S2,
As the size of S3,..., Si and the number of connections increase, the display signal supply wiring (L or L101, L10
It can be seen that the capacitance component of 2) also increases.

FIG. 9 shows analog switches S1, S2, S3,..., S connected to the display signal supply wiring (L or L101, L102) of the column signal electrode drive circuit 100.
The relationship between the number of i and the wiring unit capacitance is illustrated.

According to FIG. 9, the stray capacitance of the wiring itself is dominant in a region where the number of connected analog switches is small. However, as the number of connected analog switches increases, the input diffusion capacitance of the switches becomes nonnegligible. I understand.

As described above, when the capacitance component of the display signal supply wiring (L or L101, L102) increases, the display signal (Video1 or Video1, Video2) is increased.
Of the analog switches S1, S2, S3 due to the driving capability characteristics of the analog buffer circuit Buf that supplies the analog switches S1, S2, S3, and the like.
... There is a problem that the display signal waveform is rounded at the input terminal of Si.

FIG. 10 shows the analog switches S1,
S2, S3,..., The rounding of the display signal waveform occurring at the input terminals of Si, that is, the state of waveform deterioration.

From FIG. 10, it can be seen that the display signal waveform is degraded by the capacitance of the wiring portion as shown by the solid line in the figure with respect to the ideal waveform shown by the dotted line in the figure.

As described above, the analog switches S1,
When the waveform deterioration as shown in FIG. 10 occurs at the input terminals of S2, S3,..., Si, the active matrix type liquid crystal display device having the single-phase input configuration shown in FIG.
The effect appears as a decrease in the horizontal resolution, and, for example, the vertical line component of the image is displayed blurred.

The analog switches S1, S2, S
When the waveform deterioration as shown in FIG. 10 occurs at the input terminals of 3,..., Si, in the case of the active matrix type liquid crystal display device having the multi-phase input configuration shown in FIG. As a result, a ghost image shifted in the horizontal direction by the number of pixels corresponding to the number of developed phases is generated as shown by a dotted line in FIG. 11B, for example. In addition, there is a problem that display image quality is significantly deteriorated. The solid line in FIG. 11A shows a display example when there is no ghost image.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and reduces a load capacitance of a display signal supply wiring portion of a column signal electrode driving circuit, and reduces a waveform at an analog switch input terminal of the column signal electrode driving circuit. By reducing the roundness,
It is an object of the present invention to provide a liquid crystal display device capable of displaying a high-quality image without horizontal resolution degradation or ghost.

[0027]

According to a first aspect of the present invention, there is provided a liquid crystal display device for solving the above-mentioned problems.
In a liquid crystal display device having a column signal electrode driving unit including a switch unit for sequentially sampling and transmitting a display signal to a column signal electrode of a plurality of display pixel electrodes arranged in a matrix, The switch means is divided into at least two or more sets, and a plurality of parallel display signal supply wirings connected to the input terminals of each set of the divided switch means are provided. Provide the same display signal.

According to a second aspect of the present invention, in order to solve the above-mentioned problem, a display signal is sequentially applied to a column signal electrode of a plurality of display pixel electrodes arranged in a matrix. In a liquid crystal display device having a column signal electrode driving means provided with a switch means for sampling and sending out, the switching means of the column signal electrode driving means is M × N.
(M ≧ 2, N ≧ 2), and M × N parallel display signal supply lines connected to the input terminals of each set of the divided switch means are provided. And the same display signal is supplied to N display signal supply lines among the display signals of each phase.

That is, according to the present invention, the switch means of the column signal electrode driving means is divided into at least two or more sets, and display signals are supplied to the input terminals of each set using independent display signal supply wiring. Reducing the number of switch means connected to each display signal supply wiring according to the number of divisions,
The load capacitance component of the wiring section is reduced.

Further, according to the present invention, the switch means of the column signal electrode driving means is divided into at least two or more sets, and the same display signal is supplied to the divided display signal supply wiring via, for example, a separate buffer means. The supply eliminates the need for a multi-phase / parallelizing means for the display signal according to the wiring division, thereby simplifying the peripheral circuit.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the liquid crystal display device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a configuration example of the liquid crystal display device according to the first embodiment of the present invention, particularly, only the column signal electrode drive circuit portion. Note that the row scanning electrode drive circuit and the pixel unit have the same configuration as that of FIG. 4 described above, and therefore, illustration and description thereof are omitted here.

In the liquid crystal display device of the first embodiment shown in FIG. 1, the analog switch S of the column signal electrode driving circuit
Are divided into two sets, the first set of analog switches S1, S3, S5,... Is connected to the first display signal supply line L1, and the second set of analog switches S1, S3, S5,. The set of analog switches S2, S4, S6,... Is connected to the second display signal supply line L2. The control terminals of the analog switches S1, S2, S3,... Are connected one-to-one with the output terminals of each stage of the horizontal shift register 10.

Analog buffers Buf1 and Buf2 are connected to the display signal supply lines L1 and L2, respectively, and a common display signal Video is supplied to the input terminals of the analog buffers Buf1 and Buf2.

The horizontal shift register 10 is driven by a horizontal start signal HST and a horizontal shift clock HCK supplied from a drive timing pulse generation circuit (not shown), and sequentially turns on the analog switches S1, S2, S3,. Thereby, each analog switch S1, S
, S3,... Are sequentially turned on by the output pulse of the horizontal shift register 10, and the display signal V for one horizontal period is
ideo to the corresponding column signal electrodes D1, D2, D3,.
・ Sampling is performed.

According to the configuration example shown in FIG. 1, the display signal supply wiring in the column signal electrode drive circuit has two systems (L1, L1).
L2), and each display signal supply line L1, L2
Analog switches (S1, S3, S5,.
.. And the number of connections of S2, S4, S6,...) Are reduced to の of the total number of column signal electrodes D. The load capacitance of the display signal supply wiring section can be reduced, and as a result, the degradation of the horizontal resolution of the display image can be suppressed.

The configuration of FIG. 1 is the same as that of FIG.
Unlike the configuration in which the display signal is input after multi-phase / parallelization as in the configuration of FIG. 1, since the same display signal is supplied to each wiring, the signal multiplication of the circuit as in the example of FIG. It is characterized in that phase / parallelizing means is not required, and ghost which is a problem in the multi-phase / parallel input configuration does not occur.

In the first embodiment,
Although the configuration in which the display signal supply wiring is divided into two systems (L1 and L2) has been described, the number of divisions of the display signal supply wiring is not limited to this, and can be further increased as necessary. Even in the case where the number of divisions of the display signal supply wiring is further increased, a common display signal Video may be supplied to each display signal supply wiring via an analog buffer Buf provided separately. No means for multi-phase / parallelizing the signal is required.

Next, FIG. 2 shows a configuration example of a liquid crystal display device according to a second embodiment of the present invention, particularly, only a column signal electrode drive circuit portion. Incidentally, in the case of the second embodiment,
1 are denoted by the same reference numerals as those in FIG. 1, and the row scanning electrode drive circuit and the pixel section are the same as those in FIG. 6 described above. Is omitted.

In the liquid crystal display device of the second embodiment shown in FIG. 2, the display signal supply wiring in the column signal electrode drive circuit is divided into four systems (L1, L2, L3, L4) and the column signal electrode Analog switches S1, S of drive circuit
Are divided into four sets, and the first set of analog switches S1, S5, S9,... Is connected to the first display signal supply line L1, and is connected to the second set. Some of the analog switches S2, S6, S10,... Are connected to the second display signal supply line L2, and the third set of analog switches S3, S7, S11,. L3 and a fourth set of analog switches S
, S8, S12,... Are the fourth display signal supply lines L4.
It is connected to the.

The display signal supply lines L1, L2, L
3 and L4 have analog buffers Buf1 and Buf, respectively.
2, Buf3, and Buf4 are connected, and the input terminals of the analog buffers Buf1 and Buf3, and the input terminals of the analog buffers Buf2 and Buf4 are commonly connected. Two analog buffers Buf1 and Buf1 to which these input terminals are connected in common, respectively.
A display signal Video1 parallelized by a two-phase expansion / parallelization circuit (not shown) is input to an input terminal 3 and input terminals of two analog buffers Buf2 and Buf4 are input to
Similarly, the display signal Video2 parallelized by the two-phase expansion / parallelization circuit is supplied.

The horizontal shift register 10 is driven by a horizontal start signal HST and a horizontal shift clock HCK supplied from a drive timing pulse generating circuit (not shown), and outputs from the horizontal shift register 10 are analog switches (S1 and S2), (S3 and S4), (S5 and S6),... Are connected to the respective control terminals. Thereby, in the analog switches (S1 and S2), (S3 and S4), (S5 and S6),..., The display signals Video1 and Video2 developed in two phases by the output pulse of the horizontal shift register 10 in parallel. Sampled.

According to the configuration example of the second embodiment shown in FIG. 2, the display signals Video1, Video1,
The supply lines for supplying Video2 are each divided into two systems (L1 and L3, L2 and L4), and the analog switches S1, S2, S3,... Connected to the respective display signal supply lines L1, L2, L3, L4. Is divided into four sets (S1, S
, S9,... And S2, S6, S10,.
, S3, S7, S11,..., S4, S
8, S12,...) And the number of connections is reduced to ４ of the total number of column signal electrodes. Load capacity can be reduced. As a result, the frequency characteristics of the display signal are improved,
Ghost, which has been a problem in the conventional multi-phase configuration, is improved, and high-quality image display becomes possible.

In the second embodiment,
Display signals are input in two-phase expansion, and two lines (L1, L3, L2, and L4) of display signal supply wiring are provided for each of the two-phase display signals (Video1, Video2) in parallel.
However, the number of development phases of the display signal and the number of wiring divisions for each phase are not limited to these, and are set to optimal values.

Next, FIG. 3 shows a configuration example of a liquid crystal display device according to a third embodiment of the present invention, particularly, only a column signal electrode drive circuit portion. Incidentally, in the case of the third embodiment,
1 are denoted by the same reference numerals as those in FIG. 1 described above, and the row scan electrode drive circuit and the pixel unit are the same as those in FIG. 4 described above. Is omitted.

In the liquid crystal display device according to the third embodiment shown in FIG. 3, two sets (S1) of the analog switches S1, S2, S3,... , S2, S3,..., Si / 2) and (Si / 2 + 1, Si / 2 + 2, Si / 2 + 3,.
, Si) and the display signal supply wiring is divided into two sets L1 and L2 at the center in the horizontal direction.

The first set of analog switches S1, S2,
S3,..., Si / 2 are the first display signal supply lines L
1 and a second set of analog switches Si / 2 +
, Si / 2 + 2, Si / 2 + 3,..., Si are connected to the second display signal supply line L2. The control terminals of the analog switches S1, S2, S3,..., Si are connected one-to-one with the output terminals of each stage of the horizontal shift register 10.

Further, the first and second display signal supply lines L
1 and L2 respectively have analog buffers Buf1 and Buf.
2 are connected, and the respective analog buffers Buf1, Bu
The common display signal Video is supplied to the input terminal side of f2.

The horizontal shift register 10 is driven by a horizontal start signal HST and a horizontal shift clock HCK supplied from a drive timing pulse generation circuit (not shown), and receives analog switches S1, S2, S3,.
Are sequentially turned on. The input terminals of the first set of analog switches S1, S2, S3,.
A display signal Video is supplied from a first display signal supply line L1, and a second set of analog switches Si / 2 + 1, S
The input terminals of i / 2 + 2, Si / 2 + 3,..., Si are connected to the display signal Video from the second display signal supply line L2.
Is supplied.

Each analog switch S1, S2, S3,.
.., Si are sequentially turned on by the output pulse of the horizontal shift register 10 and the display signal Video for one horizontal period
o to the corresponding column signal electrodes D1, D2, D3,.
Sample at i.

In the configuration example of the third embodiment, two sets (S1, S2, S3,..., Si) of the analog switches S1, S2, S3,.
/ 2) and (Si / 2 + 1, Si / 2 + 2, Si / 2 +
3,..., Si) and the display signal supply wiring is divided into two sets L1 and L2 at the center in the horizontal direction. , L2, the number of connections of the analog switches S can be reduced to half, and the wiring length of the display signal supply wiring L itself can be reduced to half of the conventional length.

Further, according to the configuration of the third embodiment, the wiring stray capacitance due to the shortening of the wiring length is further reduced as compared with the configuration of the above-described first embodiment. There is a feature that the load capacity can be further reduced.

As described above, according to the liquid crystal display device of each embodiment of the present invention, the load capacitance of the display signal supply wiring section of the column signal electrode drive circuit can be reduced, and the analog switch of the column signal electrode drive circuit can be reduced. Since the waveform rounding at the input end can be reduced, it is possible to display a high-quality image without horizontal resolution degradation or ghost.

Finally, the description of each of the above embodiments is an example of the present invention, and the present invention is not limited to the above embodiments. For this reason, it goes without saying that various modifications can be made according to the design and the like, other than the above-described embodiments, as long as they do not depart from the technical idea of the present invention.

[0055]

According to the liquid crystal display device of the present invention, a switch for sequentially sampling and transmitting a display signal to a column signal electrode of a plurality of display pixel electrodes arranged in a matrix is provided. In a liquid crystal display device having column signal electrode driving means provided with means, the switch means of the column signal electrode driving means is divided into at least two or more sets and connected to the input terminals of each set of the divided switch means. By providing a plurality of parallel display signal supply wirings and supplying the same display signal to the plurality of display signal supply wirings, the number of switch means connected to each display signal supply wiring is reduced according to the number of divisions It is possible to reduce the load capacitance of the display signal supply wiring portion of the column signal electrode driving means,
Waveform rounding at the analog switch input terminal of the column signal electrode drive circuit can be reduced, and a high-quality image without horizontal resolution degradation and ghost can be displayed.

In the liquid crystal display device according to the second aspect of the present invention, the switch means for sequentially sampling and transmitting the display signal to the column signal electrodes of the plurality of display pixel electrodes arranged in a matrix is provided. In the liquid crystal display device having the column signal electrode driving means provided, the switch means of the column signal electrode driving means is divided into a set of M × N (M ≧ 2, N ≧ 2), and each of the divided switch means is M × N parallel display signal supply wirings connected to the input terminals of the set are provided, and the display signals are converted into M-phase parallel display signals. By supplying the same display signal to the display signal supply line, the number of switch means connected to each display signal supply wiring can be reduced according to the number of divisions, and the load capacitance of the display signal supply wiring portion of the column signal electrode driving means can be reduced. Can be reduced It is possible to reduce waveform rounding at the analog switch input terminal of the column signal electrode drive circuit, display a high-quality image without horizontal resolution degradation and ghost, and display signals according to wiring division. Is unnecessary, and the peripheral circuit can be simplified.

That is, according to the liquid crystal display device of the present invention, the load capacitance of the display signal supply wiring of the column signal electrode driving means is reduced, and for example, the frequency characteristics of the display signal caused by the driving analog buffer and the internal wiring resistance are reduced. Deterioration can be improved. As a result, the waveform rounding at the input end of the switch means, which is the sampling means of the column signal electrode driving means, is reduced, and there is no degradation in horizontal resolution or image quality due to ghosting.
High-quality image display is possible.

[Brief description of the drawings]

FIG. 1 illustrates a liquid crystal display device according to a first embodiment of the present invention.
FIG. 4 is a block diagram showing a configuration example of a column signal electrode drive circuit part.

FIG. 2 shows a liquid crystal display device according to a second embodiment of the present invention.
FIG. 4 is a block diagram showing a configuration example of a column signal electrode drive circuit part.

FIG. 3 shows a liquid crystal display device according to a third embodiment of the present invention;
FIG. 4 is a block diagram showing a configuration example of a column signal electrode drive circuit part.

FIG. 4 is a block diagram showing a configuration example (single-phase input configuration) of a conventional active matrix liquid crystal display device.

FIG. 5 is a circuit diagram showing a configuration example of a display pixel including a switching transistor and an auxiliary capacitor provided at an intersection of each column signal electrode and a row scanning electrode.

FIG. 6 is a block diagram showing a configuration example (polyphase input configuration) of a conventional active matrix type liquid crystal display device.

FIG. 7 is a circuit diagram illustrating a configuration example of an analog switch that samples a display signal in a column signal electrode driving circuit.

FIG. 8 is a circuit diagram for simply describing electrical characteristics of a wiring portion of a display signal supply wiring of a column signal electrode driving circuit in a conventional column signal electrode driving circuit of an active matrix liquid crystal display device.

FIG. 9 is a diagram used to explain the relationship between the number of analog switches connected to a display signal supply wiring and the wiring section capacitance in a column signal electrode drive circuit of a conventional active matrix liquid crystal display device.

FIG. 10 is a diagram used to describe a state of a rounding (waveform deterioration) of a display signal waveform occurring at an input terminal of an analog switch in a column signal electrode driving circuit of a conventional active matrix liquid crystal display device.

FIG. 11 is a view for explaining how a ghost image shifted in the horizontal direction is generated as a result of waveform rounding due to frequency characteristic degradation occurring for each display signal in an active matrix type liquid crystal display device having a multi-phase input configuration. FIG.

[Description of Signs] 10 horizontal shift registers, S1 to Si analog switches, L1 to L4 display signal supply wiring, Buf1 to Bu
f4: Analog buffer, Video1 to Video2
... Display signals, D1 to Di ... Column signal electrodes

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA16 NC12 NC16 NC21 NC22 ND36 NG02 5C006 AA01 AF50 BB13 BB16 BC03 BC13 BC23 BF03 BF25 BF31 EC11 FA22 FA23 FA29 FA37 FA41 GA02 5C080 AA10 BB05 DD05 DD06 EE19 GG11 JJ07 GG07 JJ04 JJ05

Claims (2)

[Claims] 1. A liquid crystal display device comprising: a column signal electrode driving unit including a switch unit for sequentially sampling and transmitting a display signal to a column signal electrode of a plurality of display pixel electrodes arranged in a matrix. The switching means of the column signal electrode driving means is at least 2
Providing a plurality of parallel display signal supply lines connected to input terminals of each set of the divided switch means, wherein the plurality of display signal supply lines are supplied with the same display signal. A liquid crystal display device characterized by the above-mentioned. 2. A liquid crystal display device comprising a column signal electrode driving means including a switch means for sequentially sampling and transmitting a display signal to a column signal electrode of a plurality of display pixel electrodes arranged in a matrix. The switching means of the column signal electrode driving means is M × N (M ≧ M
2, N ≧ 2), and M × N parallel display signal supply wirings connected to the input terminals of each set of the divided switch means are provided, and the display signals are parallelized into M phases. A liquid crystal display device, wherein the same display signal is supplied to each of N display signal supply lines among the display signals of each phase.