JP2001002415A - Cmp polishing agent and method for polishing substrate - Google Patents

Cmp polishing agent and method for polishing substrate

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Publication number
JP2001002415A
JP2001002415A JP11172822A JP17282299A JP2001002415A JP 2001002415 A JP2001002415 A JP 2001002415A JP 11172822 A JP11172822 A JP 11172822A JP 17282299 A JP17282299 A JP 17282299A JP 2001002415 A JP2001002415 A JP 2001002415A
Authority
JP
Japan
Prior art keywords
polishing
cerium oxide
film
polished
cmp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11172822A
Other languages
Japanese (ja)
Other versions
JP4491857B2 (en
Inventor
Naoyuki Koyama
直之 小山
Yoichi Machii
洋一 町井
Masato Yoshida
誠人 吉田
Toranosuke Ashizawa
寅之助 芦沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
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Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP17282299A priority Critical patent/JP4491857B2/en
Publication of JP2001002415A publication Critical patent/JP2001002415A/en
Application granted granted Critical
Publication of JP4491857B2 publication Critical patent/JP4491857B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a CMP(chemical mechanical polishing) polishing agent which is capable of effecting advanced surface planarization and polishing a surface to be polished, such as surface of a silicon oxide insulation film, at a high rate without causing any flaws in the surface by using as the components of the agent, cerium oxide grains, a dispersant, an additive selected from polyacrylamide and its derivatives, and water. SOLUTION: This CMP polishing agent has a composition consisting of cerium oxide grains, a dispersant, an additive selected from polyacrylamide and its derivatives, and water, or alternatively, a composition consisting of a cerium oxide slurry that contains cerium oxide grains, dispersant and water, and an additive liquid that contains an additive and water. This polishing method comprises: pushing a substrate provided with a film to be polished, which film is formed on the surface of a substrate base material, against a polishing cloth of a polishing turntable; then applying a pressure to the substrate; and in that state, moving the substrate and turntable while supplying the CMP polishing agent to between the film to be polished and the polishing cloth, to polish the film to be polished; wherein preferably, the crystallite size of the cerium oxide used is 5-300 nm and desirably, the total content of alkali metals, halogens and sulfur in the cerium oxide grains is controlled so as to be <=10 ppm.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子製造技
術である基板表面の平坦化工程、特に、層間絶縁膜の平
坦化工程、シャロー・トレンチ分離の形成工程等におい
て使用されるCMP研磨剤及びこれらCMP研磨剤を使
用した基板の研磨方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CMP polishing agent used in a flattening process of a substrate surface, which is a semiconductor device manufacturing technology, in particular, a flattening process of an interlayer insulating film, a forming process of shallow trench isolation, and the like. The present invention relates to a method for polishing a substrate using these CMP abrasives.

【0002】[0002]

【従来の技術】現在の超々大規模集積回路では、実装密
度を高める傾向にあり、種々の微細加工技術が研究、開
発されている。既に、デザインルールは、サブハーフミ
クロンのオーダーになっている。このような厳しい微細
化の要求を満足するために開発されている技術の一つに
CMP(ケミカルメカニカルポリッシング)技術があ
る。この技術は、半導体装置の製造工程において、露光
を施す層を完全に平坦化し、露光技術の負担を軽減し、
歩留まりを安定させることができるため、例えば、層間
絶縁膜の平坦化、シャロー・トレンチ分離等を行う際に
必須となる技術である。従来、半導体装置の製造工程に
おいて、プラズマ−CVD(Chemical Vapor Depositio
n 、化学的蒸着法)、低圧−CVD等の方法で形成され
る酸化珪素絶縁膜等無機絶縁膜層を平坦化するためのC
MP研磨剤として、フュームドシリカ系の研磨剤が一般
的に検討されていた。フュームドシリカ系の研磨剤は、
シリカ粒子を四塩化珪酸に熱分解する等の方法で粒成長
させ、pH調整を行って製造している。しかしながら、
この様な研磨剤は無機絶縁膜の研磨速度が十分な速度を
もたず、実用化には低研磨速度という技術課題があっ
た。従来の層間絶縁膜を平坦化するCMP技術では、研
磨速度の基板上被研磨膜のパターン依存性が大きく、パ
ターン密度差或いはサイズ差の大小により凸部の研磨速
度が大きく異なり、また凹部の研磨も進行してしまうた
め、ウエハ面内全体での高いレベルの平坦化を実現する
ことができないという技術課題があった。また、層間膜
を平坦化するCMP技術では、層間膜の途中で研磨を終
了する必要があり、研磨量の制御を研磨時間で行うプロ
セス管理方法が一般的に行われている。しかし、パター
ン段差形状の変化だけでなく、研磨布の状態等でも、研
磨速度が顕著に変化してしまうため、プロセス管理が難
しいという問題があった。デザインルール0. 5μm以
上の世代では、集積回路内の素子分離にLOCOS(シ
リコン局所酸化)が用いられていた。その後さらに加工
寸法が微細化すると素子分離幅の狭い技術が要求され、
シャロー・トレンチ分離が用いられつつある。シャロー
・トレンチ分離では、基板上に成膜した余分の酸化珪素
膜を除くためにCMPが使用され、研磨を停止させるた
めに、酸化珪素膜の下に研磨速度の遅いストッパ膜が形
成される。ストッパ膜には窒化珪素などが使用され、酸
化珪素膜とストッパ膜との研磨速度比が大きいことが望
ましい。
2. Description of the Related Art At present, ultra-large-scale integrated circuits tend to increase the packing density, and various microfabrication techniques have been studied and developed. Already, design rules are on the order of sub-half microns. One of the technologies that have been developed to satisfy such strict requirements for miniaturization is a CMP (Chemical Mechanical Polishing) technology. This technology completely flattens the layer to be exposed in the semiconductor device manufacturing process, reducing the burden of the exposure technology,
Since the yield can be stabilized, the technique is indispensable when performing, for example, planarization of an interlayer insulating film, isolation of a shallow trench, and the like. Conventionally, in a semiconductor device manufacturing process, plasma-CVD (Chemical Vapor Depositio
n, chemical vapor deposition), C for planarizing an inorganic insulating film layer such as a silicon oxide insulating film formed by a method such as low pressure-CVD.
Fumed silica-based abrasives have been generally studied as MP abrasives. Fumed silica abrasives
The silica particles are produced by growing particles by a method such as thermal decomposition of tetrachlorosilicic acid and adjusting the pH. However,
Such an abrasive does not have a sufficient polishing rate for the inorganic insulating film, and there has been a technical problem of a low polishing rate for practical use. In the conventional CMP technique for planarizing an interlayer insulating film, the polishing rate greatly depends on the pattern of a film to be polished on a substrate, and the polishing rate of a convex portion differs greatly depending on the pattern density difference or the size difference. Therefore, there has been a technical problem that high-level planarization over the entire surface of the wafer cannot be realized. Further, in the CMP technique for flattening an interlayer film, it is necessary to end polishing in the middle of the interlayer film, and a process management method of controlling a polishing amount by a polishing time is generally performed. However, there has been a problem that not only the change in the pattern step shape but also the state of the polishing cloth significantly changes the polishing rate, making process management difficult. In the generation of the design rule of 0.5 μm or more, LOCOS (local oxidation of silicon) has been used for element isolation in an integrated circuit. After that, when the processing size becomes finer, the technology of narrow element isolation width is required,
Shallow trench isolation is being used. In the shallow trench isolation, CMP is used to remove an excess silicon oxide film formed on the substrate, and a stopper film having a low polishing rate is formed below the silicon oxide film to stop polishing. Silicon nitride or the like is used for the stopper film, and it is desirable that the polishing rate ratio between the silicon oxide film and the stopper film is large.

【0003】一方、フォトマスクやレンズ等のガラス表
面研磨剤として、酸化セリウム研磨剤が用いられてい
る。酸化セリウム粒子はシリカ粒子やアルミナ粒子に比
べ硬度が低く、したがって、研磨表面に傷が入りにくい
ことから、仕上げ鏡面研磨に有用である。しかしなが
ら、ガラス表面研磨用酸化セリウム研磨剤にはナトリウ
ム塩を含む分散剤を使用しているため、そのまま半導体
用研磨剤として適用することはできない。
On the other hand, cerium oxide abrasives have been used as abrasives for glass surfaces such as photomasks and lenses. Cerium oxide particles have a lower hardness than silica particles and alumina particles and are therefore less likely to scratch the polished surface, and thus are useful for finish mirror polishing. However, since a cerium oxide abrasive for polishing a glass surface uses a dispersant containing a sodium salt, it cannot be directly used as an abrasive for semiconductors.

【0004】[0004]

【発明が解決しようとする課題】本発明は、高平坦化可
能であり、酸化珪素絶縁膜等の被研磨面を傷なく、高速
に研磨することが可能なCMP研磨剤、さらには保存安
定性を改良したCMP研磨剤を提供するものである。又
本発明は、基板の被研磨面を、傷なく、研磨することが
可能な基板の研磨方法を提供するものである。
SUMMARY OF THE INVENTION The present invention relates to a CMP polishing agent which can be highly planarized and can be polished at high speed without damaging the surface to be polished such as a silicon oxide insulating film. It is intended to provide a CMP polishing agent having improved. The present invention also provides a substrate polishing method capable of polishing a surface to be polished of a substrate without flaws.

【0005】[0005]

【課題を解決するための手段】本発明のCMP研磨剤
は、酸化セリウム粒子、分散剤、ポリアクリルアミド及
びその誘導体から選ばれる添加剤並びに水を含むもので
ある。本発明のCMP研磨剤は、酸化セリウム粒子、分
散剤及び水を含む酸化セリウムスラリー並びに添加剤と
水を含む添加液からなることができる。本発明の研磨方
法は、研磨する膜を形成した基板を研磨定盤の研磨布に
押しあて加圧し、上記のCMP研磨剤を研磨膜と研磨布
との間に供給しながら、基板と研磨定盤を動かして研磨
する膜を研磨するものである。
The CMP polishing slurry of the present invention contains cerium oxide particles, a dispersant, an additive selected from polyacrylamide and its derivatives, and water. The CMP polishing slurry of the present invention can be composed of a cerium oxide slurry containing cerium oxide particles, a dispersant and water, and an additive solution containing an additive and water. In the polishing method of the present invention, the substrate on which the film to be polished is formed is pressed against a polishing cloth of a polishing platen and pressurized. The board is moved to polish the film to be polished.

【0006】[0006]

【発明の実施の形態】一般に酸化セリウムは、炭酸塩、
硝酸塩、硫酸塩、しゅう酸塩のセリウム化合物を酸化す
ることによって得られる。TEOS−CVD法等で形成
される酸化珪素膜の研磨に使用する酸化セリウム研磨剤
は、一次粒子径が大きく、かつ結晶ひずみが少ないほ
ど、すなわち結晶性が良いほど高速研磨が可能である
が、研磨傷が入りやすい傾向がある。そこで、本発明で
用いる酸化セリウム粒子は、その製造方法を限定するも
のではないが、酸化セリウム結晶子径は5nm以上30
0nm以下であることが好ましい。また、半導体チップ
研磨に使用することから、アルカリ金属及びハロゲン類
の含有率は酸化セリウム粒子中10ppm以下に抑える
ことが好ましい。
DETAILED DESCRIPTION OF THE INVENTION Generally, cerium oxide is a carbonate,
It is obtained by oxidizing cerium compounds of nitrates, sulfates and oxalates. A cerium oxide abrasive used for polishing a silicon oxide film formed by a TEOS-CVD method or the like can perform high-speed polishing as the primary particle diameter is larger and the crystal distortion is smaller, that is, the crystallinity is better. Polishing scratches tend to occur. Therefore, the cerium oxide particles used in the present invention are not limited to a method for producing the cerium oxide particles.
It is preferably 0 nm or less. Further, since it is used for polishing a semiconductor chip, the content of alkali metals and halogens is preferably suppressed to 10 ppm or less in the cerium oxide particles.

【0007】本発明において、酸化セリウム粉末を作製
する方法として焼成または過酸化水素等による酸化法が
使用できる。焼成温度は350℃以上900℃以下が好
ましい。上記の方法により製造された酸化セリウム粒子
は凝集しているため、機械的に粉砕することが好まし
い。粉砕方法として、ジェットミル等による乾式粉砕や
遊星ビーズミル等による湿式粉砕方法が好ましい。ジェ
ットミルは例えば化学工業論文集第6巻第5号(198
0)527〜532頁に説明されている。
In the present invention, as a method for producing cerium oxide powder, calcination or an oxidation method using hydrogen peroxide or the like can be used. The firing temperature is preferably from 350 ° C. to 900 ° C. Since the cerium oxide particles produced by the above method are agglomerated, it is preferable to mechanically pulverize the particles. As the pulverization method, a dry pulverization method using a jet mill or the like or a wet pulverization method using a planetary bead mill or the like is preferable. The jet mill is described in, for example, Chemical Industry Transactions, Vol. 6, No. 5 (198
0) pages 527-532.

【0008】本発明におけるCMP研磨剤は、例えば、
上記の特徴を有する酸化セリウム粒子と分散剤と水から
なる組成物を分散させ、さらに添加剤を添加することに
よって得られる。ここで、酸化セリウム粒子の濃度に制
限はないが、分散液の取り扱いやすさから0.5重量%
以上20重量%以下の範囲が好ましい。また、分散剤と
して、半導体チップ研磨に使用することから、ナトリウ
ムイオン、カリウムイオン等のアルカリ金属及びハロゲ
ン、イオウの含有率は10ppm以下に抑えることが好
ましく、例えば、共重合成分としてアクリル酸アンモニ
ウム塩を含む高分子分散剤が好ましい。また、共重合成
分としてアクリル酸アンモニウム塩を含む高分子分散剤
と水溶性陰イオン性分散剤、水溶性非イオン性分散剤、
水溶性陽イオン性分散剤、水溶性両性分散剤から選ばれ
た少なくとも1種類を含む2種類以上の分散剤を使用し
てもよい。水溶性陰イオン性分散剤としては、例えば、
ラウリル硫酸トリエタノールアミン、ラウリル硫酸アン
モニウム、ポリオキシエチレンアルキルエーテル硫酸ト
リエタノールアミン、特殊ポリカルボン酸型高分子分散
剤等が挙げられ、水溶性非イオン性分散剤としては、例
えば、ポリオキシエチレンラウリルエーテル、ポリオキ
シエチレンセチルエーテル、ポリオキシエチレンステア
リルエーテル、ポリオキシエチレンオレイルエーテル、
ポリオキシエチレン高級アルコールエーテル、ポリオキ
シエチレンオクチルフェニルエーテル、ポリオキシエチ
レンノニルフェニルエーテル、ポリオキシアルキレンア
ルキルエーテル、ポリオキシエチレン誘導体、ポリオキ
シエチレンソルビタンモノラウレート、ポリオキシエチ
レンソルビタンモノパルミテート、ポリオキシエチレン
ソルビタンモノステアレート、ポリオキシエチレンソル
ビタントリステアレート、ポリオキシエチレンソルビタ
ンモノオレエート、ポリオキシエチレンソルビタントリ
オレエート、テトラオレイン酸ポリオキシエチレンソル
ビット、ポリエチレングリコールモノラウレート、ポリ
エチレングリコールモノステアレート、ポリエチレング
リコールジステアレート、ポリエチレングリコールモノ
オレエート、ポリオキシエチレンアルキルアミン、ポリ
オキシエチレン硬化ヒマシ油、アルキルアルカノールア
ミド等が挙げられ、水溶性陽イオン性分散剤としては、
例えば、ポリビニルピロリドン、ココナットアミンアセ
テート、ステアリルアミンアセテート等が挙げられ、水
溶性両性分散剤としては、例えば、ラウリルベタイン、
ステアリルベタイン、ラウリルジメチルアミンオキサイ
ド、2−アルキル−N−カルボキシメチル−N−ヒドロ
キシエチルイミダゾリニウムベタイン等が挙げられる。
これらの分散剤添加量は、スラリー中の粒子の分散性及
び沈降防止、さらに研磨傷と分散剤添加量との関係から
酸化セリウム粒子100重量部に対して、0.01重量
部以上2.0重量部以下の範囲が好ましい。分散剤の分
子量は、100〜50,000が好ましく、1,000
〜10,000がより好ましい。分散剤の分子量が10
0未満の場合は、酸化珪素膜あるいは窒化珪素膜を研磨
するときに、十分な研磨速度が得られず、分散剤の分子
量が50,000を超えた場合は、粘度が高くなり、C
MP研磨剤の保存安定性が低下するからである。これら
の酸化セリウム粒子を水中に分散させる方法としては、
通常の攪拌機による分散処理の他にホモジナイザー、超
音波分散機、湿式ボールミル等を用いることができる。
こうして作製されたCMP研磨剤中の酸化セリウム粒子
の平均粒径は、0.01μm〜1.0μmであることが
好ましい。酸化セリウム粒子の平均粒径が0.01μm
未満であると研磨速度が低くなりすぎ、1.0μmを超
えると研磨する膜に傷がつきやすくなるからである。
[0008] The CMP abrasive in the present invention is, for example,
It is obtained by dispersing a composition comprising cerium oxide particles having the above characteristics, a dispersant, and water, and further adding an additive. Here, the concentration of the cerium oxide particles is not limited, but is 0.5% by weight from the viewpoint of easy handling of the dispersion.
The range is preferably not less than 20% by weight and not more than 20% by weight. In addition, since it is used as a dispersant for polishing semiconductor chips, the content of alkali metals such as sodium ions and potassium ions, halogens, and sulfur is preferably suppressed to 10 ppm or less. For example, ammonium acrylate as a copolymerization component A polymer dispersant containing is preferred. Also, a polymer dispersant containing ammonium acrylate as a copolymer component and a water-soluble anionic dispersant, a water-soluble nonionic dispersant,
Two or more dispersants including at least one selected from a water-soluble cationic dispersant and a water-soluble amphoteric dispersant may be used. As the water-soluble anionic dispersant, for example,
Triethanolamine lauryl sulfate, ammonium lauryl sulfate, polyoxyethylene alkyl ether triethanolamine sulfate, special polycarboxylic acid type polymer dispersants, and the like.Examples of water-soluble nonionic dispersants include polyoxyethylene lauryl ether. , Polyoxyethylene cetyl ether, polyoxyethylene stearyl ether, polyoxyethylene oleyl ether,
Polyoxyethylene higher alcohol ether, polyoxyethylene octyl phenyl ether, polyoxyethylene nonyl phenyl ether, polyoxyalkylene alkyl ether, polyoxyethylene derivative, polyoxyethylene sorbitan monolaurate, polyoxyethylene sorbitan monopalmitate, polyoxy Ethylene sorbitan monostearate, polyoxyethylene sorbitan tristearate, polyoxyethylene sorbitan monooleate, polyoxyethylene sorbitan trioleate, polyoxyethylene sorbite tetraoleate, polyethylene glycol monolaurate, polyethylene glycol monostearate, polyethylene Glycol distearate, polyethylene glycol monooleate, poly Carboxymethyl ethylene alkyl amines, polyoxyethylene hardened castor oil, and alkyl alkanolamide. Examples of the water-soluble cationic dispersant,
For example, polyvinylpyrrolidone, coconutamine acetate, stearylamine acetate and the like, and as the water-soluble amphoteric dispersant, for example, lauryl betaine,
Examples include stearyl betaine, lauryl dimethylamine oxide, 2-alkyl-N-carboxymethyl-N-hydroxyethyl imidazolinium betaine.
These dispersing agents are added in an amount of 0.01 to 2.0 parts by weight based on 100 parts by weight of the cerium oxide particles from the relationship between the dispersibility of the particles in the slurry and the prevention of sedimentation, and the relationship between the polishing scratches and the amount of the dispersing agent added. A range of not more than parts by weight is preferred. The molecular weight of the dispersant is preferably from 100 to 50,000, and preferably 1,000 to 50,000.
-10,000 is more preferable. When the molecular weight of the dispersant is 10
If it is less than 0, a sufficient polishing rate cannot be obtained when polishing a silicon oxide film or a silicon nitride film, and if the molecular weight of the dispersant exceeds 50,000, the viscosity becomes high and C
This is because the storage stability of the MP abrasive decreases. As a method of dispersing these cerium oxide particles in water,
A homogenizer, an ultrasonic disperser, a wet ball mill, or the like can be used in addition to the dispersion treatment using an ordinary stirrer.
The average particle size of the cerium oxide particles in the CMP polishing slurry thus produced is preferably 0.01 μm to 1.0 μm. Average particle size of cerium oxide particles is 0.01 μm
If it is less than 1.0 μm, the polishing rate becomes too low, and if it exceeds 1.0 μm, the film to be polished is easily damaged.

【0009】また、添加剤には、ポリアクリルアミド及
びその誘導体が好ましい。ポリアクリルアミドの誘導体
としては、ポリアクリルアミド部分加水分解物等が好ま
しく使用される。添加剤の添加量は、CMP研磨剤中の
粒子の分散性及び沈降防止、さらに研磨傷と添加剤添加
量との関係から酸化セリウム粒子100重量部に対し
て、0.1重量部以上100重量部以下の範囲が好まし
い。添加量が少なすぎると添加剤の添加効果が得られ
ず、多すぎると研磨速度が低下するためである。またポ
リアクリルアミドの分子量は、10,000以上が好ま
しい。分子量が低すぎると平坦化特性が得られないため
である。
Further, polyacrylamide and its derivatives are preferred as additives. As the polyacrylamide derivative, a polyacrylamide partial hydrolyzate or the like is preferably used. The additive amount of the additive is 0.1 parts by weight or more and 100 parts by weight with respect to 100 parts by weight of cerium oxide particles from the relationship between the dispersibility of the particles in the CMP abrasive and the prevention of sedimentation, and the relationship between the polishing scratches and the additive amount. Parts or less are preferred. If the amount is too small, the effect of adding the additive cannot be obtained, and if the amount is too large, the polishing rate is reduced. The molecular weight of polyacrylamide is preferably 10,000 or more. If the molecular weight is too low, flattening characteristics cannot be obtained.

【0010】酸化セリウム粒子、分散剤、及び水からな
る酸化セリウムスラリーと、添加剤及び水からなる添加
液とを分けたCMP研磨剤として保存すると酸化セリウ
ム粒子が凝集しないため、保存安定性が増し、研磨傷の
発生防止、研磨速度の安定化が得られて好ましい。上記
のCMP研磨剤で基板を研磨する際に、添加液は、酸化
セリウムスラリーと別々に研磨定盤上に供給し、研磨定
盤上で混合するか、研磨直前に酸化セリウムスラリーと
混合し研磨定盤上に供給する方法がとられる。
When a cerium oxide slurry containing cerium oxide particles, a dispersant, and water and an additive solution containing an additive and water are stored as a separate CMP abrasive, the cerium oxide particles do not agglomerate, thereby increasing the storage stability. This is preferable because it can prevent generation of polishing scratches and stabilize the polishing rate. When polishing a substrate with the above-mentioned CMP abrasive, the additive liquid is supplied separately to the polishing platen and the cerium oxide slurry, and mixed on the polishing platen, or mixed with the cerium oxide slurry immediately before polishing. The method of supplying on a surface plate is taken.

【0011】本発明のCMP研磨剤は、上記CMP研磨
剤をそのまま使用してもよいが、アンモニア、N,N−
ジエチルエタノールアミン、N,N−ジメチルエタノー
ルアミン、アミノエチルエタノールアミン、ポリアクリ
ル酸及びその誘導体のアンモニウム塩等の添加剤を添加
してCMP研磨剤とすることができる。
As the CMP polishing slurry of the present invention, the above-mentioned CMP polishing slurry may be used as it is, but ammonia, N, N-
Additives such as diethylethanolamine, N, N-dimethylethanolamine, aminoethylethanolamine, and ammonium salts of polyacrylic acid and its derivatives can be added to make a CMP polishing agent.

【0012】本発明のCMP研磨剤が使用される無機絶
縁膜の作製方法として、低圧CVD法、プラズマCVD
法等が挙げられる。低圧CVD法による酸化珪素膜形成
は、Si源としてモノシラン:SiH4 、酸素源として
酸素:O2 を用いる。このSiH4 −O2 系酸化反応を
400℃以下の低温で行わせることにより得られる。場
合によっては、CVD後1000℃またはそれ以下の温
度で熱処理される。高温リフローによる表面平坦化を図
るためにリン:Pをドープするときには、SiH4 −O
2 −PH3 系反応ガスを用いることが好ましい。プラズ
マCVD法は、通常の熱平衡下では高温を必要とする化
学反応が低温でできる利点を有する。プラズマ発生法に
は、容量結合型と誘導結合型の2つが挙げられる。反応
ガスとしては、Si源としてSiH4 、酸素源としてN
2 Oを用いたSiH4 −N2 O系ガスとテトラエトキシ
シラン(TEOS)をSi源に用いたTEOS−O2
ガス(TEOS−プラズマCVD法)が挙げられる。基
板温度は250℃〜400℃、反応圧力は67〜400
Paの範囲が好ましい。このように、本発明の酸化珪素
膜にはリン、ホウ素等の元素がドープされていても良
い。同様に、低圧CVD法による窒化珪素膜形成は、S
i源としてジクロルシラン:SiH2 Cl2 、窒素源と
してアンモニア:NH3 を用いる。このSiH2 Cl2
−NH3 系酸化反応を900℃の高温で行わせることに
より得られる。プラズマCVD法は、反応ガスとして
は、Si源としてSiH4 、窒素源としてNH3 を用い
たSiH4−NH3 系ガスが挙げられる。基板温度は3
00℃〜400℃が好ましい。
As a method of forming an inorganic insulating film using the CMP polishing slurry of the present invention, low pressure CVD, plasma CVD, etc.
And the like. In forming a silicon oxide film by low-pressure CVD, monosilane: SiH 4 is used as a Si source, and oxygen: O 2 is used as an oxygen source. This is obtained by performing the SiH 4 —O 2 -based oxidation reaction at a low temperature of 400 ° C. or less. In some cases, heat treatment is performed at a temperature of 1000 ° C. or lower after CVD. When doping phosphorus: P for planarizing the surface by high temperature reflow, SiH 4 —O
It is preferred to use 2 -PH 3 system reaction gas. The plasma CVD method has an advantage that a chemical reaction requiring a high temperature can be performed at a low temperature under normal thermal equilibrium. The plasma generation method includes two types, a capacitive coupling type and an inductive coupling type. As a reaction gas, SiH 4 is used as a Si source, and N 2 is used as an oxygen source.
2 O The SiH 4 -N 2 O-based gas and TEOS-O 2 based gas of tetraethoxysilane (TEOS) was used in the Si source used (TEOS-plasma CVD method). The substrate temperature is 250 ° C to 400 ° C, and the reaction pressure is 67 to 400.
The range of Pa is preferable. As described above, the silicon oxide film of the present invention may be doped with elements such as phosphorus and boron. Similarly, silicon nitride film formation by low pressure CVD
Dichlorosilane: SiH 2 Cl 2 is used as an i source, and ammonia: NH 3 is used as a nitrogen source. This SiH 2 Cl 2
It can be obtained by performing an -NH 3 -based oxidation reaction at a high temperature of 900 ° C. In the plasma CVD method, a SiH 4 —NH 3 gas using SiH 4 as a Si source and NH 3 as a nitrogen source is used as a reaction gas. Substrate temperature is 3
00 ° C to 400 ° C is preferred.

【0013】基板として、半導体基板すなわち回路素子
と配線パターンが形成された段階の半導体基板、回路素
子が形成された段階の半導体基板等の半導体基板上に酸
化珪素膜層あるいは窒化珪素膜層が形成された基板が使
用できる。このような半導体基板上に形成された酸化珪
素膜層あるいは窒化珪素膜層を上記CMP研磨剤で研磨
することによって、酸化珪素膜層表面の凹凸を解消し、
半導体基板全面にわたって平滑な面とすることができ
る。また、シャロー・トレンチ分離にも使用できる。シ
ャロー・トレンチ分離に使用するためには、酸化珪素膜
研磨速度と窒化珪素膜研磨速度の比、酸化珪素膜研磨速
度/窒化珪素膜研磨速度が10以上であることが必要で
ある。この比が10未満では、酸化珪素膜研磨速度と窒
化珪素膜研磨速度の差が小さく、シャロー・トレンチ分
離をする際、所定の位置で研磨を停止することができな
くなるためである。この比が10以上の場合は窒化珪素
膜の研磨速度がさらに小さくなって研磨の停止が容易に
なり、シャロー・トレンチ分離により好適である。ま
た、シャロー・トレンチ分離に使用するためには、研磨
時に傷の発生が少ないことが必要である。ここで、研磨
する装置としては、半導体基板を保持するホルダーと研
磨布(パッド)を貼り付けた(回転数が変更可能なモー
タ等を取り付けてある)定盤を有する一般的な研磨装置
が使用できる。研磨布としては、一般的な不織布、発泡
ポリウレタン、多孔質フッ素樹脂などが使用でき、特に
制限がない。また、研磨布にはCMP研磨剤がたまるよ
うな溝加工を施すことが好ましい。研磨条件には制限は
ないが、定盤の回転速度は半導体基板が飛び出さないよ
うに200rpm以下の低回転が好ましく、半導体基板
にかける圧力は研磨後に傷が発生しないように1kg/
cm2 以下が好ましい。研磨している間、研磨布にはス
ラリーをポンプ等で連続的に供給する。この供給量に制
限はないが、研磨布の表面が常にスラリーで覆われてい
ることが好ましい。
As a substrate, a silicon oxide film layer or a silicon nitride film layer is formed on a semiconductor substrate such as a semiconductor substrate in which circuit elements and wiring patterns are formed, and a semiconductor substrate in which circuit elements are formed. Substrate can be used. By polishing the silicon oxide film layer or the silicon nitride film layer formed on such a semiconductor substrate with the above-mentioned CMP polishing agent, the unevenness on the surface of the silicon oxide film layer is eliminated,
A smooth surface can be provided over the entire surface of the semiconductor substrate. It can also be used for shallow trench isolation. For use in shallow trench isolation, it is necessary that the ratio of the polishing rate of the silicon oxide film to the polishing rate of the silicon nitride film and the polishing rate of the silicon oxide film / the polishing rate of the silicon nitride film be 10 or more. If the ratio is less than 10, the difference between the polishing rate of the silicon oxide film and the polishing rate of the silicon nitride film is small, and it becomes impossible to stop polishing at a predetermined position when performing shallow trench isolation. When this ratio is 10 or more, the polishing rate of the silicon nitride film is further reduced, and the polishing can be easily stopped, which is more suitable for shallow trench isolation. In addition, in order to use it for shallow trench isolation, it is necessary that the generation of scratches during polishing be small. Here, as a polishing apparatus, a general polishing apparatus having a holder for holding a semiconductor substrate and a platen on which a polishing cloth (pad) is attached (a motor or the like capable of changing the number of rotations is attached) is used. it can. As the polishing cloth, general nonwoven fabric, foamed polyurethane, porous fluororesin and the like can be used, and there is no particular limitation. Further, it is preferable that the polishing cloth is subjected to a groove processing for accumulating a CMP abrasive. The polishing conditions are not limited, but the rotation speed of the surface plate is preferably 200 rpm or less so that the semiconductor substrate does not jump out, and the pressure applied to the semiconductor substrate is 1 kg / kg so as not to cause scratches after polishing.
cm 2 or less is preferred. During polishing, the slurry is continuously supplied to the polishing cloth by a pump or the like. Although the supply amount is not limited, it is preferable that the surface of the polishing pad is always covered with the slurry.

【0014】研磨終了後の半導体基板は、流水中で良く
洗浄後、スピンドライヤ等を用いて半導体基板上に付着
した水滴を払い落としてから乾燥させることが好まし
い。このようにして平坦化されたシャーロー・トレンチ
を形成したあと、酸化珪素絶縁膜層の上に、アルミニウ
ム配線を形成し、その配線間及び配線上に再度上記方法
により酸化珪素絶縁膜を形成後、上記CMP研磨剤を用
いて研磨することによって、絶縁膜表面の凹凸を解消
し、半導体基板全面にわたって平滑な面とする。この工
程を所定数繰り返すことにより、所望の層数の半導体を
製造する。
After the polishing is completed, the semiconductor substrate is preferably washed well in running water, and then dried using a spin drier or the like to remove water droplets adhering to the semiconductor substrate. After forming the shallow trench thus flattened, an aluminum wiring is formed on the silicon oxide insulating film layer, and a silicon oxide insulating film is formed again between the wirings and on the wiring by the above method. By polishing using the above-mentioned CMP polishing agent, irregularities on the surface of the insulating film are eliminated, and a smooth surface is formed over the entire surface of the semiconductor substrate. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

【0015】グローバル平坦化を達成するには、添加剤
が酸化珪素膜表面に吸着し被膜を形成することが必要で
ある。酸化珪素膜上に形成された添加剤の被膜は、酸化
セリウム粒子の被研磨膜表面への作用を阻害し、結果と
して研磨速度を低下させる。一方、高研磨荷重では酸化
セリウム粒子が添加剤の被膜を突き破り研磨速度が増大
する。被研磨膜(酸化珪素膜)に凹凸が存在する場合、
凸部の実効研磨荷重が凹部に比較して大きいため、凸部
が選択的に研磨され、パターン依存性の少ないグローバ
ル平坦化が達成可能である。ここで、酸化珪素膜及び窒
化珪素膜表面の電荷はpHにより大きく依存し、また、
イオン性の添加剤を用いた場合、その電離度はpHに大
きく依存するため、イオン性添加剤と被研磨膜が吸着す
るには、厳密なpH管理が要求される場合が多い。しか
し、本発明のポリアクリルアミド添加剤は、ノニオン性
であるため、被研磨膜と疎水的に物理吸着するため、p
Hに依存しない一定の研磨速度が期待可能であり、厳密
なpH管理を必要としないという利点がある。
In order to achieve global flattening, it is necessary that an additive is adsorbed on the surface of the silicon oxide film to form a film. The additive film formed on the silicon oxide film inhibits the action of the cerium oxide particles on the surface of the film to be polished, and as a result, reduces the polishing rate. On the other hand, at a high polishing load, the cerium oxide particles break through the additive film and the polishing rate increases. If the film to be polished (silicon oxide film) has irregularities,
Since the effective polishing load of the convex portion is larger than that of the concave portion, the convex portion is selectively polished, and global flattening with little pattern dependency can be achieved. Here, the charges on the surfaces of the silicon oxide film and the silicon nitride film greatly depend on pH, and
When an ionic additive is used, the degree of ionization greatly depends on the pH. Therefore, strict pH control is often required for the ionic additive and the film to be polished to be adsorbed. However, since the polyacrylamide additive of the present invention is nonionic, it physically adsorbs hydrophobically to the film to be polished,
A constant polishing rate independent of H can be expected, and there is an advantage that strict pH control is not required.

【0016】また、電解質である添加剤をスラリーと混
合する場合、添加剤を大量に用いると、塩析のため粒子
が沈降し、保存安定性に問題があった。本発明のポリア
クリルアミド添加剤は、ノニオン性であるため、保存安
定性に優れるという特長がある。
In addition, when an additive, which is an electrolyte, is mixed with a slurry, if a large amount of the additive is used, particles precipitate due to salting out, and there is a problem in storage stability. Since the polyacrylamide additive of the present invention is nonionic, it has a feature of being excellent in storage stability.

【0017】本発明のCMP研磨剤は、半導体基板に形
成された酸化珪素膜だけでなく、所定の配線を有する配
線板に形成された酸化珪素膜、ガラス、窒化珪素等の無
機絶縁膜、ポリシリコン、Al、Cu、Ti、TiN、
W、Ta、TaN等を主として含有する膜、フォトマス
ク・レンズ・プリズム等の光学ガラス、ITO等の無機
導電膜、ガラス及び結晶質材料で構成される光集積回路
・光スイッチング素子・光導波路、光ファイバーの端
面、シンチレータ等の光学用単結晶、固体レーザ単結
晶、青色レーザLED用サファイヤ基板、SiC、Ga
P、GaAS等の半導体単結晶、磁気ディスク用ガラス
基板、磁気ヘッド等を研磨することができる。
The CMP polishing slurry of the present invention can be used not only for a silicon oxide film formed on a semiconductor substrate, but also for a silicon oxide film formed on a wiring board having predetermined wiring, an inorganic insulating film such as glass and silicon nitride, and a polycrystalline silicon oxide. Silicon, Al, Cu, Ti, TiN,
A film mainly containing W, Ta, TaN, etc .; an optical glass such as a photomask / lens / prism; an inorganic conductive film such as ITO; an optical integrated circuit / optical switching element / optical waveguide composed of glass and a crystalline material; Optical fiber end face, optical single crystal such as scintillator, solid-state laser single crystal, sapphire substrate for blue laser LED, SiC, Ga
A semiconductor single crystal such as P or GaAs, a glass substrate for a magnetic disk, a magnetic head, or the like can be polished.

【0018】[0018]

【実施例】実施例1 (酸化セリウム粒子の作製)炭酸セリウム水和物2kg
を白金製容器に入れ、800℃で2時間空気中で焼成す
ることにより黄白色の粉末を約1kg得た。この粉末を
X線回折法で相同定を行ったところ酸化セリウムである
ことを確認した。焼成粉末粒子径は30〜100μmで
あった。焼成粉末粒子表面を走査型電子顕微鏡で観察し
たところ、酸化セリウムの粒界が観察された。粒界に囲
まれた酸化セリウム一次粒子径を測定したところ、体積
分布の中央値が190nm、最大値が500nmであっ
た。酸化セリウム粉末1kgをジェットミルを用いて乾
式粉砕を行った。粉砕粒子について走査型電子顕微鏡で
観察したところ、一次粒子径と同等サイズの小さな粒子
の他に、1〜3μmの大きな粉砕残り粒子と0.5〜1
μmの粉砕残り粒子が混在していた。
EXAMPLES Example 1 (Preparation of cerium oxide particles) 2 kg of cerium carbonate hydrate
Was placed in a platinum container, and calcined at 800 ° C. for 2 hours in the air to obtain about 1 kg of a yellowish white powder. When this powder was subjected to phase identification by an X-ray diffraction method, it was confirmed that the powder was cerium oxide. The particle diameter of the calcined powder was 30 to 100 μm. When the surface of the fired powder particles was observed with a scanning electron microscope, grain boundaries of cerium oxide were observed. When the primary particle diameter of cerium oxide surrounded by the grain boundaries was measured, the median of the volume distribution was 190 nm and the maximum was 500 nm. 1 kg of cerium oxide powder was dry-ground using a jet mill. Observation of the pulverized particles with a scanning electron microscope revealed that, in addition to the small particles having the same size as the primary particle diameter, large pulverized residual particles of 1 to 3 μm and 0.5 to 1
Residual particles of μm were mixed.

【0019】(酸化セリウムスラリーの作製)上記作製
の酸化セリウム粒子1kgとポリアクリル酸アンモニウ
ム塩水溶液(40重量%)23gと脱イオン水8977
gを混合し、撹拌しながら超音波分散を10分間施し
た。得られたスラリーを1ミクロンフィルターでろ過を
し、さらに脱イオン水を加えることにより5wt%スラ
リーを得た。スラリーpHは8.3であった。スラリー
粒子をレーザ回折式粒度分布計で測定するために、適当
な濃度に希釈して測定した結果、粒子径の中央値が19
0nmであった。上記の酸化セリウムスラリー(固形
分:5重量%)600gと添加剤として分子量900,
000のポリアクリルアミド36gと脱イオン水236
4gを混合して、界面活性剤を添加した酸化セリウム研
磨剤(固形分:1重量%)を作製した。その研磨剤pH
は6.5であった。また、研磨剤中の粒子をレーザ回折
式粒度分布計で測定するために、適当な濃度に希釈して
測定した結果、粒子径の中央値が190nmであった。
(Preparation of Cerium Oxide Slurry) 1 kg of the cerium oxide particles prepared above, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight), and 8977 of deionized water
g was mixed and subjected to ultrasonic dispersion for 10 minutes while stirring. The obtained slurry was filtered through a 1-micron filter, and further 5% by weight of slurry was obtained by adding deionized water. The slurry pH was 8.3. In order to measure the slurry particles with a laser diffraction type particle size distribution analyzer, the slurry particles were diluted to an appropriate concentration and measured.
It was 0 nm. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and a molecular weight of 900 as an additive,
36 g of polyacrylamide and 236 deionized water
4 g were mixed to prepare a cerium oxide abrasive (solid content: 1% by weight) to which a surfactant was added. The abrasive pH
Was 6.5. Further, in order to measure the particles in the abrasive with a laser diffraction particle size distribution analyzer, the particles were diluted to an appropriate concentration and measured. As a result, the median value of the particle diameter was 190 nm.

【0020】(絶縁膜層の研磨)φ200mmSi基板
上にLine/Space 幅が0.05〜5mmで高さが100
0nmのAl配線Line部を形成した後、その上にTEO
S−プラズマCVD法で酸化珪素膜を2000nm形成
したパターンウエハを作製する。保持する基板取り付け
用の吸着パッドを貼り付けたホルダーに上記パターンウ
エハをセットし、多孔質ウレタン樹脂製の研磨パッドを
貼り付けたφ600mmの定盤上に絶縁膜面を下にして
ホルダーを載せ、さらに加工荷重を300gf/cm2
に設定した。定盤上に上記の酸化セリウム研磨剤(固形
分:1重量%)を200cc/minの速度で滴下しな
がら、定盤及びウエハを50rpmで2分間回転させ、
絶縁膜を研磨した。研磨後のウエハを純水で良く洗浄
後、乾燥した。同様に、研磨時間を3分、4分、5分、
6分にして上記パターンウエハの研磨を行った。光干渉
式膜厚測定装置を用いて、研磨前後の膜厚差を測定し、
研磨速度を計算した。Line/Space 幅1mmのLine部分
の研磨速度R1 とLine/Space 幅3mmのLine部分の研
磨速度R3 、及びLine/Space 幅5mmのLine部分の研
磨速度R5 との研磨速度比R5 /R1 及びR3 /R
1 は、研磨時間2〜4分の間は、研磨時間とともに値が
大きくなり、研磨時間4〜6分ではほぼ一定であった。
研磨速度のパターン幅依存性が一定になった研磨時間4
分の場合、Line/Space 幅1mmのLine部分の研磨速度
1 は344nm/分(研磨量1377nm)、Line/
Space 幅3mmのLine部分の研磨速度R3 は335nm
/分(研磨量1338nm)、Line/Space 幅5mmの
Line部分の研磨速度R5 は315nm/分(研磨量12
59nm)であり、研磨速度比R5 /R1 及びR3 /R
1 は、それぞれ0.91及び0.97であった。また、
研磨時間が5分、6分の場合の各Line/Space 幅のLine
部分の研磨量は4分の場合とほぼ同じであり、4分以降
研磨がほとんど進行していないことがわかった。
(Polishing of insulating film layer) Line / Space width is 0.05 to 5 mm and height is 100
After forming a 0 nm Al wiring line part, TEO
A patterned wafer having a silicon oxide film formed to a thickness of 2000 nm by S-plasma CVD is manufactured. The pattern wafer was set on a holder to which a suction pad for attaching a substrate to be held was attached, and the holder was placed with the insulating film face down on a φ600 mm platen to which a polishing pad made of porous urethane resin was attached, Further, the processing load is 300 gf / cm 2
Set to. While dropping the cerium oxide abrasive (solid content: 1% by weight) at a rate of 200 cc / min on the platen, the platen and the wafer were rotated at 50 rpm for 2 minutes,
The insulating film was polished. The polished wafer was thoroughly washed with pure water and then dried. Similarly, polishing time is 3 minutes, 4 minutes, 5 minutes,
The pattern wafer was polished for 6 minutes. Using a light interference type film thickness measurement device, measure the film thickness difference before and after polishing,
The polishing rate was calculated. Line / polishing rate of the Line portion of Space width 1 mm R 1 and Line / polishing rate of the Line portion of Space width 3 mm R 3, and Line / Space polishing rate ratio of the polishing speed R 5 of the Line portion of width 5 mm R 5 / R 1 and R 3 / R
In No. 1 , the value increased with the polishing time during the polishing time of 2 to 4 minutes, and was substantially constant during the polishing time of 4 to 6 minutes.
Polishing time when the pattern width dependence of the polishing rate became constant 4
For minutes, the polishing rate R 1 of the Line portion of Line / Space Width 1mm is 344 nm / min (amount of polishing 1377nm), Line /
Polishing rate R 3 of the Line portion of Space width 3mm is 335nm
/ Min (polishing amount 1338nm), Line / Space width 5mm
Polishing rate R 5 of the Line portion 315 nm / min (amount of polishing 12
59 nm), and the polishing rate ratios R 5 / R 1 and R 3 / R
1 was 0.91 and 0.97, respectively. Also,
Line of each Line / Space width when polishing time is 5 minutes and 6 minutes
The polishing amount of the portion was almost the same as that in the case of 4 minutes, and it was found that the polishing hardly progressed after 4 minutes.

【0021】比較例1 (酸化セリウム粒子の作製)炭酸セリウム水和物2kg
を白金製容器に入れ、800℃で2時間空気中で焼成す
ることにより黄白色の粉末を約1kg得た。この粉末を
X線回折法で相同定を行ったところ酸化セリウムである
ことを確認した。焼成粉末粒子径は30〜100μmで
あった。焼成粉末粒子表面を走査型電子顕微鏡で観察し
たところ、酸化セリウムの粒界が観察された。粒界に囲
まれた酸化セリウム一次粒子径を測定したところ、体積
分布の中央値が190nm、最大値が500nmであっ
た。酸化セリウム粉末1kgをジェットミルを用いて乾
式粉砕を行った。粉砕粒子について走査型電子顕微鏡で
観察したところ、一次粒子径と同等サイズの小さな粒子
の他に、1〜3μmの大きな粉砕残り粒子と0.5〜1
μmの粉砕残り粒子が混在していた。
Comparative Example 1 (Preparation of cerium oxide particles) 2 kg of cerium carbonate hydrate
Was placed in a platinum container, and calcined at 800 ° C. for 2 hours in the air to obtain about 1 kg of a yellowish white powder. When this powder was subjected to phase identification by an X-ray diffraction method, it was confirmed that the powder was cerium oxide. The particle diameter of the calcined powder was 30 to 100 μm. When the surface of the fired powder particles was observed with a scanning electron microscope, grain boundaries of cerium oxide were observed. When the primary particle diameter of cerium oxide surrounded by the grain boundaries was measured, the median of the volume distribution was 190 nm and the maximum was 500 nm. 1 kg of cerium oxide powder was dry-ground using a jet mill. Observation of the pulverized particles with a scanning electron microscope revealed that, in addition to the small particles having the same size as the primary particle diameter, large pulverized residual particles of 1 to 3 μm and 0.5 to 1
Residual particles of μm were mixed.

【0022】(酸化セリウムスラリーの作製)上記作製
の酸化セリウム粒子1kgとポリアクリル酸アンモニウ
ム塩水溶液(40重量%)23gと脱イオン水8977
gを混合し、撹拌しながら超音波分散を10分間施し
た。得られたスラリーを1ミクロンフィルターでろ過を
し、さらに脱イオン水を加えることにより5wt%研磨
剤を得た。スラリーpHは8.3であった。上記の酸化
セリウムスラリー(固形分:5重量%)600gと脱イ
オン水2400gを混合して、酸化セリウム研磨剤(固
形分:1重量%)を作製した。その研磨剤pHは7.4
であり、また、研磨剤中の粒子をレーザ回折式粒度分布
計で測定するために、適当な濃度に希釈して測定した結
果、粒子径の中央値が190nmであった。
(Preparation of cerium oxide slurry) 1 kg of the cerium oxide particles prepared above, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight), and deionized water 8977
g was mixed and subjected to ultrasonic dispersion for 10 minutes while stirring. The obtained slurry was filtered through a 1-micron filter, and 5% by weight of an abrasive was obtained by adding deionized water. The slurry pH was 8.3. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and 2400 g of deionized water were mixed to prepare a cerium oxide abrasive (solid content: 1% by weight). The pH of the abrasive is 7.4
In addition, in order to measure the particles in the abrasive with a laser diffraction type particle size distribution analyzer, the particles were diluted to an appropriate concentration and measured. As a result, the median value of the particle diameter was 190 nm.

【0023】(絶縁膜層の研磨)φ200mmSi基板
上にLine/Space 幅が0.05〜5mmで高さが100
0nmのAl配線のLine部を形成した後、その上にTE
OS−プラズマCVD法で酸化珪素膜を2000nm形
成したパターンウエハを作製する。保持する基板取り付
け用の吸着パッドを貼り付けたホルダーに上記パターン
ウエハをセットし、多孔質ウレタン樹脂製の研磨パッド
を貼り付けたφ600mmの定盤上に絶縁膜面を下にし
てホルダーを載せ、さらに加工荷重を300g/cm2
に設定した。定盤上に上記の酸化セリウムスラリー(固
形分:1重量%)を200cc/minの速度で滴下し
ながら、定盤及びウエハを50rpmで1分間回転さ
せ、絶縁膜を研磨した。研磨後のウエハを純水で良く洗
浄後、乾燥した。同様に、研磨時間を1.5分、2分に
して上記パターンウエハの研磨を行った。Line/Space
幅1mmのLine部分の研磨速度R1 とLine/Space 幅3
mmのLine部分の研磨速度R3 、及びLine/Space 幅5
mmのLine部分の研磨速度R5 との研磨速度比R5 /R
1 及びR3 /R1 は、研磨時間1〜2分の間ではほぼ一
定であった。研磨速度のパターン幅依存性が研磨時間に
より一定である研磨時間が1.5分の場合、Line/Spac
e 幅1mmのLine部分の研磨速度R1 は811nm/分
(研磨量1216nm)、Line/Space 幅3mmのLine
部分の研磨速度R3 は616nm/分(研磨量924n
m)、Line/Space 幅5mmのLine部分の研磨速度R5
は497nm/分(研磨量746nm)であり、研磨速
度比R5 /R1 及びR3 /R1 は、それぞれ0.61及
び0.76であった。研磨時間2分では、Line/Space
幅0.05〜1mmのLine部分で、研磨が酸化珪素膜の
下地のAl配線まで達してしまった。
(Polishing of insulating film layer) Line / Space width is 0.05 to 5 mm and height is 100
After forming a line portion of 0 nm Al wiring, TE
A pattern wafer in which a silicon oxide film is formed to a thickness of 2000 nm by an OS-plasma CVD method is manufactured. The pattern wafer was set on a holder to which a suction pad for attaching a substrate to be held was attached, and the holder was placed with the insulating film face down on a φ600 mm platen to which a polishing pad made of porous urethane resin was attached, Further processing load is 300g / cm 2
Set to. While the cerium oxide slurry (solid content: 1% by weight) was dropped at a rate of 200 cc / min on the platen, the platen and the wafer were rotated at 50 rpm for 1 minute to polish the insulating film. The polished wafer was thoroughly washed with pure water and then dried. Similarly, the polishing of the pattern wafer was performed with a polishing time of 1.5 minutes and 2 minutes. Line / Space
Polishing rate of the Line portion of width 1 mm R 1 and Line / Space Width 3
Polishing speed R 3 of Line part of mm and Line / Space width 5
polishing rate ratio between the polishing rate R 5 of the Line portion of mm R 5 / R
1 and R 3 / R 1 were almost constant during the polishing time of 1 to 2 minutes. When the polishing time is 1.5 minutes in which the pattern width dependence of the polishing rate is constant depending on the polishing time, Line / Spac
e polishing rate R 1 of the Line portion of the width 1mm is 811 nm / min (amount of polishing 1216nm), Line / Space Width 3mm of Line
The polishing rate R 3 of the portion is 616 nm / min (the polishing amount is 924 n
m), Line / Space Polishing rate R 5 of a line part with a width of 5 mm
Was 497 nm / min (polishing amount: 746 nm), and the polishing rate ratios R 5 / R 1 and R 3 / R 1 were 0.61 and 0.76, respectively. With a polishing time of 2 minutes, Line / Space
In the Line portion having a width of 0.05 to 1 mm, the polishing reached the Al wiring underlying the silicon oxide film.

【0024】比較例2 (絶縁膜層の研磨)φ200mmSi基板上にLine/Sp
ace 幅が0.05〜5mmで高さが1000nmのAl
配線のLine部を形成した後、その上にTEOS−プラズ
マCVD法で酸化珪素膜を2000nm形成したパター
ンウエハを作製する。実施例と同様に市販シリカスラリ
ーを用いて2分間研磨を行った。この市販スラリーのp
Hは10.3で、SiO2 粒子を12.5wt%含んで
いるものである。研磨条件は実施例と同一である。同様
に、研磨時間を3分、4分、5分、6分にして上記パタ
ーンウエハの研磨を行った。光干渉式膜厚測定装置を用
いて、研磨前後の膜厚差を測定し、研磨速度を計算し
た。Line/Space 幅1mmのLine部分の研磨速度R1
Line/Space 幅3mmのLine部分の研磨速度R3 、及び
Line/Space 幅5mmのLine部分の研磨速度R5 との研
磨速度比R5 /R1 及びR3 /R1 は、研磨時間2〜5
分の間は、研磨時間とともに値が大きくなり、研磨時間
5〜6分ではほぼ一定であった。研磨速度のパターン幅
依存性が一定になった研磨時間が5分の場合、Line/Sp
ace 幅1mmのLine部分の研磨速度R1 は283nm/
分(研磨量1416nm)、Line/Space 幅3mmのLi
ne部分の研磨速度R3 は218nm/分(研磨量109
2nm)、Line/Space 幅5mmのLine部分の研磨速度
5 は169nm/分(研磨量846nm)であり、研
磨速度比R5 /R1 及びR3 /R1 は、それぞれ0.6
0及び0.77であった。また、研磨時間が6分の場合
の各Line/Space 幅のLine部分の研磨速度は5分の場合
とほぼ同じであり、研磨速度のパターン幅依存性が一定
になった後も同様の速度で研磨が進行してしまうことが
わかった。
Comparative Example 2 (Polishing of insulating film layer) Line / Sp
ace Al with width of 0.05-5mm and height of 1000nm
After forming the line portion of the wiring, a patterned wafer having a 2000 nm-thick silicon oxide film formed thereon by TEOS-plasma CVD is manufactured. Polishing was performed for 2 minutes using a commercially available silica slurry in the same manner as in the example. The p of this commercial slurry
H is 10.3 and contains 12.5 wt% of SiO 2 particles. The polishing conditions are the same as in the embodiment. Similarly, the pattern wafer was polished by setting the polishing time to 3 minutes, 4 minutes, 5 minutes, and 6 minutes. The difference in film thickness before and after polishing was measured using an optical interference type film thickness measuring device, and the polishing rate was calculated. Polishing rate R 1 of the Line portion of Line / Space Width 1mm
Line / Space Polishing rate R 3 of 3 mm wide Line portion, and
Line / polishing rate ratio between the polishing rate R 5 of the Line portion of Space width 5 mm R 5 / R 1 and R 3 / R 1, the polishing time 2-5
During the minute, the value increased with the polishing time, and was substantially constant in the polishing time of 5 to 6 minutes. If the polishing time is 5 minutes when the dependence of the polishing rate on the pattern width is constant, Line / Sp
polishing rate R 1 of the Line portion of ace width 1mm is 283 nm /
Min (polishing amount 1416nm), Line / Space 3mm width Li
The polishing rate R 3 of the ne portion is 218 nm / min (polishing amount 109
2 nm), the polishing rate R 5 of the Line portion of Line / Space Width 5mm is 169 nm / min (amount of polishing 846 nm), the polishing rate ratio R 5 / R 1 and R 3 / R 1 are each 0.6
0 and 0.77. When the polishing time is 6 minutes, the polishing rate at the line portion of each Line / Space width is almost the same as that at 5 minutes, and after the polishing rate dependence becomes constant, the polishing rate remains the same. It was found that the polishing proceeded.

【0025】[0025]

【発明の効果】本発明のCMP研磨剤は、高平坦化可能
であり、酸化珪素絶縁膜等の被研磨面を傷なく、高速に
研磨することができ、さらには保存安定性に優れる。又
本発明の研磨方法により、基板の被研磨面を、傷なく、
研磨することが可能となる。
The CMP polishing slurry of the present invention can be highly planarized, can polish a surface to be polished such as a silicon oxide insulating film at high speed, and has excellent storage stability. In addition, by the polishing method of the present invention, the surface to be polished of the substrate, without scratches,
Polishing becomes possible.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 吉田 誠人 茨城県つくば市和台48 日立化成工業株式 会社筑波開発研究所内 (72)発明者 芦沢 寅之助 茨城県日立市東町四丁目13番1号 日立化 成工業株式会社茨城研究所内 Fターム(参考) 4G076 AA02 AA24 AA26 AB09 BA22 BA39 BA46 BC08 BD01 CA05 CA15 CA26 DA30 4J037 AA08 CB16 CC16 DD24 EE08 EE28 EE43 FF18 FF23  ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masato Yoshida 48 Wadai, Tsukuba, Ibaraki Prefecture Within Tsukuba Development Laboratory, Hitachi Chemical Co., Ltd. 4G076 AA02 AA24 AA26 AB09 BA22 BA39 BA46 BC08 BD01 CA05 CA15 CA26 DA30 4J037 AA08 CB16 CC16 DD24 EE08 EE28 EE43 FF18 FF23

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】酸化セリウム粒子、分散剤、ポリアクリル
アミド及びその誘導体から選ばれる添加剤並びに水を含
むCMP研磨剤。
1. A CMP polishing slurry containing cerium oxide particles, a dispersant, an additive selected from polyacrylamide and its derivatives, and water.
【請求項2】酸化セリウム粒子、分散剤及び水を含む酸
化セリウムスラリー並びに添加剤と水を含む添加液から
なる請求項1記載のCMP研磨剤。
2. The CMP polishing slurry according to claim 1, comprising a cerium oxide slurry containing cerium oxide particles, a dispersant and water, and an additive liquid containing an additive and water.
【請求項3】研磨する膜を形成した基板を研磨定盤の研
磨布に押しあて加圧し、請求項1又は2記載のCMP研
磨剤を研磨膜と研磨布との間に供給しながら、基板と研
磨定盤を動かして研磨する膜を研磨する基板の研磨方
法。
3. A substrate on which a film to be polished is formed is pressed against a polishing cloth of a polishing platen and pressurized, and the CMP polishing agent according to claim 1 or 2 is supplied between the polishing film and the polishing cloth. A substrate polishing method for polishing a film to be polished by moving a polishing platen.
JP17282299A 1999-06-18 1999-06-18 CMP polishing agent and substrate polishing method Expired - Fee Related JP4491857B2 (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005110679A1 (en) * 2004-05-19 2005-11-24 Nissan Chemical Industries, Ltd. Composition for polishing
WO2007067003A1 (en) * 2005-12-08 2007-06-14 Lg Chem, Ltd. Adjuvant for controlling polishing selectivity and chemical mechanical polishing slurry comprising the same
TWI501298B (en) * 2009-05-13 2015-09-21 Lam Res Corp Multi-stage substrate cleaning method and apparatus

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JPH02158684A (en) * 1988-12-12 1990-06-19 Mitsubishi Monsanto Chem Co Fine-polishing composition for wafer
JPH0822970A (en) * 1994-07-08 1996-01-23 Toshiba Corp Polishing method
WO1997029510A1 (en) * 1996-02-07 1997-08-14 Hitachi Chemical Company, Ltd. Cerium oxide abrasive, semiconductor chip, semiconductor device, process for the production of them, and method for the polishing of substrates
JPH10168431A (en) * 1996-12-09 1998-06-23 Internatl Business Mach Corp <Ibm> Polishing step and slurry for flattening
JPH11138421A (en) * 1997-11-07 1999-05-25 Nikon Corp Cmp polishing pad and polishing device using it
JP2000049124A (en) * 1998-07-23 2000-02-18 Eternal Chemical Co Ltd Chemical-mechanical abrasive material composition used for semiconductor process

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Publication number Priority date Publication date Assignee Title
JPH026586A (en) * 1988-06-27 1990-01-10 Mitsubishi Monsanto Chem Co Composition for fine polishing of wafer
JPH02158684A (en) * 1988-12-12 1990-06-19 Mitsubishi Monsanto Chem Co Fine-polishing composition for wafer
JPH0822970A (en) * 1994-07-08 1996-01-23 Toshiba Corp Polishing method
WO1997029510A1 (en) * 1996-02-07 1997-08-14 Hitachi Chemical Company, Ltd. Cerium oxide abrasive, semiconductor chip, semiconductor device, process for the production of them, and method for the polishing of substrates
JPH10168431A (en) * 1996-12-09 1998-06-23 Internatl Business Mach Corp <Ibm> Polishing step and slurry for flattening
JPH11138421A (en) * 1997-11-07 1999-05-25 Nikon Corp Cmp polishing pad and polishing device using it
JP2000049124A (en) * 1998-07-23 2000-02-18 Eternal Chemical Co Ltd Chemical-mechanical abrasive material composition used for semiconductor process

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005110679A1 (en) * 2004-05-19 2005-11-24 Nissan Chemical Industries, Ltd. Composition for polishing
WO2007067003A1 (en) * 2005-12-08 2007-06-14 Lg Chem, Ltd. Adjuvant for controlling polishing selectivity and chemical mechanical polishing slurry comprising the same
KR100786948B1 (en) * 2005-12-08 2007-12-17 주식회사 엘지화학 Adjuvant capable of controlling a polishing selectivity and chemical mechanical polishing slurry comprising the same
US8147711B2 (en) 2005-12-08 2012-04-03 Lg Chem, Ltd. Adjuvant for controlling polishing selectivity and chemical mechanical polishing slurry
TWI501298B (en) * 2009-05-13 2015-09-21 Lam Res Corp Multi-stage substrate cleaning method and apparatus

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