JP2000354325A - Overload and short-circuit protection circuit of slave unit for interfacing actuator and sensor - Google Patents

Overload and short-circuit protection circuit of slave unit for interfacing actuator and sensor

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Publication number
JP2000354325A
JP2000354325A JP11163807A JP16380799A JP2000354325A JP 2000354325 A JP2000354325 A JP 2000354325A JP 11163807 A JP11163807 A JP 11163807A JP 16380799 A JP16380799 A JP 16380799A JP 2000354325 A JP2000354325 A JP 2000354325A
Authority
JP
Japan
Prior art keywords
circuit
transistor
resistor
sensor
short
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11163807A
Other languages
Japanese (ja)
Other versions
JP3775554B2 (en
Inventor
Toshio Nodera
俊夫 野寺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
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Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP16380799A priority Critical patent/JP3775554B2/en
Publication of JP2000354325A publication Critical patent/JP2000354325A/en
Application granted granted Critical
Publication of JP3775554B2 publication Critical patent/JP3775554B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Electronic Switches (AREA)

Abstract

PROBLEM TO BE SOLVED: To protect a slave for interfacing input and output devices which include an actuator and a sensor (ASi) for overloading and short-circuiting with a low-cost circuit. SOLUTION: A slave unit 1, that has a slave unit main circuit 1A and is connected to an ASi power supply, is provided with a circuit consisting of resistors R1, 2, 3 to R5, 6, 7, transistors T0 to T4, a capacitor C1, etc. Normally, the transistor 1 is kept in an 'on' state, but momentary 'on' states are repeated for a fixed cycle, if an overcurrent or a short-circuit current is caused to flow. This structure makes an expensive IC circuit that has conventionally been used to be dispensed with.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、プロセス入出力
機器として用いられるアクチュエータ,センサ等に対し
てインターフェースを司るアクチュエータ,センサイン
ターフェース回路(以下、ASiとも略記する)用スレ
ーブにおける過負荷,短絡保護回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overload / short-circuit protection circuit for an actuator for controlling an interface with an actuator or a sensor used as a process input / output device and a slave for a sensor interface circuit (hereinafter abbreviated as ASi). About.

【0002】[0002]

【従来の技術】ASiはEN規格(EN50295)で
規定されたビットレベルの信号を取り扱うネットワーク
で、フィールドネットワークの中で最下位層に位置す
る。図4にASiのネットワーク構成例を示す。上位に
マスタ2があり、マスタ2から通信と電源を兼用した2
本の電線が延びている(ASi+,ASi−)。ASi
+とASi−には、DC30Vの電源4と通信信号を減
衰させないためのデカップリング回路を内蔵したASi
専用電源3とが接続される。スレーブ11〜14はここ
では4台示すが、最大で31台接続可能である。
2. Description of the Related Art ASi is a network that handles bit-level signals defined by the EN standard (EN50295), and is located at the lowest layer in a field network. FIG. 4 shows an example of an ASi network configuration. There is a master 2 at the upper level, and the master 2 uses both communication and power.
The wires extend (ASi +, ASi-). ASi
+ And ASi- have a power supply 4 of 30 V DC and a decoupling circuit for preventing a communication signal from being attenuated.
The dedicated power supply 3 is connected. Although four slaves 11 to 14 are shown here, a maximum of 31 slaves can be connected.

【0003】スレーブ11〜14としては、負荷を制御
するための出力のみを持ったもの(スレーブ11)、セ
ンサまたはアクチュエータの信号を取り入れる入力のみ
を持ったもの(スレーブ14)、または出力および入力
の両方を持ったもの(スレーブ12,13)等の種類が
ある。また、出力を持ったスレーブに対しては、負荷を
動作させるためDC電源4を接続するようにしたもの
(スレーブ11,12)と、負荷を動作させるための電
源もASi電源3からとるようにしたものとがある(ス
レーブ13)。マスタ2はプログラマブルコントローラ
(PLC)と組み合わされており、センサおよび入力に
対して要求される負荷の動作をさせるため、マスタ2で
必要なプログラムを組み、動作の制御をするようにして
いる。
The slaves 11 to 14 have only an output for controlling a load (slave 11), have only an input for receiving a signal of a sensor or an actuator (slave 14), or have an output and an input. There are types such as those having both (slaves 12, 13). For the slave having an output, a DC power supply 4 is connected to operate the load (slaves 11 and 12), and a power supply for operating the load is also taken from the ASi power supply 3. (Slave 13). The master 2 is combined with a programmable controller (PLC), and in order to operate a load required for a sensor and an input, a program necessary for the master 2 is set and the operation is controlled.

【0004】図5にスレーブの従来例を示す。これは、
負荷を動作させるための電源もASi電源から取るよう
にしたもので、ASi+側は逆接続防止用のダイオード
Dを通して、ASiスレーブ用のASICを含むスレー
ブ主回路1AおよびコイルL1に接続される。また、A
Si−側はスレーブ主回路1AおよびコイルL2に接続
される。コイルL1とL2間にはコンデンサC2が接続
され、これらコイルとコンデンサによりフィルターをか
け、以降の回路に信号がのらないようにしている。スレ
ーブ主回路1Aからの出力信号は、出力トランジスタT
0に接続される。負荷(X)7は出力トランジスタT0
のコレクタとコイルL1を通したASi+側に接続し、
スレーブ主回路1Aからの出力信号で出力トランジスタ
T0がオンしたとき、ASi電源から負荷(X)7に電
圧が供給され、オンするようになっている。また、セン
サ6を入力とする場合もASi電源から電圧が供給され
るようにしている。さらに、過負荷・短絡検知回路1B
が電流通路部に設けられ、過負荷電流またはセンサ消費
電流の過電流や負荷短絡電流の検知をするようにしてい
る。なお、過負荷・短絡検知回路1Bは通常、専用のI
Cが用いられる。
FIG. 5 shows a conventional example of a slave. this is,
The power for operating the load is also taken from the ASi power source, and the ASi + side is connected to a slave main circuit 1A including an ASi slave ASIC and a coil L1 through a diode D for preventing reverse connection. Also, A
The Si- side is connected to the slave main circuit 1A and the coil L2. A capacitor C2 is connected between the coils L1 and L2, and a filter is applied by these coils and the capacitor so that no signal is applied to the subsequent circuits. The output signal from slave main circuit 1A is output transistor T
Connected to 0. The load (X) 7 is the output transistor T0
To the ASi + side through coil L1 and the collector of
When the output transistor T0 is turned on by the output signal from the slave main circuit 1A, a voltage is supplied from the ASi power supply to the load (X) 7, and the load (X) 7 is turned on. Also, when the sensor 6 is used as an input, a voltage is supplied from an ASi power supply. Furthermore, overload / short circuit detection circuit 1B
Are provided in the current path portion to detect an overload current or an overcurrent of sensor current consumption or a load short-circuit current. The overload / short circuit detection circuit 1B is usually provided with a dedicated I
C is used.

【0005】[0005]

【発明が解決しようとする課題】上記のように、負荷・
短絡検知回路としては専用のICが用いられるが、この
専用ICは一般に高価なためコストアップになる、とい
う問題がある。また、負荷やセンサには、コイルを通し
てASi電源から電力を供給するようにしているので、
負荷およびセンサには約30Vの電圧が印加されること
になる。そのため、例えば定格電圧が24V±10%の
センサまたは負荷の場合、定格以上の電圧となって使用
できなくなるという問題もある。したがって、この発明
の課題は低コスト化を図ること、定格による制限をなく
すことなどにある。
As mentioned above, the load
Although a dedicated IC is used as the short-circuit detecting circuit, there is a problem that the cost is increased because the dedicated IC is generally expensive. Also, since the load and the sensor are supplied with power from the ASi power supply through the coil,
A voltage of about 30 V is applied to the load and the sensor. For this reason, for example, in the case of a sensor or a load having a rated voltage of 24 V ± 10%, there is a problem that the voltage becomes higher than the rated voltage and cannot be used. Therefore, an object of the present invention is to reduce the cost and eliminate the limitation by the rating.

【0006】[0006]

【課題を解決するための手段】このような課題を解決す
るため、請求項1の発明では、スレーブ主回路を有し、
アクチュエータまたはセンサを含む入出力機器とのイン
タフェースを司るアクチュエータ,センサインタフェー
ス回路(ASi)から電源を供給されるスレーブに対
し、前記スレーブ主回路の出力信号を出力トランジスタ
のベースに導入し、そのエミッタを第1トランジスタの
コレクタに接続し、この第1トランジスタのエミッタは
第1抵抗および第2トランジスタのベースに接続し、前
記第1トランジスタのベースは第3トランジスタのコレ
クタスと第3抵抗との接続部に接続し、第3トランジス
タのエミッタは第2抵抗に接続し、第4トランジスタの
エミッタは第3トランジスタのエミッタに、そのベース
は第6抵抗に接続し、第6抵抗の他端は第7抵抗,第1
コンデンサおよび第2トランジスタのコレクタに接続
し、第7抵抗の他端は前記第2抵抗のトランジスタに接
続されていない側に接続するとともに、ダイオードを通
してASi電源+側に接続された第1コイルの他端に接
続し、第1コンデンサの前記第6抵抗が接続されていな
い側を第1,第3および第5抵抗に接続するとともに、
ASi電源−側に接続された第2コイルの他端に接続し
たことを特徴とする。上記請求項1の発明においては、
前記第1コイルと入出力機器との間に定電圧回路を設け
ることができる(請求項2の発明)。
In order to solve such a problem, the invention according to claim 1 has a slave main circuit,
An output signal of the slave main circuit is introduced into a base of an output transistor for an actuator which controls an interface with an input / output device including an actuator or a sensor and a power supplied from a sensor interface circuit (ASi). The collector of the first transistor is connected, the emitter of the first transistor is connected to the first resistor and the base of the second transistor, and the base of the first transistor is connected to the junction between the collector of the third transistor and the third resistor. Connected, the emitter of the third transistor is connected to the second resistor, the emitter of the fourth transistor is connected to the emitter of the third transistor, the base is connected to the sixth resistor, and the other end of the sixth resistor is connected to the seventh resistor. First
The other end of the seventh resistor is connected to the side of the second resistor not connected to the transistor, and the other end of the first coil connected to the ASi power supply + side through the diode is connected to the capacitor and the collector of the second transistor. And the other end of the first capacitor to which the sixth resistor is not connected is connected to the first, third and fifth resistors,
It is characterized in that it is connected to the other end of the second coil connected to the ASi power supply side. In the first aspect of the present invention,
A constant voltage circuit can be provided between the first coil and the input / output device (the invention of claim 2).

【0007】[0007]

【発明の実施の形態】図1はこの発明の第1の実施の形
態を示す構成図で、抵抗,コンデンサおよびトランジス
タのみで過負荷・短絡保護回路を構成した点が特徴であ
る。通常の状態では、トランジスタT3は抵抗R2を通
してベース電流が流れ、オンとなっている(T4はオ
フ)。これにより、トランジスタT1にベース電流が供
給され、これもオン状態になっている。その結果、負荷
電流とセンサの消費電流を合計した電流Iが、トランジ
スタT1のコレクタ・エミッタ間を流れる。そして、負
荷電流またはセンサの消費電流が増大すると、抵抗R1
間の電圧Vaが増大してくる。抵抗R1はこの過負荷・
短絡保護回路が動作する電流値を決定するもので、例え
ば、 R1=Vbe2/Iop なる値に設定する。ここに、Vbe2はトランジスタT
2のベース・エミッタ間電圧、Iopは過負荷・短絡保
護回路動作電流である。
FIG. 1 is a block diagram showing a first embodiment of the present invention, which is characterized in that an overload / short-circuit protection circuit is constituted only by resistors, capacitors and transistors. In a normal state, the base current of the transistor T3 flows through the resistor R2, and the transistor T3 is on (T4 is off). As a result, the base current is supplied to the transistor T1, which is also in the ON state. As a result, a current I, which is the sum of the load current and the current consumption of the sensor, flows between the collector and the emitter of the transistor T1. When the load current or the current consumption of the sensor increases, the resistance R1
The voltage Va between them increases. The resistance R1
The current value at which the short-circuit protection circuit operates is determined. For example, R1 = Vbe2 / Iop. Here, Vbe2 is the transistor T
2, a base-emitter voltage Iop is an overload / short circuit protection circuit operating current.

【0008】抵抗R1間の電圧Vaが上記Vbe2以上
になる電流Iが流れると、T2のベース電流が流れT2
がオンとなる。C1は、通常の場合は約30Vに充電さ
れているが、過負荷または短絡電流が流れてT2がオン
すると、瞬時に放電され約0Vになる。このため、T4
のベース電流I2が抵抗R2および抵抗R6を通して流
れ、T4がオンとなる。T4がオンになると、T3のベ
ース電位が上昇してT3がオフし、これによりT1もオ
フとなる。
When the current I at which the voltage Va across the resistor R1 becomes equal to or higher than Vbe2 flows, the base current of T2 flows and T2
Turns on. C1 is normally charged to about 30V, but is discharged instantaneously to about 0V when T2 is turned on due to an overload or short circuit current. Therefore, T4
Flows through the resistors R2 and R6, turning on T4. When T4 turns on, the base potential of T3 rises and T3 turns off, thereby turning off T1.

【0009】その後、コンデンサC1は、抵抗R7を通
る電流I1とトランジスタT4のベース電流I2によっ
て充電され、徐々に電圧が上昇する。そして、コンデン
サC1間の電圧Vcが、 Vc≒[30×R5/(R2+R5)]−Vbe4 になったとき、T4は再びオフになる。なお、Vbe4
はトランジスタT4のベース・エミッタ間電圧を示す。
Thereafter, the capacitor C1 is charged by the current I1 passing through the resistor R7 and the base current I2 of the transistor T4, and the voltage gradually increases. Then, when the voltage Vc across the capacitor C1 becomes Vc30 [30 × R5 / (R2 + R5)] − Vbe4, T4 is turned off again. In addition, Vbe4
Indicates a base-emitter voltage of the transistor T4.

【0010】T4がオフになると、T3,T1はオンす
るが、過負荷または短絡電流が流れていると、瞬時にT
2がオンしてC1の電荷が放電され、T1をオフとす
る。すなわち、抵抗R2,R6,R7およびコンデンサ
C1で決定される周期で、T1は瞬時のオンを繰り返す
ことになる。図2にVcおよびVaの電圧変化例を示
す。同図(a)はVcを、同図(b)はVaをそれぞれ
示す。同図(b)からも明らかなように、T1は瞬時の
オンなので、負荷電流等はほとんどシャットダウン(阻
止)されて、過負荷または短絡状態から保護される。
When T4 is turned off, T3 and T1 are turned on. However, when an overload or short-circuit current flows, T3 is instantaneously turned on.
2 is turned on, the electric charge of C1 is discharged, and T1 is turned off. That is, T1 is repeatedly turned on instantaneously in a cycle determined by the resistors R2, R6, R7 and the capacitor C1. FIG. 2 shows a voltage change example of Vc and Va. FIG. 3A shows Vc, and FIG. 3B shows Va. As is clear from FIG. 3B, since T1 is instantaneously turned on, the load current and the like are almost shut down (blocked) and are protected from an overload or short circuit state.

【0011】図3はこの発明の第2の実施の形態を示す
構成図である。図1との相違はセンサ等の入出力機器を
接続する前段に定電圧回路1Cを挿入した点にあり、そ
の他は同様である。これは、日本ではDC24Vが一般
的な電圧のため、定電圧回路1Cによりその電圧になる
ようにしている。
FIG. 3 is a block diagram showing a second embodiment of the present invention. The difference from FIG. 1 resides in that a constant voltage circuit 1C is inserted before connecting input / output devices such as sensors, and the other configurations are the same. This is because a voltage of 24 V DC is a common voltage in Japan, and the voltage is controlled by the constant voltage circuit 1C.

【0012】[0012]

【発明の効果】この発明によれば、過負荷・短絡保護回
路を安価な抵抗,コンデンサおよびトランジスタのみで
形成できるので、低コスト化が可能となる。また、過負
荷・短絡保護回路の入力部と出力部との間に定電圧回路
を挿入することで、負荷,センサ等に印加される電圧を
日本の仕様に合う電圧にすることができる。
According to the present invention, the overload / short circuit protection circuit can be formed only by inexpensive resistors, capacitors and transistors, so that the cost can be reduced. Further, by inserting a constant voltage circuit between the input section and the output section of the overload / short-circuit protection circuit, the voltage applied to the load, the sensor, and the like can be set to a voltage meeting Japanese specifications.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の第1の実施の形態を示す構成図であ
る。
FIG. 1 is a configuration diagram showing a first embodiment of the present invention.

【図2】図1の動作概要図である。FIG. 2 is an operation schematic diagram of FIG. 1;

【図3】この発明の第2の実施の形態を示す構成図であ
る。
FIG. 3 is a configuration diagram showing a second embodiment of the present invention.

【図4】ASiネットワーク構成例を示す構成図であ
る。
FIG. 4 is a configuration diagram illustrating an example of an ASi network configuration.

【図5】スレーブの従来例を示す構成図である。FIG. 5 is a configuration diagram showing a conventional example of a slave.

【符号の説明】[Explanation of symbols]

1,11,12,13,14…スレーブ、1A…スレー
ブ主回路、1B…過負荷・短絡検知回路(専用IC)、
1C…定電圧回路、2…マスタ、3…ASi電源、4…
DC電源、51,52,53,54…入出力機器、6…
センサ、7…負荷(X)、L1,L2…コイル、C1,
C2…コンデンサ、R1,R2,R3〜R5,R6,R
7…抵抗、T0,T1,T2,T3,T4…トランジス
タ、D…ダイオード。
1, 11, 12, 13, 14: slave, 1A: slave main circuit, 1B: overload / short circuit detection circuit (dedicated IC),
1C: constant voltage circuit, 2: master, 3: ASi power supply, 4 ...
DC power supplies, 51, 52, 53, 54 ... input / output devices, 6 ...
Sensor, 7: load (X), L1, L2: coil, C1,
C2: condenser, R1, R2, R3 to R5, R6, R
7: resistor, T0, T1, T2, T3, T4: transistor, D: diode.

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5G053 AA01 AA02 BA01 CA02 EA03 EC03 FA07 5G065 BA04 BA08 DA07 KA03 KA05 LA02 5H410 CC02 DD02 DD05 EA10 EA37 EB01 EB25 FF05 FF25 LL06 LL13 LL15 5J055 AX32 AX53 AX64 CX10 DX04 DX55 EY01 EY05 EY10 EY12 EY17 EZ14 EZ40 EZ51 EZ66 FX04 FX08 FX13 FX19 FX28 FX32 GX01 GX02 GX05 GX06 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) EY12 EY17 EZ14 EZ40 EZ51 EZ66 FX04 FX08 FX13 FX19 FX28 FX32 GX01 GX02 GX05 GX06

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 スレーブ主回路を有し、アクチュエータ
またはセンサを含む入出力機器とのインタフェースを司
るアクチュエータ,センサインタフェース回路(AS
i)から電源を供給されるスレーブに対し、 前記スレーブ主回路の出力信号を出力トランジスタのベ
ースに導入し、そのエミッタを第1トランジスタのコレ
クタに接続し、この第1トランジスタのエミッタは第1
抵抗および第2トランジスタのベースに接続し、前記第
1トランジスタのベースは第3トランジスタのコレクタ
スと第3抵抗との接続部に接続し、第3トランジスタの
エミッタは第2抵抗に接続し、第4トランジスタのエミ
ッタは第3トランジスタのエミッタに、そのベースは第
6抵抗に接続し、第6抵抗の他端は第7抵抗,第1コン
デンサおよび第2トランジスタのコレクタに接続し、第
7抵抗の他端は前記第2抵抗のトランジスタに接続され
ていない側に接続するとともに、ダイオードを通してA
Si電源+側に接続された第1コイルの他端に接続し、
第1コンデンサの前記第6抵抗が接続されていない側を
第1,第3および第5抵抗に接続するとともに、ASi
電源−側に接続された第2コイルの他端に接続したこと
を特徴とするアクチュエータ,センサインタフェース用
スレーブの過負荷,短絡保護回路。
An actuator / sensor interface circuit (AS) having a slave main circuit and controlling an interface with an input / output device including an actuator or a sensor.
i) For a slave supplied with power from i), an output signal of the slave main circuit is introduced into a base of an output transistor, and an emitter thereof is connected to a collector of a first transistor.
A resistor and a base of the second transistor; a base of the first transistor connected to a connection between the collector of the third transistor and the third resistor; an emitter of the third transistor connected to the second resistor; The emitter of the transistor is connected to the emitter of the third transistor, its base is connected to the sixth resistor, the other end of the sixth resistor is connected to the seventh resistor, the first capacitor and the collector of the second transistor, and the other end of the seventh resistor is connected to the other end. The end is connected to the side of the second resistor that is not connected to the transistor, and A is connected through a diode.
Connected to the other end of the first coil connected to the Si power supply + side,
A side of the first capacitor, to which the sixth resistor is not connected, is connected to the first, third, and fifth resistors.
An overload and short circuit protection circuit for an actuator and a sensor interface slave connected to the other end of a second coil connected to a power supply side.
【請求項2】 前記第1コイルと入出力機器との間に定
電圧回路を設けたことを特徴とする請求項1に記載のア
クチュエータ,センサインタフェース用スレーブの過負
荷,短絡保護回路。
2. The overload and short circuit protection circuit of an actuator and a sensor interface slave according to claim 1, wherein a constant voltage circuit is provided between the first coil and the input / output device.
JP16380799A 1999-06-10 1999-06-10 Overload and short circuit protection circuit for actuator and sensor interface slave Expired - Fee Related JP3775554B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16380799A JP3775554B2 (en) 1999-06-10 1999-06-10 Overload and short circuit protection circuit for actuator and sensor interface slave

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16380799A JP3775554B2 (en) 1999-06-10 1999-06-10 Overload and short circuit protection circuit for actuator and sensor interface slave

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JP2000354325A true JP2000354325A (en) 2000-12-19
JP3775554B2 JP3775554B2 (en) 2006-05-17

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111262568A (en) * 2020-04-09 2020-06-09 崔建国 Quick photoelectric coupler capable of eliminating Miller effect and implementation method
CN118040620A (en) * 2024-04-12 2024-05-14 西安奇点能源股份有限公司 Protection circuit applied to MOS or IGBT tube short circuit failure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111262568A (en) * 2020-04-09 2020-06-09 崔建国 Quick photoelectric coupler capable of eliminating Miller effect and implementation method
CN118040620A (en) * 2024-04-12 2024-05-14 西安奇点能源股份有限公司 Protection circuit applied to MOS or IGBT tube short circuit failure

Also Published As

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