JP2000353932A - Electronic part and manufacture of the same - Google Patents

Electronic part and manufacture of the same

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Publication number
JP2000353932A
JP2000353932A JP16590999A JP16590999A JP2000353932A JP 2000353932 A JP2000353932 A JP 2000353932A JP 16590999 A JP16590999 A JP 16590999A JP 16590999 A JP16590999 A JP 16590999A JP 2000353932 A JP2000353932 A JP 2000353932A
Authority
JP
Japan
Prior art keywords
electrode
film
base film
vanadium
electrode base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16590999A
Other languages
Japanese (ja)
Inventor
Soushi Saoshita
宗士 竿下
Hitsuhigashi Takai
筆東 高井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP16590999A priority Critical patent/JP2000353932A/en
Publication of JP2000353932A publication Critical patent/JP2000353932A/en
Pending legal-status Critical Current

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  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an electronic part having an electrode base film of which contact strength with ceramics is made superior, and also film thickness precision is made high, and a method for manufacturing this electronic part. SOLUTION: A vibrating electrode film 2a of this electronic part is formed through an electrode base film 21 on the surface of a piezoelectric ceramics substrate 1. The electrode base film 21 and the vibrating electrode film 2a are formed by a sputtering method. The electrode base film 21 is made of nickel/vanadium system alloy containing vanadium of 6.5-7.5 wt.%. Then, the film thickness of the electrode abase film 21 is set so as to be ranging from 0.1 to 0.3 μm.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子部品、特に、
セラミックス表面に電極膜を設けた電子部品及びその製
造方法に関する。
TECHNICAL FIELD The present invention relates to an electronic component, in particular,
The present invention relates to an electronic component having an electrode film provided on a ceramic surface and a method for manufacturing the same.

【0002】[0002]

【従来の技術】電子部品において、一般に、セラミック
ス表面に電極膜を設ける場合、電極膜の材料としてAg
やCu等の貴金属が用いられる。このとき、電極膜とセ
ラミックスとの密着強度の向上及び電極膜の耐はんだ喰
れ性の向上等を目的として、通常、セラミックス表面と
電極膜との間に電極下地膜を配設する。従来、この電極
下地膜の材料としては、例えば、ニッケルを主成分とす
る卑金属粉末に、硼化物粉末や炭化物粉末等を含有させ
た電極ペースト、あるいは、薄膜用にはニッケル−クロ
ム系合金やニッケル−銅系合金が用いられていた。
2. Description of the Related Art In an electronic component, when an electrode film is generally provided on a ceramic surface, Ag is generally used as a material of the electrode film.
And a noble metal such as Cu. At this time, an electrode base film is usually provided between the ceramic surface and the electrode film for the purpose of improving the adhesion strength between the electrode film and the ceramic and improving the resistance to soldering of the electrode film. Conventionally, as a material of the electrode base film, for example, an electrode paste obtained by adding a boride powder or a carbide powder to a base metal powder containing nickel as a main component, or a nickel-chromium alloy or nickel for a thin film. A copper-based alloy was used;

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
電極下地膜の材料のうち、ニッケルを主成分とする卑金
属粉末に硼化物粉末や炭化物粉末等を含有させた電極ペ
ーストは、塗布法で成膜するため、電極下地膜の膜厚精
度が低いという問題があった。また、ニッケル−クロム
系合金等はエッチング性が劣り、特に環境問題の観点か
らもクロムは使用しない方が好ましい。また、ニッケル
−銅系合金は密着強度がやや弱かった。
However, among the conventional electrode underlayer materials, an electrode paste comprising a base metal powder containing nickel as a main component and a boride powder or a carbide powder is formed by a coating method. Therefore, there is a problem that the film thickness accuracy of the electrode base film is low. Nickel-chromium alloys and the like have poor etching properties, and it is preferable not to use chromium from the viewpoint of environmental issues. Further, the nickel-copper alloy had a slightly weaker adhesion strength.

【0004】そこで、本発明の目的は、セラミックスと
の密着強度等に優れ、かつ、膜厚精度が高い電極下地膜
を有する電子部品及びその製造方法を提供することにあ
る。
An object of the present invention is to provide an electronic component having an electrode base film having excellent adhesion strength to ceramics and the like and high film thickness accuracy, and a method of manufacturing the same.

【0005】[0005]

【課題を解決するための手段と作用】以上の目的を達成
するため、本発明に係る電子部品は、セラミックス表面
に、バナジウムを6.5〜7.5重量%含有したニッケ
ル−バナジウム系合金からなる電極下地膜を介して電極
膜を設けている。そして、信頼性の観点から、電極下地
膜の膜厚は、0.1〜0.3μmであることが好まし
い。以上の構成において、ニッケル−バナジウム系合金
は、セラミックスとの密着強度が強く、耐はんだ喰れ性
にも優れている。
In order to achieve the above object, an electronic component according to the present invention comprises a nickel-vanadium alloy containing 6.5 to 7.5% by weight of vanadium on a ceramic surface. The electrode film is provided via the electrode base film. Then, from the viewpoint of reliability, the thickness of the electrode base film is preferably 0.1 to 0.3 μm. In the above configuration, the nickel-vanadium-based alloy has a high adhesion strength to ceramics and has excellent resistance to solder erosion.

【0006】また、本発明に係る電子部品の製造方法
は、セラミックス表面に、バナジウムを6.5〜7.5
重量%含有したニッケル−バナジウム系合金からなる電
極下地膜をスパッタリング法で形成する。以上の方法に
より、膜厚精度が高い電極下地膜が形成される。
In the method of manufacturing an electronic component according to the present invention, vanadium is applied to the ceramic surface at 6.5 to 7.5.
An electrode base film made of a nickel-vanadium-based alloy containing a weight percent is formed by a sputtering method. By the above method, an electrode base film having high film thickness accuracy is formed.

【0007】[0007]

【発明の実施の形態】以下、本発明に係る電子部品及び
その製造方法の一実施形態について添付図面を参照して
説明する。本実施形態では、圧電部品を例にして説明す
るが、コンデンサやインダクタ等のように、セラミック
ス表面に電極膜を設ける電子部品であれば種類は問わな
い。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of an electronic component and a method of manufacturing the same according to the present invention will be described with reference to the accompanying drawings. In the present embodiment, a piezoelectric component will be described as an example. However, any type of electronic component such as a capacitor or an inductor provided with an electrode film on a ceramic surface can be used.

【0008】[圧電部品の構成]図1に示すように、圧
電部品18は、振動電極膜2a,2bを表裏面に設けた
圧電セラミックス基板1と、2枚の外装セラミックス基
板12,13とで構成されている。圧電セラミックス基
板1にはPZT等のセラミックス基板が使用され、外装
セラミックス基板12,13には、アルミナ等のセラミ
ックス基板が使用される。振動電極膜2a,2bは厚み
すべり振動モードを利用して振動する。
[Structure of Piezoelectric Component] As shown in FIG. 1, a piezoelectric component 18 is composed of a piezoelectric ceramic substrate 1 provided with vibrating electrode films 2a and 2b on the front and back surfaces, and two exterior ceramic substrates 12 and 13. It is configured. A ceramic substrate such as PZT is used for the piezoelectric ceramic substrate 1, and ceramic substrates such as alumina are used for the exterior ceramic substrates 12 and 13. The vibrating electrode films 2a and 2b vibrate using the thickness shear vibration mode.

【0009】圧電セラミックス基板1は外装セラミック
ス基板12,13にて挟まれ、接着剤を利用して積層体
とされる。振動電極膜2a,2bが振動するための空間
は、接着剤の厚みを利用して確保される。
The piezoelectric ceramic substrate 1 is sandwiched between exterior ceramic substrates 12 and 13, and is formed into a laminate using an adhesive. A space for vibrating the vibrating electrode films 2a and 2b is secured by utilizing the thickness of the adhesive.

【0010】図2に示すように、この積層体の左右にそ
れぞれ、外部電極膜14,15が形成される。外部電極
膜14には振動電極膜2bの引出し部3bが電気的に接
続され、外部電極膜15には振動電極2aの引出し部3
aが電気的に接続される。こうして、圧電部品18が得
られる。
As shown in FIG. 2, external electrode films 14 and 15 are formed on the left and right sides of the laminate, respectively. The external electrode film 14 is electrically connected to the lead portion 3b of the vibration electrode film 2b, and the external electrode film 15 is connected to the lead portion 3 of the vibration electrode 2a.
a is electrically connected. Thus, the piezoelectric component 18 is obtained.

【0011】[電極膜の形成]以上の構成からなる圧電
部品18において、振動電極膜2a,2b及び外部電極
膜14,15の形成について以下に詳説する。なお、以
下の説明では、振動電極膜2aを圧電セラミックス基板
1の表面に形成する場合を例にして説明するが、他の電
極膜2b,14,15についても同様である。
[Formation of Electrode Film] The formation of the vibrating electrode films 2a and 2b and the external electrode films 14 and 15 in the piezoelectric component 18 having the above configuration will be described in detail below. In the following description, the case where the vibrating electrode film 2a is formed on the surface of the piezoelectric ceramic substrate 1 will be described as an example, but the same applies to the other electrode films 2b, 14, and 15.

【0012】図3に示すように、振動電極膜2aは、圧
電セラミックス基板1の表面に、ニッケル−バナジウム
系合金からなる電極下地膜21を介して形成される。バ
ナジウムは優れた親和性と活性化エネルギー特性を有し
ており、セラミックスに含有する酸素と強い化学結合を
する。また、耐はんだ喰れ性にも優れている。電極下地
膜21及び振動電極膜2aは、膜厚精度が高い成膜工法
として知られる、スパッタリング法によって形成され
る。両者の膜形成工程は、真空状態を維持したまま、連
続した工程とされる。電極下地膜21のニッケル−バナ
ジウム系合金表面を大気に晒すと、表面が酸化して振動
電極膜2aとの密着強度が不安定になるおそれがあるか
らである。
As shown in FIG. 3, the vibrating electrode film 2a is formed on the surface of the piezoelectric ceramic substrate 1 via an electrode base film 21 made of a nickel-vanadium alloy. Vanadium has excellent affinity and activation energy characteristics, and forms a strong chemical bond with oxygen contained in ceramics. Also, it has excellent resistance to solder erosion. The electrode base film 21 and the vibrating electrode film 2a are formed by a sputtering method which is known as a film forming method with high film thickness accuracy. Both film forming processes are continuous processes while maintaining a vacuum state. If the surface of the nickel-vanadium-based alloy of the electrode base film 21 is exposed to the atmosphere, the surface may be oxidized and the adhesion strength to the vibrating electrode film 2a may become unstable.

【0013】ここに、電極下地膜21の特性として、エ
ッチングスピードが速く、かつ、比抵抗の小さいものが
好ましいため、電極下地膜21はバナジウムを6.5〜
7.5重量%含有したニッケル−バナジウム系合金から
なるように設定する。この合金組成は、従来のニッケル
−クロム系合金と比較して、良好なエッチング性及び比
抵抗を有する。また、この合金組成は、クロムを7重量
%含有したニッケル−クロム系合金と同等の飽和磁化の
値を有し、電極下地膜21を強磁性体としないため、本
実施形態の成膜装置として用いた非磁性用のマグネトロ
ンスパッタリング装置に好適の合金組成である。
Here, as the characteristics of the electrode base film 21, it is preferable that the electrode base film 21 has a high etching speed and a low specific resistance.
It is set so as to be composed of a nickel-vanadium alloy containing 7.5% by weight. This alloy composition has better etching properties and specific resistance than a conventional nickel-chromium alloy. Further, this alloy composition has a saturation magnetization value equivalent to that of a nickel-chromium-based alloy containing 7% by weight of chromium, and does not make the electrode base film 21 a ferromagnetic material. The alloy composition is suitable for the non-magnetic magnetron sputtering apparatus used.

【0014】図4は、ニッケル−バナジウム系合金のO
e−kG曲線を示すグラフである。図4において、曲線
31はバナジウムの含有量が7.5重量%の場合、曲線
32はバナジウムの含有量が7.0重量%の場合、曲線
33はバナジウムの含有量が6.5重量%の場合であ
る。非磁性用のマグネトロンスパッタリング装置に適し
た飽和磁化の値は経験上7Oeにおいて略0.8kG以
下が好ましいといわれている。従って、バナジウムの含
有量は7.5重量%以下にした。一方、電極下地膜21
の密着強度は、バナジウムの含有量が多いほうが良くな
るため、6.5重量%以上にした。
FIG. 4 shows a nickel-vanadium alloy O
It is a graph which shows an e-kG curve. In FIG. 4, curve 31 is for the case where the vanadium content is 7.5% by weight, curve 32 is for the case where the vanadium content is 7.0% by weight, and curve 33 is for the case where the vanadium content is 6.5% by weight. Is the case. It is empirically suggested that the saturation magnetization suitable for a magnetron sputtering apparatus for non-magnetic use is preferably about 0.8 kG or less at 7 Oe. Therefore, the content of vanadium was set to 7.5% by weight or less. On the other hand, the electrode base film 21
The adhesive strength of was adjusted to 6.5% by weight or more because the higher the vanadium content, the better.

【0015】従って、電極下地膜21用のスパッタリン
グターゲットとしてバナジウムを6.5〜7.5重量%
含有したニッケル−バナジウム系合金材を使用する。ス
パッタリング法は、ターゲット組成と略同様の組成の膜
を容易に形成することができるからである。その他のス
パッタリング条件は、例えば、以下に示すとおりであ
る。 スパッタリングガス :Ar(100%) スパッタリングガス圧力:5×10-3Torr
Therefore, 6.5 to 7.5% by weight of vanadium is used as a sputtering target for the electrode underlayer 21.
The contained nickel-vanadium alloy material is used. This is because the sputtering method can easily form a film having substantially the same composition as the target composition. Other sputtering conditions are as shown below, for example. Sputtering gas: Ar (100%) Sputtering gas pressure: 5 × 10 −3 Torr

【0016】なお、スパッタリングの際、圧電セラミッ
クス基板1を加熱すれば、電極下地膜21と圧電セラミ
ックス基板1との密着強度をさらにアップさせることが
できる。しかし、圧電セラミックス基板1を加熱する
と、圧電特性への影響が避けられないため、この点を考
慮して基板1を加熱するかどうかを決める。
If the piezoelectric ceramic substrate 1 is heated during sputtering, the adhesion strength between the electrode base film 21 and the piezoelectric ceramic substrate 1 can be further increased. However, when the piezoelectric ceramic substrate 1 is heated, the influence on the piezoelectric characteristics is unavoidable. Therefore, whether to heat the substrate 1 is determined in consideration of this point.

【0017】以上のスパッタリング条件の下で、圧電セ
ラミックス基板1の表面全面に電極下地膜21を形成す
る。電極下地膜21の膜厚は、機械的強度や電気的特性
等の信頼性(さらに、リード端子を振動電極膜2a,2
bの引出し部3a,3bにはんだ付けする場合、あるい
は、外部電極膜14,15の電極下地膜の場合は、耐は
んだ喰れ性の観点から、使用するはんだ材料等)を考慮
して所定の値に設定される。本実施形態の場合、図5及
び図6にそれぞれ示した高温放置(150℃)及びはん
だ付け(350℃)による電極下地膜21のはんだ喰れ
量の変化のグラフから、電極下地膜21の膜厚を0.1
〜0.3μmにした。
Under the above sputtering conditions, an electrode base film 21 is formed on the entire surface of the piezoelectric ceramic substrate 1. The film thickness of the electrode base film 21 depends on reliability such as mechanical strength and electrical characteristics (in addition, the lead terminals are connected to the vibrating electrode films 2a, 2a,
In the case of soldering to the lead portions 3a and 3b of b, or in the case of the electrode base film of the external electrode films 14 and 15, from the viewpoint of resistance to solder erosion, a predetermined solder material is used. Set to value. In the case of the present embodiment, from the graphs of changes in the amount of solder erosion of the electrode base film 21 due to high-temperature storage (150 ° C.) and soldering (350 ° C.) shown in FIGS. Thickness 0.1
0.30.3 μm.

【0018】こうして形成された電極下地膜21の表面
全面に、さらに、Ag,Cu,Ag−Pd等からなる振
動電極膜2aがスパッタリング法により形成される。こ
の後、圧電セラミックス基板1はスパッタリング装置か
ら取り出され、電極下地膜21と振動電極膜2aがエッ
チング処理される。こうして、引出し部3aを有した円
形の振動電極膜2aが、圧電セラミックス基板1の表面
に電極下地膜21を介して形成される。
A vibrating electrode film 2a made of Ag, Cu, Ag-Pd or the like is further formed on the entire surface of the thus formed electrode base film 21 by a sputtering method. Thereafter, the piezoelectric ceramic substrate 1 is taken out of the sputtering device, and the electrode base film 21 and the vibration electrode film 2a are subjected to etching. Thus, the circular vibrating electrode film 2 a having the lead portion 3 a is formed on the surface of the piezoelectric ceramic substrate 1 via the electrode base film 21.

【0019】以上のように、電極下地膜21の材料とし
て、バナジウムを6.5〜7.5重量%含有したニッケ
ル−バナジウム系合金を用いることにより、セラミック
スとの密着強度が強く、エッチング性や電気特性や耐は
んだ喰れ性に優れた振動電極膜2aが得られる。
As described above, by using a nickel-vanadium-based alloy containing 6.5 to 7.5% by weight of vanadium as a material of the electrode base film 21, the adhesion strength to ceramics is increased, and the etching property and the like are improved. A vibrating electrode film 2a having excellent electrical characteristics and solder erosion resistance is obtained.

【0020】なお、本発明に係る電子部品及びその製造
方法は前記実施形態に限定するものではなく、その要旨
の範囲内で種々に変更することができる。前記実施形態
は、圧電セラミックス基板1の表面全面に電極下地膜2
1や振動電極膜2aを形成した後、必要な部分を残して
エッチングで取り除く方法である。しかし、スパッタリ
ングの際に、所望の形状の開口部を有したマスキング材
を圧電セラミックス基板1の表面に被せ、必要な部分に
のみ電極下地膜21や振動電極膜2aを形成する方法で
あってもよい。
The electronic component and the method of manufacturing the same according to the present invention are not limited to the above embodiment, but can be variously modified within the scope of the invention. In the embodiment, the electrode base film 2 is formed on the entire surface of the piezoelectric ceramic substrate 1.
After forming the vibration electrode film 1 and the vibrating electrode film 2a, a necessary portion is removed by etching while leaving a necessary portion. However, even in a method in which a masking material having an opening of a desired shape is covered on the surface of the piezoelectric ceramic substrate 1 at the time of sputtering, and the electrode base film 21 and the vibration electrode film 2a are formed only on necessary portions. Good.

【0021】[0021]

【発明の効果】以上の説明で明らかなように、本発明に
よれば、セラミックス表面に、バナジウムを6.5〜
7.5重量%含有したニッケル−バナジウム系合金から
なる電極下地膜を介して電極膜を設けたので、セラミッ
クスとの密着強度が強く、耐はんだ喰れ性やエッチング
性や電気特性に優れた電極膜を得ることができる。ま
た、バナジウムを6.5〜7.5重量%含有したニッケ
ル−バナジウム系合金からなる電極下地膜をスパッタリ
ング法で形成することにより、膜厚精度が高い電極下地
膜を形成することができる。
As is apparent from the above description, according to the present invention, 6.5 to 4.5 vanadium is applied to the surface of the ceramic.
Since the electrode film is provided via an electrode base film made of a nickel-vanadium-based alloy containing 7.5% by weight, the electrode has high adhesion strength to ceramics, and is excellent in resistance to solder erosion, etching, and electric characteristics. A membrane can be obtained. Further, by forming an electrode base film made of a nickel-vanadium-based alloy containing 6.5 to 7.5% by weight of vanadium by a sputtering method, an electrode base film with high film thickness accuracy can be formed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る電子部品の一実施形態である圧電
部品の構成を示す分解斜視図。
FIG. 1 is an exploded perspective view showing a configuration of a piezoelectric component which is an embodiment of an electronic component according to the present invention.

【図2】図1に示した圧電部品の外観を示す斜視図。FIG. 2 is a perspective view showing the appearance of the piezoelectric component shown in FIG.

【図3】セラミックス表面に電極膜を形成する方法を示
す一部拡大断面図。
FIG. 3 is a partially enlarged cross-sectional view showing a method of forming an electrode film on a ceramic surface.

【図4】ニッケル−バナジウム系合金のOe−kG曲線
を示すグラフ。
FIG. 4 is a graph showing an Oe-kG curve of a nickel-vanadium alloy.

【図5】高温放置による電極下地膜のはんだ喰れ量の変
化を示すグラフ。
FIG. 5 is a graph showing a change in the amount of solder erosion of the electrode underlayer film due to high temperature storage.

【図6】はんだ付けによる電極下地膜のはんだ喰れ量の
変化を示すグラフ。
FIG. 6 is a graph showing a change in the amount of solder erosion of an electrode base film due to soldering.

【符号の説明】[Explanation of symbols]

1…圧電セラミックス基板 2a,2b…振動電極膜 12,13…外装セラミックス基板 14,15…外部電極膜 18…圧電部品 21…電極下地膜 DESCRIPTION OF SYMBOLS 1 ... Piezoelectric ceramic substrate 2a, 2b ... Vibration electrode film 12, 13 ... Exterior ceramic substrate 14, 15 ... External electrode film 18 ... Piezoelectric component 21 ... Electrode base film

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 セラミックス表面に、バナジウムを6.
5〜7.5重量%含有したニッケル−バナジウム系合金
からなる電極下地膜を介して、電極膜を設けたことを特
徴とする電子部品。
1. Vanadium is applied to a ceramic surface.
An electronic component, wherein an electrode film is provided via an electrode base film made of a nickel-vanadium-based alloy containing 5 to 7.5% by weight.
【請求項2】 前記電極下地膜の膜厚が0.1〜0.3
μmであることを特徴とする請求項1記載の電子部品。
2. The method according to claim 1, wherein said electrode underlayer has a thickness of 0.1 to 0.3.
The electronic component according to claim 1, wherein the thickness is μm.
【請求項3】 セラミックス表面に、バナジウムを6.
5〜7.5重量%含有したニッケル−バナジウム系合金
からなる電極下地膜をスパッタリング法で形成したこと
を特徴とする電子部品の製造方法。
3. Vanadium is applied to the ceramic surface.
A method for manufacturing an electronic component, comprising: forming an electrode base film made of a nickel-vanadium-based alloy containing 5 to 7.5% by weight by a sputtering method.
JP16590999A 1999-06-11 1999-06-11 Electronic part and manufacture of the same Pending JP2000353932A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16590999A JP2000353932A (en) 1999-06-11 1999-06-11 Electronic part and manufacture of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16590999A JP2000353932A (en) 1999-06-11 1999-06-11 Electronic part and manufacture of the same

Publications (1)

Publication Number Publication Date
JP2000353932A true JP2000353932A (en) 2000-12-19

Family

ID=15821322

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16590999A Pending JP2000353932A (en) 1999-06-11 1999-06-11 Electronic part and manufacture of the same

Country Status (1)

Country Link
JP (1) JP2000353932A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002335141A (en) * 2001-03-05 2002-11-22 Agilent Technol Inc Method for manufacturing resonator
JP2006197278A (en) * 2005-01-14 2006-07-27 Seiko Instruments Inc Surface mounting piezoelectric vibrator, oscillator and electronic apparatus
RU2458458C2 (en) * 2010-09-14 2012-08-10 Федеральное государственное унитарное предприятие Омский научно-исследовательский институт приборостроения (ФГУП ОНИИП) Method to manufacture piezoelements for high-frequency resonators

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002335141A (en) * 2001-03-05 2002-11-22 Agilent Technol Inc Method for manufacturing resonator
JP2006197278A (en) * 2005-01-14 2006-07-27 Seiko Instruments Inc Surface mounting piezoelectric vibrator, oscillator and electronic apparatus
TWI385912B (en) * 2005-01-14 2013-02-11 Seiko Instr Inc Surface mount type piezoelectric vibrator, oscillator, electronic device, and radio clock
RU2458458C2 (en) * 2010-09-14 2012-08-10 Федеральное государственное унитарное предприятие Омский научно-исследовательский институт приборостроения (ФГУП ОНИИП) Method to manufacture piezoelements for high-frequency resonators

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