JP2000348603A - Electric-field electron emission element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an element for forming a cathode electrode with high yield, by providing an opening group near a plurality of cathode electrodes in gate wiring of an electric-field electron emission element group provided in respective crossing regions between the plurality of cathode electrodes respectively formed stripe like and a plurality of gate wirings. SOLUTION: A luminescent-type display device displays a pattern by arranging picture elements comprising an electric-field electron emission element group and a fluorescent layer 18 in a matrix form, and exciting and make luminous the fluorescent layer 18 with electrons from the electric-field electron emission elements in each picture element selected so as to provide a desired display pattern. The luminescent-type display device comprises a plane substrate 1 having on its surface a plurality of stripe-like cathode wirings 2b, a plurality of stripe-like gate wiring 4c substantially orthogonal to them, and a plurality of electric-field electron emission element groups in their crossing regions, a facing substrate 10 faced to the plane substrate 1 and having an anode electrode 9 and the fluorescent layer 18 laminated on the substantially entire surface, and a vacuum layer 12 held between these substrates.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission device which emits electrons by the electric field effect among electron sources used for a light emitting display device, an optical printer head, a multipolar electronic device, an X-ray generator, and the like. Regarding the structure.

[0002]

2. Description of the Related Art A conventional field electron-emitting device and a method of manufacturing the same are disclosed in CA Spindt et al. In Journal of Applied Physics (JA).
P. ), Vol. 47, no. 12 (1976) is known.

FIG. 3 is a schematic sectional view of a conventional Spindt-type field emission device. The field electron emission device includes an insulating layer 303 and a gate electrode 304 laminated on the surface of a low-resistance silicon (Si) substrate 301, and a projection-shaped cathode formed on the surface of the Si substrate 301 inside the opening of these. It is composed of an electrode 302. The thicknesses of the insulating layer 303 and the gate electrode 304 are 1.5 μm and 0.1 μm, respectively.
4 μm, and the opening diameter of the gate electrode 304 is 1.5 μm.
m, and the height of the cathode electrode 302 is about 1.9 μm.

In the method of manufacturing this field emission device, first, an insulating layer 303 made of a silicon dioxide (SiO ₂ ) film and a gate electrode 304 made of molybdenum (Mo) are laminated on a surface of a Si substrate 301 by a sputtering method. A gate electrode opening 304a and an insulating layer opening 303a are provided in the electrode 304 and the insulating layer 303 by a photoetching method. Thereafter, Mo is deposited on the entire surface by a sputtering method, and a projection-shaped cathode electrode 302 is formed in a self-aligned manner on the surface of the Si substrate 301 using the respective openings. Finally, unnecessary Mo on the surface of the gate electrode 304 is removed by electrolytic etching to complete the manufacturing process.

[0005]

However, the above-mentioned prior art field emission device has several problems listed below. That is, when the cathode electrode is formed on the entire surface of a large flat substrate, the sputtering method or the vapor deposition method has an elevation angle when the flat substrate is viewed from the radiation source, and the flat substrate surface is near the center of the flat substrate and near the periphery. The range angles of the particles with respect to are different. For this reason, the angle formed between the weight axis of the manufactured cathode electrode and the plane substrate surface has an in-plane distribution, and is distributed to the emission threshold voltage and current density of the field emission device depending on the distance between the cathode electrode and the gate electrode. Had occurred. In the process of forming the cathode electrode, Mo is used.
In the electrolytic etching process performed after the sputtering process, the cathode electrode is etched at the same time as unnecessary Mo. Therefore, it is difficult to maintain the shape of the cathode electrode, and the manufacturing yield is reduced.

SUMMARY OF THE INVENTION The present invention is directed to overcoming the above-mentioned problems of the prior art. It is an object of the present invention to provide a field emission device capable of uniformly forming a cathode electrode with a high yield even on a large-area flat substrate. To provide.

[0007]

According to the present invention, there is provided a field emission device comprising: a plurality of stripe-shaped cathode wirings; a plurality of cathode electrodes formed on the surface of the cathode wiring; And a plurality of gate wirings formed in a stripe shape so as to be substantially orthogonal to the cathode wiring.

Further, the field emission device according to the present invention comprises a gate line and a source line arranged in a lattice, and a transistor arranged at each intersection of the gate line and the source line and provided for each pixel. And a field emission device provided for each of the pixels, wherein the emission of electrons of the field emission device of each pixel is controlled by controlling the transistor.

In the above-mentioned field emission device, the field emission device has a cathode electrode and a gate electrode having an opening near the cathode electrode, and the gate electrode is connected to the transistor. Features.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The field emission device of the present invention and a method for manufacturing the same will be described in more detail with reference to Examples. <Embodiment 1> In this embodiment, a field electron-emitting device made by thermal oxidation of a Si single crystal substrate and a method of manufacturing the same will be described.

First, the structure of the field emission device will be described.
I do. FIGS. 1A and 1B show the field electron emission of this embodiment.
Schematic plan view of an output element and a schematic cross section taken along line A-A '
FIG. This field emission device is made of silicon single crystal substrate.
Flat substrate 1 and projections formed on the surface of flat substrate 1
Shape of the cathode electrode 2 and an opening near the cathode electrode 2
Insulating layer 3 formed on the surface of flat substrate 1
Opening near the gate electrode 2 and formed on the surface of the insulating layer 3.
It is composed of a gate electrode 4. The planar substrate 1 is an n-type conductor
And the carrier concentration is 1 × 10¹⁹cm^-3Has (100) face
Is a Si single crystal substrate. The cathode electrode 2 is a flat substrate
1 made of the same n-type Si single crystal substrate integrated with
It is approximately 2400 angstroms and has a generally conical shape
You. The tip 2a of the projection of the cathode electrode 2 has its radius of curvature.
Is an acute angle at 1000 Å or less. Insulating layer
Numeral 3 denotes a dioxide S produced by thermally oxidizing the surface of the flat substrate 1.
iO _TwoMade of material. That is, the insulating layer 3 is
Si as the material of the pole 2 and the Si as SiO_TwoInsulating material
Oxygen (O), which is an insulating impurity component that
No. The thickness of the insulating layer 3 is 5000 Å, DC
The withstand voltage is about 8 MV / cm. The gate electrode 4 has a thickness of 1
It is a Mo thin film of 000 angstroms. Cathode electricity
The gate electrode 4 above the pole 2 has a diameter of about 4000 angstroms.
In the storm, the center axis is the weight axis 5 of the cathode electrode 2.
A matching circular gate electrode opening 4a is provided.
The gate electrode 4 is located in the direction of the cathode electrode 2 near the opening.
It has a bent structure. Under gate electrode opening 4a
The insulating layer 3 is insulated so that the cathode electrode 2 is exposed.
A layer opening 3a is provided. The tip 2a of the protrusion is an insulating layer 3
Imaginary plane B-B 'of the insulating layer roughly defined by the flat part of
And a gate roughly defined around the gate electrode opening 4a
It is located closer to the plane substrate 1 than the electrode opening imaginary plane C-C ′.
You. The shortest distance between the projection tip 2a and the gate electrode 4 is about 270
0 Angstrom.

Next, a method of manufacturing the field emission device will be described. 2A to 2E are schematic cross-sectional views of the planar substrate after completion of each main step of the manufacturing method.

First, in a first step, a diffusion mask 6 made of a silicon nitride film (Si ₃ N ₄ film) is formed at a cathode electrode formation position on a flat substrate 1 made of an n-type Si single crystal substrate having a thickness of 700 μm and 6 inches φ. I do. The Si ₃ N ₄ film is formed by thermal CVD (C
chemical Vapor Deposition
Deposited by the n) method and has a film thickness of 3000 Å. This is processed by photoetching to form a truncated cone-shaped diffusion mask 6 having a diameter of about 5000 Å. The wall surface of the diffusion mask 6 is
It has a forward taper shape of 90 degrees or less with respect to the plane (FIG. 2 (a)). The diffusion mask 6 may have a shape other than the truncated cone shape, for example, a truncated pyramid shape or an elliptical truncated cone shape.

Next, in a second step, thermal oxidation is used to thermally diffuse oxygen (O), which is an insulating impurity, into a region of the surface of the planar substrate 1 where the diffusion mask 6 does not exist, thereby forming SiO 2.
_{(2) The} insulating layer 3 is formed, and the cathode electrode 2 is formed in a region where the diffusion mask 6 exists. The diffusion mask 6 is oxidized vertically from the surface of the planar substrate 1 in a region where the diffusion mask 6 is not present, but is oxidized in a vertical direction in a region where the diffusion mask 6 is present in order to prevent oxygen from entering the surface. Does not progress. However, in the thermal oxidation method, the oxidation proceeds in the lateral direction from the end of the diffusion mask 6, so that the SiO ₂ film is formed below the diffusion mask 6 so as to leave a conical Si protrusion self-aligned with the diffusion mask 6. . The remaining Si protrusion is the cathode electrode 2. When steam oxidation is performed for 30 minutes at a substrate temperature of 11000 ° C., a 5000 angstrom thick SiO ₂ insulating layer 3 is formed on the surface of the flat substrate 1, and a height of 2400
A cathode electrode 2 made of Si having a conical shape with a diameter of about 5,000 Å and a lower surface of about Å was formed. The periphery of the diffusion mask 6 was pushed up by the SiO ₂ layer and curved in a concave shape, and an SiON film was formed on the surface thereof (FIG. 2B).

Next, in a third step, a gate electrode layer 4 'made of Mo is formed on the surface of the insulating layer 3 by a sputtering method. The thickness of the gate electrode layer 4 ′ is 2000 Å on the surface of the insulating layer 3 and the diffusion mask, and
Was about 800 angstroms on the wall (Fig. 2
(C)).

Next, in a fourth step, a gate electrode opening 4a self-aligned with the cathode electrode 2 is formed. First, in order to expose the wall surface of the diffusion mask 6, the surface of Mo is partially removed by 1000 Å by dry etching. At this time, Mo on the wall surface of the diffusion mask 6 is completely removed, and the gate electrode layer 4 ′ of 1000 Å remains on the surfaces of the diffusion mask 6 and the insulating layer 3. Next, the exposed diffusion mask 6 is etched away from the exposed wall surface with a hot phosphoric acid solution. At this time, Mo on the surface of the diffusion mask 6 is also lifted off. As a result, a gate electrode 4 having a gate electrode opening 4a self-aligned with the cathode electrode 2 was formed. The opening diameter of the gate electrode opening 4a is about 4000 angstroms (FIG. 2).
(D)).

In the final fifth step, the insulating layer 3 is opened,
The cathode electrode 2 is exposed. Since the HF buffer solution does not dissolve Mo or Si, but dissolves SiO ₂ , the insulating layer 3 exposed in the gate electrode opening 4 a region is removed by etching, and the insulating layer opening 3 a is provided to expose the cathode electrode 2. (FIG. 2 (e)).

In the field emission device manufactured by such a manufacturing method, the shortest distance between the cathode electrode 2 and the gate electrode 4 is about 2700 angstroms, and this variation is within ± 2% for the flat substrate 1 of 6 inches φ. And was very small and good. The degree of this variation is determined by the diffusion mask 6
Reflects the variation in the lateral oxidation rate at the bottom of
The temperature can be further reduced by making the substrate temperature uniform during thermal oxidation.

The electric characteristics of the field emission device thus manufactured were measured in a high vacuum (1 × 10 ⁻⁷ Torr or less). As a result, the cathode current Ik per element becomes Ik =
Assuming that the gate voltage Vgk at 1 μA is the threshold voltage Vth, Vth = 80 V in this embodiment. Also,
The variation was within ± 5%. The variation of the threshold voltage depends on the surface condition of the cathode electrode 2, and is further improved by cleaning the surface in a vacuum. To lower the threshold voltage, the distance between the cathode electrode 2 and the gate electrode 4 may be reduced. For this purpose, a method of reducing the thickness of the insulating layer 3 can be considered. In addition, the insulating layer 3 is formed on the surface of the diffusion mask 6 before the formation of the gate electrode layer 4 'in the third step. SiO
It is effective to reduce the diameter of the diffusion mask 6 by etching and removing the N film, and to reduce the opening diameter of the gate electrode opening 4a.

Although SiO ₂ is used as the material of the insulating layer 3, the present invention is not limited to this. For example, silicon nitride (SiN _x ) or silicon oxynitride (SiON) in which nitrogen (N) is diffused Also available. Although a thermal oxidation method was used as a method of forming the insulating layer, the present invention is not limited to this, and it goes without saying that a method of diffusing an insulating impurity component by an ion implantation method or an anodic oxidation method can be applied.

Although an insulator such as SiO _{2 is used} as the material of the insulating layer, the present invention is not limited to this. That is, for example, a p-type Si single crystal substrate is used as the plane substrate 1 and the p-type silicon layer formed between the planar substrate 1 and the n-type Si layer
The -n junction depletion layer may be used as an insulating layer. At this time, the cathode electrode is p-type Si, and the insulating layer contains, for example, phosphorus (P) as an insulating impurity component. When the impurity concentration of the p-type Si single crystal substrate is 1 × 10 ¹⁵ cm ⁻³ , the reverse bias breakdown voltage of the pn junction depletion layer is about 300 V,
At this time, it has a sufficient withstand voltage as an insulating layer of the field emission device. An n-type Si layer provided on the surface may be used as a gate electrode. Further, the insulating layer may have a laminated structure with the SiO ₂ film.

As a material for the gate electrode 4, a metal such as titanium (Ti), chromium (Cr), aluminum (Al), a silicide, a semiconductor, or the like can be used in addition to Mo.

In this embodiment, an n-type Si single-crystal substrate is used as the flat substrate 1. However, the present invention is not limited to this. And the like can be applied. <Embodiment 2> In this embodiment, a manufacturing method using an inversely tapered or eave-shaped diffusion mask as a diffusion mask for manufacturing a field emission device will be described.

FIGS. 4A to 4D are schematic cross-sectional views of a flat substrate after a main step of a method of manufacturing a field emission device using a diffusion mask having an inversely tapered shape.

First, in a first step, an inversely tapered diffusion mask 6 is formed on the surface of the flat substrate 1. The diffusion mask 6 has a thickness of 5000 deposited on the surface of the planar substrate 1 by a thermal CVD method.
An Angstrom SiO ₂ film is processed into a reverse tapered shape by a photo-etching method, and has an inverted truncated cone shape with a lower surface in contact with the flat substrate 1 having a diameter of 0.5 μm and an upper surface on the opposite side having a diameter of 1.5 μm. . When the SiO ₂ film deposited by the thermal CVD method has a low adhesion strength with the flat substrate 1 and performs HF wet etching in a state where the adhesion strength with the resist is high, the etching at the interface with the flat substrate 1 is quick. Then, a diffusion mask 6 having an inversely tapered shape is formed (FIG. 4A).

Next, in the second step, the insulating layer 3 is formed in the same manner as in the second step of the first embodiment (FIG. 4B).

Next, in a third step, a gate electrode layer 4 'is formed by a directional particle deposition method. The directional particle deposition method is a method in which particles are ejected from a direction substantially perpendicular to the surface of the flat substrate 1 to deposit the gate electrode layer 4 '. When this method is used, no particles are deposited on the wall surface of the diffusion mask 6 due to the eaves effect of the diffusion mask 6 having the inverse tapered shape, and the gate electrode layer 4 ′ is formed between the surface of the diffusion mask 6 and the surface of the insulating layer 3. Is divided. In the present embodiment, an electron beam evaporation method was used as the directional particle deposition method, and Mo particles were deposited to a thickness of 1000 Å to form the gate electrode layer 4 ′ (FIG. 4C). As the directional particle deposition method, a sputtering method, an ECR plasma deposition method, or the like can be applied other than the vapor deposition method.

Next, in a fourth step and a fifth step, a gate electrode opening 4a and an insulating layer opening 3a are continuously formed by self-alignment with the cathode electrode 2. The flat substrate 1 is immersed in an HF buffer solution, and the diffusion mask 6 and the insulating layer 3 in the vicinity of the cathode electrode 2 are successively removed by etching.
To expose. At this time, Mo on the surface of the diffusion mask 6 is also lifted off (FIG. 4D).

In the manufacturing method according to the present embodiment, the wall surface of the diffusion mask 6 is exposed by the application of the directional particle deposition method, and the Mo surface performed in the third step of the first embodiment is partially removed to remove the wall surface. The step of exposing is unnecessary, and the diffusion mask 6 and the insulating layer 3 are made of the same material, so that they have an excellent feature that the gate electrode opening 4a and the insulating layer opening 3a can be continuously formed by the same means.

In this embodiment, the diffusion mask 6 is made of SiO ₂
Although an inverted tapered shape made of a material is used, an eaves-shaped shape formed of a multilayer film can be used.
FIGS. 5A and 5B are schematic cross-sectional views of two types of diffusion masks composed of a multilayer film. The multilayer film forming the diffusion mask 6 is composed of a first SiO ₂ film 6a,
The Si ₃ N ₄ film 6b and the second SiO ₂ film 6c. The second SiO ₂ film 6c shown in FIG. 5A has a reverse tapered shape, and the one shown in FIG. 5B has a forward tapered shape. In each case, the first SiO ₂ film 6a or Si ₃ N It is important that it has a structure that protrudes laterally compared to the _four films 6b and has an eaves effect. The Si ₃ N ₄ film 6b has a function of preventing transmission of insulating impurities, and the first SiO ₂ film 6a has a function of relaxing the stress of the Si ₃ N ₄ film 6b. <Embodiment 3> In this embodiment, the cathode electrode is made higher,
A field-emission device in which the tip of the protrusion is closer to the gate electrode and a method for manufacturing the same will be described.

FIGS. 6A to 6E are schematic cross-sectional views of the flat substrate after completion of each main step of the method of manufacturing the field emission device of this embodiment.

First, in the first step, a diffusion mask 6 is formed on the surface of the flat substrate 1 at the position where the cathode electrode is to be formed.
The pedestal 1a is formed below the diffusion mask 6. The diffusion mask 6 has an inverted truncated pyramid shape having a square plane and an inverted tapered cross section, and a lower surface in contact with the plane substrate 1 is a square having a side of 5000 angstroms. 110> direction. The method of manufacturing the diffusion mask 6 is the same as the first step of the second embodiment (FIG. 6).
(A)). The pedestal 1a has a truncated pyramid shape with a height of 3500 angstroms and one side of the upper surface of about 5000 angstroms.
An i-single-crystal substrate was formed by an anisotropic etching method (FIG. 6B). An EPW method using a mixed etching solution of ethylenediamine, pyrocatechol and water was used as the anisotropic etching method. In addition, a KOH method or a dry etching method can be applied. The pedestal 1a formed by the anisotropic etching method has four (111) planes which make an angle of about 55 degrees with the surface of the flat substrate 1.

The subsequent second to fifth steps are the same as the second to fifth steps of the second embodiment (FIGS. 6C to 6E).

FIGS. 7A and 7B are a schematic plan view and a schematic sectional view taken along line DD 'of the field emission device of this embodiment. The cathode electrode 2 formed on the surface of the flat substrate 1 has a substantially square pyramid shape with a height of about 6000 angstroms and a vertical angle (θ) of about 70 degrees in cross section, and the weight axis 5 has a substantially square shape. Pass through the center of the gate electrode opening 4a. The thickness of the insulating layer 3 in the plane portion is about 5000
The thickness of the gate electrode 4 is about 1000 angstroms. Accordingly, the protrusion tip 2a is located above the insulating layer virtual plane EE 'roughly defined by the plane portion of the insulating layer 3, and the gate electrode barrier virtual plane F- is roughly defined around the gate electrode opening 4a. It is located below F '. The shortest distance between the projection tip 2a and the gate electrode 4 is about 2500 angstroms. This field emission device has a structure in which the tip 2a of the projection is closer to the gate electrode 4 than that of the first or second embodiment. This is because, by using the pedestal 1a, Si
This is due to a reduction in the amount of protrusion of the O ₂ film. The threshold voltage of the field emission device described in this embodiment is Vgk = 70 V
(Ik = 1 μA). <Embodiment 4> In this embodiment, a field-emission device using a flat substrate composed of an insulating substrate and a conductive thin film provided on the surface thereof and a method of manufacturing the same will be described.

FIG. 8 is a schematic sectional view of a field emission device having an insulating substrate. This field emission device is formed integrally with a flat substrate 1 comprising a transparent quartz substrate 1b and a conductive n-type polycrystalline Si thin film 1c formed on the surface thereof, and the same material on the surface of the Si thin film 1c. Cathode electrode 2 and S
An insulating layer 3 made of a SiO ₂ film formed on the surface of the i thin film 1 c and opened near the cathode electrode 2, and a gate electrode 4 formed on the surface of the insulating layer 3 and opened near the cathode electrode 2. You. The Si thin film 1c has an electron concentration of about 1
× 10 ¹⁸ cm ^-3 , the specific resistance is about 0.03Ω · cm,
The film thickness is about 50 at the flat portion where the cathode electrode 2 does not exist.
00 angstroms. The cathode electrode 2 has a substantially conical shape with a height of about 2000 Å, and the radius of curvature of the tip 2a of the projection is 2000 Å or less. The insulating layer 3 has a thickness of about 5500 angstroms,
It is formed by thermally diffusing oxygen, which is an insulating impurity, into the Si thin film 1c. The gate electrode 4 is made of a Mo thin film having a thickness of 1000 angstroms, and the gate electrode opening 4a is formed in a circular shape having a diameter of about 5500 angstroms in a self-aligned manner with the cathode electrode 2.

The method of manufacturing this field emission device is the same as the manufacturing method described in the second embodiment except for the step of preparing the flat substrate 1 and the conditions of thermal oxidation. The preparation process of the planar substrate 1 is performed by forming n on the surface of a quartz substrate 1b having a thickness of 1.1 mm and a diameter of 6 inches.
This is a step of preparing a flat substrate 1 by forming a mold Si thin film 1c. The Si thin film 1c is obtained by thermally diffusing phosphorus (P) into a non-doped polycrystalline Si thin film having a thickness of 8000 angstroms deposited by a low pressure CVD method to reduce the resistance. The thermal oxidation conditions in the second step are such that the substrate temperature is 110
Steam oxidation at 0 ° C. for 20 minutes. Polycrystalline S
The oxidation time of the i-thin film is shorter than that of the single-crystal Si substrate, so the oxidation time is short.

The Si thin film 1c can be used for wiring.
In this case, if the Si thin film 1c is etched and separated before the thermal oxidation step, when forming the insulating layer in the second step,
The wiring is also covered with an insulating layer, which is convenient for insulating and separating the wiring. When a transparent insulating substrate is used, the flat substrate 1 is transparent in a region where the Si thin film 1c and the gate electrode 4 are not present.
Therefore, when a light-emitting display device is configured using the field emission device of this embodiment, light emission of the fluorescent layer can be recognized from the direction of the flat substrate 1, so that a bright display device can be realized.

In this embodiment, the Si thin film is used as the conductive thin film and the SiO ₂ film is used as the insulating layer. However, the present invention is not limited to this combination, and for example, the combinations shown in Table 1 can be applied.

[0039]

[Table 1]

Here, Al ₂ O ₃ and Ta ₂ O ₅ are Al and Ta
Oxygen which is an insulating impurity may be diffused by anodization. In addition to the quartz substrate 1b, any type of flat substrate that can withstand the manufacturing method can be used.

Example 3 is applied to the manufacturing method of this example,
It is also easy to form the pedestal on a conductive thin film and bring the tip of the projection closer to the gate electrode. <Embodiment 5> In this embodiment, a method of manufacturing a field electron emission device in which the tip of a projection of a cathode electrode is sharpened will be described. This embodiment can be applied not only to the field emission devices of the first to fourth embodiments but also to other field emission devices having a protruding cathode electrode.

FIGS. 9A to 9C are schematic sectional views of the flat substrate before and after the sixth step in this embodiment. The sixth step is a step of sharpening the cathode electrode of the field emission device manufactured up to the fifth step by a dry etching technique. After the fifth step, the cathode electrode 2 has a radius of curvature of several hundreds due to diffusion along the interface of impurities.
0 Angstroms (see FIG. 9)
(A)). Such a field emission device has a very large threshold voltage and poor electrical characteristics. Then the tip 2
In order to reduce the radius of curvature of a and improve the electrical characteristics,
In the sixth step, the cathode electrode 2 is irradiated with a beam-like etching gas 7, and the side surface of the cathode electrode 2 is mainly etched away to sharpen the tip 2a of the projection (FIG. 9).
(B)). When the cathode electrode 2 was made of a Si material, etching was chemically performed using chlorofluorocarbon (CF ₄ ) as an etching gas 7. In addition to this, physical etching by sputtering with accelerated particles is also effective. These methods are effective even for materials other than Si materials. The sharpened field electron emission element is supported by the flat substrate 1 around the cathode electrode 2 and the tip 2a of the projection is about 1.5 times as far as the gate electrode 4, but its radius of curvature is 500.
Angstrom or less, and the sharpening of the cathode electrode 2 was realized (FIG. 9C).

In the field emission device having the cathode electrode sharpened according to the present embodiment, the threshold voltage is Vgk =
The threshold voltage was 55 V (Ik = 1 μA), which was about 30% lower than that before sharpening.

As a method of lowering the threshold voltage, there are a method of reducing the distance between the gate electrode and the cathode electrode, and a method of reducing the radius of curvature of the tip of the projection. In addition, a method of reducing the work function of the cathode electrode is also available. Very effective. Barium (Ba), Cesium (Cs), Thorium (Th), Barium oxide (BaO), Thorium oxide (T
A thin film of a material having a small work function such as hO ₂ ) may be formed near the tip of the protrusion. FIG. 10 is a schematic cross-sectional view of a field electron emission element in which a Ba thin film 8 is formed on the tip 2a of the projection of the cathode electrode 2. The threshold voltage of this field emission device is V
gk = 40 V (Ik = 1 μA). The presence of the Ba thin film 8 reduces the distance between the cathode electrode 2 and the gate electrode 4, and this effect also lowers the threshold voltage. <Embodiment 6> In this embodiment, a multi-pole electronic device using a field emission device will be described.

FIGS. 11A and 11B are a schematic plan view and a schematic sectional view taken along line GG 'of a vertical triode device. The three-electrode device is a vacuum transistor having three electrodes, ie, a cathode electrode, a gate electrode, and an anode electrode, in a vacuum, and is an electronic device that controls an electron current by the potential of each electrode. The vertical triode device is composed of a flat substrate 1 having a field electron emission element comprising a cathode electrode 2 and a gate electrode 4 and a counter substrate 10 having an anode electrode 9 on its surface.
Are arranged via a holding body 11 so that the cathode electrode 2 and the anode electrode 9 face each other.
2 is held. Example 3 is a field emission device.
And the gate electrode 4 was shared by making four of them in parallel. The opposing substrate 10 is a flat glass substrate, and its thermal expansion coefficient matches that of the flat substrate 1 with an error within 10%. The anode electrode 9 is made of a W material.
The holding body 11 is made of the same material as the counter substrate 10 and is formed so as to surround the field emission device, and is bonded and sealed to each substrate using frit glass. The vacuum layer 12 is made of BaAl ₄ gettering material evaporated by light heating to obtain 1 ×
The degree of vacuum is maintained at 10 ^-7 Torr or less. The cathode terminal 1d, the gate terminal 4b, and the anode terminal 9a were used for taking out from each electrode to an external electronic circuit. This vertical triode device has a cathode electrode 2 and a gate electrode 4
(The distance between G and K) is 2500 angstroms, and the distance between the cathode electrode 2 and the anode electrode 9 (AK
(Interval distance) is 50 μm. The size of the vacuum layer 12 is 200 μm in length, 200 μm in width, and 50 μm in thickness.

FIGS. 12 (a) and 12 (b) are a schematic plan view and a schematic cross-sectional view taken along line HH 'of a horizontal triode device. The horizontal triode is composed of a field emission device and an anode 9
Are arranged side by side on the surface of the flat substrate 1, and are different from the vertical triode device in that the anode electrode 9 and the gate electrode 4 are formed in the same layer. Other structures are the same as the structure shown in FIG.

The voltage and current (V-
I) Static characteristics are shown in FIG. This connects the cathode electrode 2
Grounded, with anode voltage constant at Vak = 200V
In the state, the gate current 13a (I
gk) and the anode current 13b (Iak) were measured.
H. Igk and Iak are exponential functions to Vgk
It shows that it is a FN tunnel current. here
It should be noted that the current ratio (Iak / Ig
k) is approximately constant and about 30. Ie vertical
When the triode is controlled in the current mode, the input (Igk)
On the other hand, the output (Iak) is in a proportional relationship, and the current amplification rate α
= 30 linear current amplifier. FIG. 14 shows this vertical type
FIG. 3 is a circuit diagram illustrating a configuration of a linear amplifier using a pole device.
The cathode electrode 2 of the triode device 14 is grounded,
The anode bias voltage 16 (V _AK) And load resistance 15
(R_L) Are connected in series. Gate electrode 4
Ias current I_iAnd small signal current i_iInput current with
17 (I_i+ I_i) Is input to both ends of the load resistor 15.
The output voltage shown by the equation appears. That is, Vo + vo = −α · R_L・ (I_i+ I_i) = − Α · R_L・ I_i−α ・ R_L・ I_i ... Therefore, the small signal current i_iIs -α
R_LA double amplified output voltage vo is obtained. like this
The same characteristics can be obtained in a horizontal triode device as well.

The three-electrode device can also perform an anode current switching operation by turning on / off a gate voltage. Triode devices having such characteristics are used for audio power amplifiers, brushless smoke drive circuits, and the like.

A material for generating X-rays such as copper (Cu) is used as a material for the anode electrode 9 of the triode vacuum device.
By exciting with electrons emitted from the field emission device, an X-ray generator can be made from such a triode device. This X-ray generator uses an X-ray source of several tens of μm.
Since it can be made as fine as the following, an X-ray source of a minute beam can be realized. <Embodiment 7> In this embodiment, a light emitting display device using a field emission device will be described. In a light-emitting display device, pixels composed of a field electron emitting element group and a fluorescent layer are arranged in a matrix, and in each pixel selected to have a desired display pattern, the fluorescent layer is exposed to electrons from the field electron emitting element. A pattern is displayed by excitation light emission.

FIG. 15 is a schematic perspective view of a simple matrix type light emitting display device. This device has a flat substrate 1 having a plurality of stripe-shaped cathode wirings 2b, a plurality of stripe-shaped gate wirings 4c substantially orthogonal to the cathode wirings 2b, and a plurality of field-emission element groups provided in a region where these are crossed.
The main configuration is a counter substrate 10 which is disposed to oppose this and has an anode electrode 9 and a fluorescent layer 18 laminated on almost the entire surface, and a vacuum layer 12 held between these substrates.
Each pixel is composed of a field emission device group and a fluorescent layer region facing the field emission device group. That is, the pixel at address m × n is located at the intersection p of the n-th cathode wiring and the m-th gate wiring.
It is composed of a group of field emission devices provided in qrs and a corresponding phosphor layer region p′q′r ′s ′ of the opposing substrate 10. The flat substrate 1 is made of a p-type Si single crystal substrate, and the cathode wiring 2b is made of an n-type Si layer formed on the flat substrate 1. The cathode electrode 2 is connected to the cathode wiring 2b in the cross region.
Is made of the same n-type Si layer on the surface. The manufacturing method of the cathode electrode 2, the insulating layer 3, the gate electrode opening 4a, and the like is almost the same as in the third embodiment. The opposing substrate 10 is a transparent glass substrate, and the anode electrode 9 is formed of a transparent conductive layer such as ITO. Light emitted from the fluorescent layer 18 is transmitted through these and is recognized from the direction of the opposing substrate 10.

This simple matrix type light-emitting display device is operated by a multiplex driving method using the cathode wiring 2b (or gate wiring 4c) as a segment line and the gate wiring 4c (cathode wiring 2b) as a common line. At this time, it is important to set the drive voltage and waveform so that the potential of the n-type Si layer, that is, the potential of the cathode wiring 2b does not become negative with respect to the potential of the p-type Si single crystal substrate.

FIG. 16 is a partial schematic perspective view of an active matrix type light emitting display device, and FIG. 17 is a partial schematic circuit diagram of the present device. This is a thin film transistor (Thin
A film transistor (TFT) is provided for each pixel, and a display operation is performed by applying a voltage to the gate electrode of the selected pixel through the TFT. This device comprises a TFT gate line 20 and a TFT source line 21 formed in a lattice on the surface of a transparent flat substrate 1, a TFT 19 and a field emission element group formed in the vicinity of the intersection thereof and arranged in a matrix, The main components are the anode electrode 9 and the fluorescent layer 18 which are stacked on the surface of the counter substrate 10 placed substantially in parallel with the vacuum layer 12 interposed therebetween. The field electron emission element group was manufactured in the same manner as in Example 4, and the silicon thin film 1c was used as a common cathode wiring. The drain terminal of the TFT is connected to the gate electrode 4, the gate terminal is connected to the TFT gate line 20, and the source terminal is connected to the TFT source line 21, respectively. Polycrystalline silicon TF as TFT
T, amorphous silicon TFT, CdSe TFT, or the like can be used. The driving method of this device is as follows. That is, when a data voltage is applied to each TFT source line 21 and a selection voltage for turning on the TFT is applied to the selected TFT gate line 20 (scanning line), the TFT along the TFT is turned on, and the TFT is turned on through the TFT channel. A data voltage is applied to the gate electrode 4 of each pixel. The data voltage causes the fluorescent layer 18 to emit electrons having a desired emission luminance from each group of field emission devices, thereby displaying a pixel. The screen is displayed by sequentially performing this display operation for each scanning line.

By arranging phosphors exhibiting red (R), green (G), and blue (B) for each pixel as the fluorescent layer 18, a multi-color or full-color light-emitting display device can be realized. Further, the light emission of the fluorescent layer 18 is
However, the flat substrate 1 is transparent and the electrodes and wirings used in the flat substrate 1 can be easily recognized from the direction of the flat substrate 1 by thinning or making the wiring transparent. The light-emitting display device for monochrome or color described in this embodiment is characterized by its low power consumption and thinness, and is designed to be a flat-type wall-mounted television, a lightweight portable television, a laptop computer, and a balm. It is excellently applicable to a terminal display device of a portable information device such as a top computer, an electronic viewfinder of a form VTR, and a video light source of a projection display device. Further, it constitutes a 7-segment character display device or a special small display device, and is used for an alphanumeric display, a time display for a wristwatch, and a display for a game machine. <Embodiment 8> In this embodiment, an optical printer head device using a field emission device will be described.

FIGS. 18A and 18B are a schematic plan view and a schematic sectional view taken along line JJ 'of the monochromatic optical printer head device. In this device, pixels composed of a field electron emission element group and a fluorescent layer are arranged in a line, and an arbitrary pixel emits light by a voltage applied to each gate electrode 4 or anode electrode 9. This optical printer head device can easily be used as a three-color light source of RG3 by arranging three kinds of different fluorescent materials in the fluorescent layer. The control of the light emission state of each pixel by the data signal is performed by a Si LSI circuit or a TFT circuit integrally formed on the flat substrate 1 or an individual LSI chip formed hybrid by COG technology or the like. The monochrome type or the color type is used as a line type light source of a color optical printer such as a xerographic type optical printer, a silver halide photographic type, and a photosensitive dye type.

[0055]

The field emission device of the present invention and the method of manufacturing the same have the effects of the invention as listed below. The cathode electrode and the gate electrode are formed in a self-aligned manner,
In addition, the uniformity of the shape and size of the protrusions and the electrical characteristics are good. Since various types of substrates such as a glass substrate, a semiconductor substrate, and a conductive substrate can be used as a planar substrate, the degree of freedom of the device is large. The quality of the insulating layer is high, the electrical characteristics such as the withstand voltage are excellent, and the high withstand voltage / power device composed of the field emission device is highly reliable. Since the manufacturing method is compatible with and compatible with semiconductor VLSI technology, drive circuits and the like are simultaneously formed on the same substrate,
It is easy to combine and enhance the functionality of the device, and is suitable for the configuration of intelligent devices.

[Brief description of the drawings]

FIGS. 1 (a) and 1 (b) are views for explaining Example 1, and are a schematic plan view of a field-emission device made by anodization of a Si single crystal substrate and taken along line AA ′. FIG.

FIGS. 2A to 2E are schematic cross-sectional views of a flat substrate after each main process, for explaining a method of manufacturing the field emission device shown in FIG.

FIG. 3 is a schematic sectional view of a conventional Spindt-type field emission device.

FIGS. 4A to 4D are schematic cross-sectional views of a flat substrate after each main step of a method for manufacturing a field emission device using a diffusion mask having a reverse taper shape.

FIGS. 5A and 5B are schematic cross-sectional views of two types of diffusion masks composed of a multilayer film.

FIGS. 6A to 6E are schematic cross-sectional views of a flat substrate after a main step of a method of manufacturing a field emission device having a higher cathode electrode.

FIGS. 7A and 7B are a schematic plan view and a schematic cross-sectional view taken along line DD ′ of a field emission device of Example 3. FIGS.

FIG. 8 is a schematic sectional view of a field emission device having an insulating substrate.

FIGS. 9A to 9C are schematic cross-sectional views of a flat substrate before and after a sixth step in Example 5. FIGS.

FIG. 10 is a schematic cross-sectional view of a field emission device in which a Ba thin film is formed on the tip of a projection of a cathode electrode.

FIGS. 11A and 11B are a schematic plan view and a schematic cross-sectional view taken along line GG ′ of a vertical triode device.

12A and 12B are a schematic plan view and a schematic cross-sectional view taken along line HH ′ of a horizontal triode device.

FIG. 13 is a graph showing static voltage / current (VI) characteristics of a vertical triode.

FIG. 14 is a circuit diagram illustrating a configuration of a linear amplifier using a vertical triode device.

FIG. 15 is a schematic perspective view of a simple matrix light emitting display device.

FIG. 16 is a partial schematic perspective view of an active matrix light emitting display device.

FIG. 17 is a partial schematic circuit diagram of the present apparatus.

FIGS. 18A and 18B are a schematic plan view and a schematic sectional view taken along line JJ ′ of a monochromatic optical printer head device.

DESCRIPTION OF SYMBOLS 1 ... Planar substrate 1a ... Pedestal 1b ... Quartz substrate 1c ... Si thin film 1d ... Cathode terminal 2 ... Cathode electrode 2a ... Protrusion tip 2b ... Cathode wiring 3 ... Insulating layer 3a ... Insulating layer opening 4 ... Gate electrode 4a ... Gate electrode opening 4b ... Gate terminal 4c ... Gate wiring

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[Procedure amendment]

[Submission date] March 1, 2000 (200.3.1)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0005

[Correction method] Change

[Correction contents]

[0005]

However, in the above-mentioned prior art field emission device, although the device structure of the field emission device has been embodied, pixels are arranged in a matrix in a light emitting display device. Cannot be realized.

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction contents]

It is an object of the present invention to provide a field emission device which can be used in a light emitting display device in which pixels are arranged in a matrix.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0007

[Correction method] Change

[Correction contents]

[0007]

According to a first aspect of the present invention, there is provided a field emission device having a plurality of cathode wires formed in a stripe shape and a stripe shape formed above the cathode wires so as to intersect with the plurality of cathode electrodes. A plurality of gate wirings, and a field emission group provided at each intersection region of the cathode wiring and the gate wiring, wherein the field emission group comprises a plurality of cathodes. An electrode, and an opening group provided in the gate wiring near the cathode electrode.

[Procedure amendment 5]

[Document name to be amended] Statement

[Correction target item name] 0049

[Correction method] Change

[Correction contents]

A material for generating X-rays such as copper (Cu) is used as a material for the anode electrode 9 of the triode vacuum device.
By exciting with electrons emitted from the field emission device, an X-ray generator can be made from such a triode device. This X-ray generator uses an X-ray source of several tens of μm.
Since it can be made as fine as the following, an X-ray source of a minute beam can be realized. <Embodiment 7> This embodiment describes a field emission device according to the present invention. In this embodiment, a field emission device used for a light-emitting display device will be described. In a light-emitting display device, pixels composed of a field electron emitting element group and a fluorescent layer are arranged in a matrix, and in each pixel selected to have a desired display pattern, the fluorescent layer is exposed to electrons from the field electron emitting element. A pattern is displayed by excitation light emission.

[Procedure amendment 6]

[Document name to be amended] Statement

[Correction target item name] 0055

[Correction method] Change

[Correction contents]

[0055]

According to the field emission device of the present invention, emission of field electrons in a pixel formed by arranging a group of field emission devices in a matrix is performed by using a cathode wiring and a gate wiring arranged in a grid. In addition, since control can be performed by gate lines and source lines arranged in a lattice, light emission of each pixel can be controlled like a liquid crystal panel, and a high-definition image can be displayed.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01J 29/04 H01J 29/04 29/96 29/96 31/12 31/12 C

Claims (3)

[Claims] 1. A plurality of cathode wirings formed in a stripe shape, a plurality of cathode electrodes formed on the surface of the cathode wiring, and an opening near the cathode electrode and substantially orthogonal to the cathode wiring. A plurality of gate wirings formed in a stripe pattern as described above. 2. A gate line and a source line which are arranged in a lattice, a transistor which is arranged according to an intersection of the gate line and the source line, and which is provided for each pixel, and an electric field which is provided for each pixel. A field emission device comprising: an electron emission device; and controlling electron emission of the field emission device of each pixel by controlling the transistor. 3. The device according to claim 1, wherein the field emission device has a cathode electrode and a gate electrode having an opening near the cathode electrode, and the gate electrode is connected to the transistor. 3. The field emission device according to item 3.