JP2000332068A - Inspection device of ic wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To cut grouping inspection and the number of lines by inserting a protective resistance of each IC chip to a branch line, which is branched from a signal main track connecting a probe device and a tester device body and is introduced to each IC chip inside each group. SOLUTION: A signal main track 8 connecting a probe device, which delivers a signal in contact with a group of an IC chip 7 on an IC wafer and a tester device body 1, is formed, and a protective resistance R is inserted to a branch line 9 which is branched from the signal main track 8 and introduced to each IC chip 7 inside each of groups G1 to Gn. An address signal from the tester device body 1 is made to flow to a common address signal main track 8a and the signal is applied to each IC chip 7 inside the group G via the branch line 9, an address is opened and an inspection signal is input to the address. Then a response signal to an inspection signal is input to the same branch line 9 and a common input/output signal main line 1, and inspection is executed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an IC on an IC wafer.
The present invention relates to an IC wafer inspection apparatus that divides a chip group into a plurality of groups and inspects each group.

[0002]

2. Description of the Related Art Hundreds of IC chips are arranged in rows and columns on an IC wafer. A probe device is brought into contact with these IC chips, and the probe device and the tester device main body are connected by signal lines. Inspection methods for performing burn-in inspection and the like of a group of IC chips on a wafer level by connecting them have been tried.

[0003]

However, one I
One IC chip on a C wafer has dozens of external contacts, and in order to access hundreds of IC chips on an IC wafer, the number of external contacts held by one IC chip must be I
The number of signal lines multiplied by the number of C chip groups is required.

For example, if one IC chip has 50 external contacts and an IC wafer is formed by 200 IC chips, 50 × 200 = 10000 signal lines are required. Very sophisticated technology and high manufacturing cost for forming a multilayer wiring board having a high density wiring pattern with a very small pitch are required, which is a factor that hinders industrial implementation and spread.

[0005]

SUMMARY OF THE INVENTION An object of the present invention is to provide an IC wafer inspection apparatus which can appropriately solve these problems.

This inspection apparatus is an inspection apparatus which divides a group of IC chips on an IC wafer into a plurality of groups and performs inspection for each group, and a probe apparatus which contacts the above-mentioned group of IC chips to transmit and receive signals. And a main line connecting between the tester device main body and a main line branched from the main line to be introduced into each IC chip in each of the groups. A protection resistor of each IC chip is inserted into the main line. ing.

According to this inspection apparatus, the number of common signal main lines can be greatly reduced to the number obtained by dividing the total number of branch lines by the number of groups by sharing the signal main lines for each group.

For example, when a trial calculation is made for address signal lines and input / output signal lines, for example, the number of both signal lines is 30
Assuming that the number of chips is 200, 30 × 200 =
According to the present invention, assuming that the 200 IC chips are divided into 10 groups, 60
00 ÷ 10 = 600 common signal main lines are sufficient.

In addition to this, even if one IC chip in a group is short-circuited by inserting a protection resistor into a branch line to be introduced into each IC chip, the protection resistor can be used in another group. The overcurrent is effectively prevented from flowing into the IC chip in the inside, and the above-described grouping inspection can be appropriately realized.

In order to specifically realize the above resistor insertion,
An inspection circuit board that is superimposed on one surface of the IC wafer and transmits and receives signals to and from an IC chip group on the IC wafer;
Forming a common wiring board having a common signal main line for connecting the tester device body to the test circuit board in parallel with the test circuit board apart from the other surface of the test circuit board; and A number of resistor array boards were erected and arranged side by side between the wiring boards, and the resistor array boards were branched from signal main lines on the common wiring board and inserted into branch lines introduced into each IC chip in each group. Have protection resistance.

Thus, the assembly of the inspection circuit board, the common wiring board, and the resistor array board can be simply and rationally configured, and the insertion of the innumerable protective resistor groups can be sorted in groups and arranged in an orderly manner. Maintenance can be replaced every time.

One end of the resistor array board is detachably connected via a first connector attached to the common wiring board, and the other end is detachably connected via a second connector attached to the inspection circuit board. This makes it easier to insert, remove, assemble, and maintain and replace each resistor array board.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

2 and 5, reference numeral 1 denotes a tester device main body, and 2 denotes a probe device. The probe device 2 includes a common wiring board 3 and an inspection circuit board 4. The inspection circuit board 4 is composed of a multilayer wiring circuit board, has a large number of contacts 5 on one surface thereof, and has one end of the contact 5 branched from a common signal main line 8 formed on the common wiring board 3. 9 is fixedly connected to an electrode pad 20 provided at one end, and the other end has a spring structure that elastically presses and contacts each external contact of each IC chip 7 on the IC wafer 6.

The multilayer wiring circuit board forming the inspection circuit board 4 has a wiring pattern for forming the branch line 9.

On the other hand, the common wiring board 3 is a multilayer wiring board for forming a signal main line 8 common to each group of IC chips 7.

That is, the IC wafer inspection apparatus according to the present invention is an inspection apparatus for performing inspection for each group by dividing the group of IC chips 7 on the IC wafer 6 into a plurality of groups G1 to Gn. 200 IC chips on top
Is formed, a plurality of groups, for example, 1
0 ICs and 20 ICs in one group G
This is an inspection device that inspects chips for each group.

The common signal main line 8 is, for a memory IC, an address signal main line, an input / output signal main line, and the like.

Hereinafter, the memory IC will be described. In addition, there are a power supply main line, a vertical / horizontal selection signal main line, a ground main line, and the like for selecting a group of IC chips 7 in vertical and horizontal rows, but these are omitted for simplicity of description, and in FIG. The output signal main line 8b is shown as the signal main line 8.

The end of the common wiring board 3 and the tester main body 1 are connected to the signal main line 8 on the common wiring board 3 via a cable 10.

As described above, the inspection apparatus for an IC wafer
The group of IC chips 7 on the C wafer 6 is divided into a plurality of groups G1 to G1.
As shown in FIG. 1 and the like, the probe device 2 that contacts the IC chip group 7 to transmit and receive signals and the tester device main body 1 are connected, while adopting a configuration in which inspection is performed for each group in Gn. A signal main line 8 is formed, and a protection resistor R is inserted into a branch line 9 branched from the signal main line 8 and introduced to each IC chip 7 in each group G.

A specific structural example for inserting the protection resistor R will be described with reference to FIG. 2. Signals are transmitted and received to and from a group of IC chips 7 on the IC wafer 6 while being superposed on one surface of the IC wafer 6. An inspection circuit board 4 and a common wiring board 3 having a common signal main line 8 for connecting the tester device body 1 to the inspection circuit board 4 are formed, and the common wiring board 3 is connected to a contact 5 of the inspection circuit board 4. They are spaced apart from the surface on the side opposite to the side on which they are arranged, and are arranged in parallel to face each other.

On the other hand, a resistor array board 11 having a large number of protection resistors R is formed, and the resistor array board 11 is provided upright between the inspection circuit board 4 and the common wiring board 3 so as to be arranged side by side.
Accordingly, the protection resistor R is inserted into the branch line 9 which is branched from the common signal main line 8 on the common wiring board 3 by the resistor array board 11 and introduced into each IC chip 7 in each group.

One end of the resistor array board 11 is detachably connected through a first connector 12 attached to the common wiring board 3, and the other end is inserted and removed through a second connector 13 attached to the inspection circuit board 4. Connect as possible.

The first and second connectors 12 and 13 have a large number of surface mounting pieces 21 projecting laterally from the surface facing each of the boards 3 and 4. Is fused and connected to the electrode pads formed on the surface of the substrate through solder paste or the like.

As shown in FIG. 4, a plurality of resistor array chips 14 having a plurality of protection resistors R are mounted on the resistor array board 11, and one end edge and the other end edge of the board 11 have respective protection resistors. A large number of electrode pads 15 and 16 connected to one end and the other end of the R are arranged in a row, and one end of the board 11 is connected to the first connector 12 as shown in FIGS.
, Each electrode pad 15 is brought into pressure contact with each contact in the connector 12, and similarly, by inserting the other end edge of the board 11 into the second connector 13, each electrode pad 15 is inserted into the second connector 13. Each electrode pad 16 is brought into pressure contact with the contact so that it can be inserted and removed.

Referring to FIG. 5, another specific example of the structure for inserting the protection resistor R will be described. The protection resistor R is formed inside or on an outer surface of a multilayer circuit board forming the inspection circuit board 4. It is inserted into the branch line 9.

The test circuit board 4 shown in FIG. 5 is integrated with the common wiring board 3 and, as a means for forming this integrated structure, for example, as shown in the figure, an electrode pad 17 connected to the end of the branch line 9 is connected to the test circuit board. The electrode pad 17 is disposed on one surface of the board 4, that is, on the overlapping surface, and the electrode pad 17 and the electrode pad 18 disposed on the overlapping surface of the common wiring board 3 are fused via a conductive metal such as solder. Both boards 3 and 4 are formed into an integrally laminated structure.

For example, a solder ball 19 is provided on one surface of the electrode pad 17 or 18, and the two pads 17 and 18 are integrally joined through fusion of the solder ball 19, and 4 are integrally joined.

The electrode pad 18 is a pad for branching the branch line 9 provided on the common signal main line 8 side.
The branch line 9 and the protection resistor R are branched and connected to the common signal main line 8 via the electrode pads 17 and 18.

FIG. 1 shows an address signal main line 8a and an input / output main line 8b as common signal main lines 8 formed by the common wiring board 3, and as shown in FIG. A branch line 9 is branched and wired to each IC chip 7 belonging to a group G 'of columns (or rows) in G1 to Gn, and a group of rows (or columns) in each group G1 to Gn from the common input / output signal main line 8b. A branch line 9 is branched to each IC chip 7 belonging to G ″, and a protection resistor R is inserted into each branch line 9.

An address signal from the tester device main body 1 flows to the common address signal main line 8a, and this signal is applied to each IC chip in the group G 'via the branch line 9 to open the address.

On the other hand, an input / output signal from the tester device main body 1 flows to the common input / output signal main line 8b, and this signal is applied to each IC chip 7 in the group G "via the branch line 9 to open the above-mentioned open address. A test signal is input to the tester apparatus main body 1 via the same branch line 9 and the common input / output signal main line 8b, and the test is executed.

Although the embodiment has been described above for testing a memory IC, a signal line can be shared by other types of ICs via the protection resistor R.

[0035]

According to the present invention, the number of common signal main lines can be greatly reduced to the number obtained by dividing the total number of branch lines by the number of groups by sharing the signal main lines for each group.

That is, by inserting a protection resistor into a branch line to be introduced into each IC chip, one IC in the group is temporarily
Even if the chip is short-circuited, the protection resistor effectively prevents the overcurrent from flowing into another IC chip in the group, and the above-described grouping inspection and the purpose of reducing the number of lines can be appropriately realized. Therefore, industrialization such as burn-in inspection at the wafer level can be promoted.

Also, the assembly of the inspection circuit board, the common wiring board, and the resistor array board can be simply and rationally configured, and the insertion of the innumerable protection resistor groups can be sorted in groups and arranged in an orderly manner. Maintenance replacement is easy.

One end of the resistor array board is detachably connected via a first connector attached to the common wiring board, and the other end is detachably connected via a second connector attached to the inspection circuit board. This makes it easier to insert, remove, assemble, and maintain and replace each resistor array board.

[Brief description of the drawings]

FIG. 1 shows an outline of a circuit diagram of an IC wafer inspection apparatus with one group of IC chips.

FIG. 2 is a side view showing a main part of an assembly of a common wiring board, a test circuit board, and a resistance array board which constitute the test apparatus.

FIG. 3 is a perspective view showing a connector for removing and inserting the resistor array board.

FIG. 4 is a front view of the resistor array board.

FIG. 5 is a cross-sectional view showing another example of inserting a protective resistor in the assembly of the common wiring board and the inspection circuit board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Tester apparatus main body 2 Probe apparatus 3 Common wiring board 4 Inspection circuit board 5 Contact 6 IC wafer 7 IC chip 8 Common signal main line 8a Address signal main line 8b I / O signal main line 9 Branch line 10 Cable 11 Resistance array board 12 First connector 13 Second connector 14 Resistive array chip 15, 16 Electrode pad 17, 18 Electrode pad 19 Solder ball 20 Electrode pad 21 Surface mounting piece

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[Procedure amendment]

[Submission date] January 24, 2000 (2000.1.2
4)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

In order to specifically realize the above resistor insertion,
An inspection circuit board that is superimposed on one surface of the IC wafer and transmits and receives signals to and from an IC chip group on the IC wafer;
Forming a common wiring board having a common signal main line for connecting the tester device body to the test circuit board in parallel with the test circuit board apart from the other surface of the test circuit board; and A resistor array board is installed between the wiring boards, and the resistor array board has a protection resistor which is branched from a signal main line on the common wiring board and inserted into each branch line introduced to each IC chip in each group. .

Continued on the front page (72) Inventor Shigeo Ikeda 3-28-7 Nakamagome, Ota-ku, Tokyo Yamaichi Electric Co., Ltd. F-term (reference) 4M106 AA01 BA01 BA14 DD11 DD30

Claims (3)

[Claims] 1. An IC wafer inspection apparatus for performing an inspection for each group by dividing an IC chip group on an IC wafer into a plurality of groups, and a probe apparatus for transmitting and receiving signals by contacting the IC chip group. An inspection device for an IC wafer, comprising: a main signal line connecting between the main circuit and the tester device main body; a protection resistor is inserted into a branch line branched from the main signal line and introduced into each IC chip in each of the groups. . 2. An IC wafer inspection apparatus which divides an IC chip group on an IC wafer into a plurality of groups and performs inspection for each group, wherein the IC chip inspection apparatus is superposed on one surface of the IC wafer and A test circuit board for transmitting and receiving signals to and from an IC chip group; a common signal main line for connecting the tester device main body to the test circuit board, which is disposed in parallel with and separated from the other surface of the test circuit board; A plurality of resistive array boards, which are arranged in parallel between the inspection circuit board and the common wiring board, and connect the inspection circuit board to the common wiring board; An IC wafer characterized in that the board has a protection resistor that is branched from a main line on the common wiring board and inserted into a branch line introduced to each of the IC chips in each of the groups. Inspection equipment. 3. The resistor array board has one end connected to be removable via a first connector attached to the common wiring board, and the other end connected so as to be removable via a second connector attached to the inspection circuit board. 3. The apparatus for inspecting an IC wafer according to claim 2, wherein: