JP2000331916A - Resist removing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently remove a resist without generating popping at the time of removing a resist having a surface hardening layer from a semiconductor wafer. SOLUTION: In this resist removing method, a semiconductor wafer 15 is fixed to a fixed table 11 of a plate friction device 10 so that a surface hardening layer 18h of a resist 18 can be faced up, and the semiconductor wafer 15 is fixed to a rotary head 12 formed at the upper part so that a rough face 14r of a rough face silicon substrate 14 can be faced down. Then, the rough face 14r of the rough face silicon substrate 14 is overlapped on the surface hardening layer 18h, and the resist 18 and the rough face silicon substrate 14 are rotated so that the mutual faces can be rubbed, and small holes can be formed on the whole face of the surface hardening layer 18h of the resist 18. Then, this semiconductor wafer is heated at 250 deg.C in the vacuum tank of the ashing device, and the resist 18 made of high polymer is ashed and removed by the plasma of oxygen gas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for removing a resist used on a semiconductor wafer, and more particularly, to a method for removing a resist having a surface hardened layer, which avoids a popping phenomenon which is likely to occur when removing a resist, and reduces the resist efficiency. The method relates to a method that can be removed.

[0002]

2. Description of the Related Art In a semiconductor manufacturing process, there is a photolithography process in which a pattern having an opening of a predetermined shape is formed in a photoresist (hereinafter abbreviated as “resist”) on a semiconductor wafer. It is used as a mask for forming a film on a semiconductor wafer, etching the film, diffusing impurities, and implanting ions. After these operations are completed, the remaining resist is peeled off and removed. For the removal of the resist, a wet process using fuming nitric acid or a sulfuric acid hydrogen peroxide solution (a mixed solution of sulfuric acid and hydrogen peroxide solution) has conventionally been adopted. In recent years, however, a plasma of oxygen (O ₂ ) gas has been used. As a result, a dry process of ashing a resist has been widely adopted.

In a dry ashing process, a resist made of an organic polymer material is burned by O radicals and O ₂ radicals generated in an oxygen gas plasma, and CO, C
This is a method of removing as a gas such as O ₂ , and the resist is relatively easily ashed. However, there are cases where it is difficult to remove and remove the resist. In particular, when a source / drain region is formed at the time of manufacturing an VLSI,
The problem is significant when ion implantation is performed at a high dose.
That is, when a resist is used as a mask for ion implantation, high-energy ions are naturally implanted into the resist at a high dose. Although it is considered that the heat caused by the ion bombardment at that time is a cause, the surface layer of the resist is cross-linked and hardened, and is not easily removed by ashing with oxygen gas plasma.

Ashing by oxygen gas plasma is as follows.
To improve the ashing rate, typically 150
C. or more, for example, at 250 ° C., but before the surface hardened layer of the resist is ashed, the internal pressure rises exponentially due to the evaporation and evaporation of the evaporation components such as the solvent remaining inside the resist. Explosively destroys resist at some point. This explosive destruction is referred to as popping, and if fragments of the hardened layer are deposited on other parts of the semiconductor wafer due to the popping, it becomes more difficult to remove the hardened layer, and due to the scattered resist components, The semiconductor wafer and the inside of the ashing device are contaminated.

As a method for avoiding the above-mentioned popping phenomenon, Japanese Patent Application Laid-Open No. 11-67738 discloses a method in which a surface hardened layer is removed by using a plasma gas at a first temperature at which popping does not occur, for example, at 120 ° C. Subsequently, a method is disclosed in which the remaining resist is removed at a second temperature, for example, at a temperature of 150 ° C. or higher by a plasma gas.

[0006]

However, Japanese Patent Application Laid-Open No.
The method disclosed in Japanese Patent No. 67738 is a method in which the removal of the hardened surface layer, which is difficult to remove by the plasma gas, is performed at a low temperature at which popping does not occur. Will be reduced. The present invention has been made in view of the above-described problems, and provides a resist removal method having a high processing ability capable of efficiently removing the resist without popping when removing and removing the resist having the surface hardened layer. The task is to

[0007]

The above object is attained by claim 1.
According to a first aspect of the present invention, there is provided a resist removing method in which a resist formed on a semiconductor wafer and having a surface hardened layer is ashed by oxygen gas plasma. A method in which a small hole is formed by physically partially destroying a surface hardened layer in a first step, and ashing is performed in a second step. Such a method for removing the resist is based on a method of forming a small hole formed in a hardened surface layer even when an evaporating component contained in the resist is heated and vaporized when ashing the resist at a temperature of 150 ° C. or more using an oxygen gas plasma. As a result, the internal pressure does not increase, so that popping does not occur. Further, since the ashing is performed at a temperature of 150 ° C. or more, the removal of the resist can be efficiently advanced.

According to a second aspect of the present invention, there is provided a method of removing a resist, wherein the partial hardening of the hardened surface layer in the first aspect is performed by causing a substrate having a rough surface to have surface friction with the hardened surface layer. Is the way. Since such a resist removal method only causes the substrate having a rough surface to rub against the resist having a surface hardened layer on a semiconductor wafer, the hardened surface layer is physically partially destroyed by relatively simple equipment. I can make it. The resist removal method according to claim 3 which is dependent on claim 2 provides a substrate having a rough surface, wherein the surface roughness represented by the maximum height _Rmax of the rough surface is equal to or greater than the thickness of the surface hardened layer (the This is a method using a material having a value within the range of (thickness of the surface hardened layer + 200 nm) or less. The thickness of the hardened surface layer is almost uniquely determined by the energy of the implanted ions.However, such a method for removing the resist destroys only the hardened surface layer of the resist, and does not damage the underlying layer but damages the semiconductor wafer. Do not give.

According to a fourth aspect of the present invention, there is provided a method of removing a resist, wherein a physical partial destruction of a hardened surface layer is performed by a chemical mechanical polishing method, that is, a CMP (Chemical Mechanical Polish) method.
li-shing) method. A known polishing technique can be applied to such a resist removing method, and the hardened surface layer can be easily partially destroyed by a polishing slurry in which fine particles having high hardness are suspended.

[0010] The resist removing method according to claim 5 which is dependent on claim 1 is a method in which physical partial destruction of a hardened surface layer is performed by grinding with a grindstone. A known grinding technique can be applied to such a resist removing method, and the surface hardened layer can be easily partially destroyed by a grindstone to which abrasive grains, which are fine particles having high hardness, are bonded.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As described above, the resist removing method of the present invention is a resist removing method in which a resist formed on a semiconductor wafer and having a surface hardened layer is ashed by oxygen gas plasma in the first step. This is a method in which a small hole is formed by physically partially breaking the surface hardened layer, and ashing is performed in the subsequent second step. In addition,
The term "semiconductor wafer" used herein refers to a substrate in which various components of a semiconductor device are formed on a substrate such as a silicon substrate. Hereinafter, a semiconductor wafer in which silicon oxide as an insulating film is formed on a silicon substrate is represented.

The thickness of the resist formed on the semiconductor wafer varies depending on the purpose of use and is not constant, but is generally formed to a thickness of about 1 μm. Further, when ion implantation is performed on a semiconductor wafer using the resist as a mask, the ion implantation is also performed on the resist at the same time, and the thickness of the surface hardened layer formed by the ion implantation depends on the magnitude of the energy that the implanted ions have. . As the first step of the resist removing method of the present invention,
Any method may be employed to physically destroy the hardened surface layer of the resist, but it is necessary that the method does not damage the semiconductor wafer under the resist. As the method, a method in which a small hole is formed in the surface hardened layer by polishing or grinding the surface hardened layer is preferable.

In the subsequent second step, ashing is performed on the resist in which small holes are formed in the surface hardened layer by ordinary oxygen gas plasma. In order to improve the ashing rate, the semiconductor wafer is kept at a temperature of 150 ° C. or more, for example, at a temperature of about 250 ° C. during ashing. Thereafter, the resist is completely removed from the semiconductor wafer by cleaning the surface of the semiconductor wafer.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The resist removing method of the present invention will be described below with reference to the accompanying drawings.

(Embodiment 1) As one method of the first step, a method is used in which a silicon substrate, a quartz substrate, or a glass substrate having a rough surface is brought into surface contact with the surface of a hardened layer of a resist to cause friction. Can be adopted. FIG. 1 is a schematic perspective view of an apparatus for frictionally bringing a rough substrate into surface contact. That is, the surface friction device 10 fixes the semiconductor wafer 15 on which the resist 18 is formed on the fixed table 11 with the resist 18 facing upward by vacuum suction, and the rotary head 12 above the semiconductor wafer 15 by vacuum suction.
The rough surface 14r of the rough silicon substrate 14 is superimposed on the surface hardened layer 18h of the resist 18 on the semiconductor wafer 15, and is rotated and rubbed under pressure. In this case, the number of rotations and pressurizing conditions of the rotary head 12 may be conditions similar to ordinary polishing, grinding, or chemical mechanical polishing, but are not limited thereto. Any condition may be used as long as the surface hardened layer is partially broken and small holes are formed. Of course, the fixing method may be any method other than vacuum suction.

In this case, the rough silicon substrate 14 has a maximum height R according to JIS B0601 of the rough surface 14r.
_It is most preferable that the surface roughness indicated by _max be in the range of not less than the thickness of the hardened layer 18h and not more than (thickness of the hardened layer 18h + 200 nm).
As described above, the thickness of the surface hardened layer 18h differs depending on the magnitude of the energy of the implanted ions.
By using the rough silicon substrate 14 having the rough surface 14r whose _max is within the above range, the hardened surface layer 18h of the resist 18 is partially destroyed, and the small holes 19 are surely formed. The energy of the implanted ions and the surface hardened layer 18h
Has an almost unambiguous relationship with the thickness of, for example, in the case of arsenic ions (As ⁺¹ ), the thickness is about 170 nm at an energy of 100 keV and about 750 nm at an energy of 500 keV. Of course, this relationship differs depending on the type of the resist. Therefore, if the relationship between the type and energy of the implanted ions and the thickness of the surface hardened layer is determined in advance for each type of resist, as long as the type and the energy of the implanted ions are known, the resist 18 is formed on the resist 18. It is not necessary to actually measure the thickness of the surface hardened layer 18h.

FIGS. 2 and 3 conceptually show a process in which a resist formed on a semiconductor wafer is partially destroyed to form small holes in a hardened surface layer, and then the resist is ashed and removed by an oxygen gas plasma. It is a partial sectional view. That is, FIG. 2A shows a resist 18 made of an organic polymer as a mask having a thickness of about 1 μm on a semiconductor wafer 15 having a silicon substrate 16 on which silicon oxide (SiO ₂ ) 17 as an etched portion is formed. (As ⁺¹ ) ions accelerated to an energy of 60 keV are implanted at an implantation angle of 7 degrees and a dose of 1 × 10 ^{16 with} respect to the formed one.
FIG. 4 is a view showing a state after the implantation at / cm ² , in which a surface hardened layer 18h is formed on the surface of the resist 18 to a thickness of about 110 nm. In FIG. 2, the dimensions of each part are not shown in a proportional relationship.

The surface hardened layer 18h of the resist 18 on the semiconductor wafer 15 shown in FIG.
Partially destroyed by 0. That is, the surface friction device 10
The semiconductor wafer 15 is fixed to the fixing table 11 by vacuum suction so that the surface hardened layer 18h of the resist 18 is on the upper side, and the upper height R
A rough silicon substrate 14 having a rough surface 14r having a surface roughness represented by _max of 250 nm is attached by vacuum suction so that the rough surface 14r faces downward, and as shown in FIG. The rough surface 14r of the rough silicon substrate 14 was superimposed on the surface of the layer 18h and rotated, and the surfaces were rubbed. FIG. 2C shows a state in which the surface hardened layer 18h is partially destroyed as a result, and a small hole 19 is formed on the entire surface. The semiconductor wafer 15 shown in FIG. 2C is then subjected to ashing with oxygen gas plasma in a second step.

FIG. 4 is a longitudinal sectional view of a typical example of an apparatus for performing ashing. Ashing device 40 is vacuum tank 4
1. A vacuum pump 42 for evacuating the vacuum chamber 41 and a flow control valve 43 for introducing oxygen gas are provided. In the vacuum chamber 41, a cathode electrode 45 and an anode electrode 46 are arranged in parallel, and a high frequency (RF) power supply 44 is connected to the cathode electrode 45 via a capacitor 47, and the anode electrode 46 is grounded. . On the anode electrode 46, the semiconductor wafer 15 in which the surface hardened layer of the resist is partially destroyed is placed with the surface hardened layer facing upward, and a heater for heating the semiconductor wafer 15 is provided immediately below the anode electrode 46. 48 are installed.

In removing the resist, the vacuum chamber 41 is evacuated by a vacuum pump 42, oxygen gas is introduced from a flow control valve 43 to maintain a predetermined degree of vacuum, and the semiconductor wafer 15 is heated by a heater 48 to 150
Keep at a temperature of at least ℃. When a high frequency is applied to the cathode electrode 45 by the high frequency power supply 44, a discharge is generated between the cathode electrode 45 and the anode electrode 46, and oxygen gas is turned into plasma to form a plasma region 49, thereby generating highly active O radicals and O ₂ radicals. Therefore, the resist 18 in which the small holes 19 are formed in the surface hardened layer 18h is oxidized to CO,
It becomes CO ₂ gas and is exhausted and removed by the vacuum pump 42.

Using the ashing device 40 described above, oxygen gas flow rate: 12000 sccm (cm ³ number per minute in standard condition), pressure: 4000 Pa, RF power: 70
Ashing was performed under the conditions of 0 W and the temperature of the semiconductor wafer 15; When the surface hardened layer of the resist is not partially destroyed as in the prior art, popping occurs when ashing is performed at a temperature of 250 ° C. However, as in the present embodiment, small holes 19 are formed in the surface hardened layer 18h of the resist 18. As shown in FIG. 3A, the semiconductor wafer 15 was ashed without popping, leaving only the fragments of the surface hardened layer 18h on the semiconductor wafer 15.
The semiconductor wafer 15 after ashing shown in FIG. 3A is washed with a sulfuric acid / hydrogen peroxide solution using a spin cleaning device, whereby the resist 18 is completely removed from the semiconductor wafer 15 as shown in FIG. 3B. Was.

(Example 2) As another method of partially breaking the hardened surface layer physically, there is a method of applying a chemical mechanical polishing method, that is, a CMP (Chemical Mechanical Polishing) method. FIG. 5 is a schematic perspective view of the CMP apparatus 20. A CMP apparatus generally used for flattening the surface of a semiconductor wafer is used, and a known polishing technique can be applied as it is. In FIG. 5, the semiconductor wafer 15 shown in FIG.
Is fixed by vacuum suction so that the resist 18 faces downward. And the polishing pad 2 on the rotatable surface plate 21
The polishing slurry is supplied from the slurry tank 23 to the nozzle 2
4, the surface hardened layer 18 h of the resist 18 of the semiconductor wafer 15 fixed to the pressing head 27 is brought into contact with the polishing pad 22 and pressed at a predetermined pressure. The polishing slurry used was a suspension of colloidal silica (SiO ₂ ) in an alkaline aqueous solution of potassium hydroxide (KOH). It is known that colloidal silica has thixotropic properties in which spherical independent fine particles having a particle diameter of about 5 nm aggregate to a diameter of about 20 to 200 nm depending on the pH of an aqueous solution, and the aggregation is separated by an external force. .

In the CMP apparatus 20 shown in FIG. 5, artificial leather is used for the polishing pad 22 at a rotation speed of 60 rpm, and the polishing slurry is a colloidal particle having a particle diameter of 100 to 200 nm in an aqueous solution of potassium hydroxide at pH 11. By using a translucent and milky white material in which silica is suspended at a concentration of 30% and applying a pressure of 50 kg / mm ² to the pressure head 27, the surface hardened layer 18h of the resist 18 is polished to obtain a structure shown in FIG. C, the surface hardened layer 1 of the resist 18
A small hole 19 was formed on the entire surface of 8h. In this case, as the end point of the polishing process, the exposure of the resist 18 due to the polishing of the surface hardened layer 18h can be regarded as a change in the absorption spectrum of the reflected infrared rays. Once the relationship between the polishing time and the change in the absorption spectrum of the reflected infrared ray is measured once, the end point can be determined thereafter based on the polishing time. Subsequently, using the ashing apparatus 40 shown in FIG. 4, ashing with oxygen gas plasma is performed in exactly the same manner as in the first embodiment, and the semiconductor wafer 15 from which the resist 18 is completely removed is obtained by washing. Was.

(Embodiment 3) Furthermore, the resist can be partially destroyed by grinding using a grindstone to form small holes in the hardened surface layer. FIG. 6 is a schematic perspective view of the grinding apparatus 30. A commonly used grinding apparatus is used, and a known grinding technique can be applied as it is.
In FIG. 6, the semiconductor wafer 15 having the resist 18 formed on the turntable 31 is fixed by vacuum suction with the resist 18 facing up. Above, the particle size is 300
Diamond, cubic boron nitride (cBN), or seria (Ce) as small as 0 mesh pass
Disk-shaped whetstone 3 obtained by hardening O2) abrasive grains with thermosetting resin
2 and attached to the lower end of a rotating shaft 33 that rotates in the opposite direction to the rotating table 31 so that the surface of the grindstone 32 is
The surface is ground by bringing the entire surface into contact with the surface hardened layer 18h.

Semiconductor wafer 1 with resist 18 facing up
5 is vacuum-adsorbed, and the rotation table 31 is rotated 60 rpm
m. A disk-shaped grindstone 32 in which ceria is hardened with a phenol resin as abrasive grains is rotated in the reverse direction at a rotational speed of 320 r.
pm, and the surface of the grindstone 32 was brought into contact with the surface hardened layer 18h of the resist 18 of the semiconductor wafer 15 on the turntable 31 while being supplied with the water-soluble grinding liquid, and moved in the direction indicated by the arrow m. That is, the surface hardened layer 18h of the resist 18 is ground and partially destroyed, and the small holes 19h are formed on the entire surface of the surface hardened layer 18h of the resist 18 as in FIG.
Was formed. Also in the case of this grinding, the end point of the processing is determined from the change in the absorption spectrum of the reflected infrared rays on the surface of the resist 18 as in the case of the second embodiment. Thereafter, using the ashing apparatus 40 shown in FIG. 4, ashing with oxygen gas plasma is performed in the same manner as in the first embodiment, and then the semiconductor wafer 15 from which the resist 18 is completely removed is washed. I got

The resist removing method according to the embodiment of the present invention is structured and operates as described above, but of course, the present invention is not limited to these, and various modifications are possible based on the technical idea of the present invention. It is.

For example, in this embodiment, the surface friction method, the CMP method, and the surface grinding method using a grindstone are exemplified in Examples 1 to 3 as a method of partially destroying the resist on the semiconductor wafer, but the semiconductor wafer is not damaged. As long as possible, any method other than these methods may be adopted, for example, an intermediate method between the CMP method and the surface grinding method, but the semiconductor wafer is placed on the turntable 13 in FIG. 15 is directly fixed, and the resist 18
A method of supplying a polishing slurry to the surface hardened layer 18h of the above and polishing with a rotating disk-shaped grindstone 32 can also be adopted.

In Example 1 of the present embodiment,
Semiconductor wafer 15 vacuum-adsorbed to fixed table 11
The surface hardened layer 18h of the resist 18 was brought into surface contact with the rough surface 14r of the rough silicon substrate 14 which was vacuum-sucked to the rotating head 12 to partially break the surface hardened layer 18h. Alternatively, the table 11 may be rotated, or the table 11 and the head 12 may be rotated in opposite directions.

In Example 2 of the present embodiment,
A slurry obtained by suspending colloidal dal silica (SiO ₂ ) in an alkaline aqueous solution was used for the polishing slurry used in the CMP method. However, instead of other polishing slurries such as colloidal dal silica, ceria and zirconia ( ZrO
₂ ), suspended abrasive slurries such as alumina (Al ₂ O ₃ ) can also be used.

In Example 3 of the present embodiment,
Resist 1 of semiconductor wafer 15 on turntable 31
Although the surface grinding is performed such that the surface of the rotating grindstone 32 is entirely in contact with the surface of the grinding wheel 8, the grinding may be performed such that the surface of the grinding stone 32 is slightly inclined to partially contact the surface of the resist 18. In addition, although the one obtained by solidifying abrasive grains with a thermosetting resin as a grindstone was used, a wheel-shaped grindstone in which the abrasive grains were bonded to a base metal by vitrified bond, metal bond, resin bond, or nickel electroforming may also be used. .

In this embodiment, oxygen gas plasma is used for ashing. However, an inert gas such as helium (He) may be mixed with the oxygen gas to improve the ashing rate or to reduce alkali ion. A small amount of carbon tetrafluoride (CF ₄ ) may be added for fixing.

[0032]

The present invention is embodied in the form described above, and has the following effects.

According to the resist removing method of the present invention, since the surface hardened layer of the resist which is difficult to remove is partially partially destroyed in advance to form small holes, it is possible to perform ashing with oxygen gas plasma at a high temperature. The resist can be efficiently removed without popping. According to the resist removing method of the present invention, since the substrate having the rough surface is brought into surface contact with the surface of the hardened surface layer of the resist and rotated, the hardened surface layer can be partially destroyed by a relatively simple device. According to the resist removing method of the third aspect, since the rough surface of the substrate having a predetermined surface roughness is brought into surface contact with the surface of the surface hardened layer of the resist and rotated, only the hardened surface layer is partially broken. Can be.

According to the resist removing method of the present invention, since the surface hardened layer of the resist is polished by the chemical mechanical polishing method, a known technique is applied to the formulation of the polishing slurry and the detection of the end point of the polishing process. Thus, only the surface hardened layer can be surely partially broken. According to the resist removing method of the fifth aspect, since the surface hardened layer of the resist is ground by the grindstone, the type, the grain size of the abrasive grains used for the grindstone,
A known technique is applied to the detection of the degree of concentration, the type of the binder, the end point of the grinding, and the like, so that only the surface hardened layer can be surely partially destroyed.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view of a surface friction device.

FIG. 2 is a partial cross-sectional view showing a process of removing a resist having a surface hardened layer, where A is a resist before the surface hardened layer is partially destroyed, and B is a substrate having a rough surface in surface contact with the resist. State C shows a state in which the surface hardened layer was partially broken and small holes were formed.

FIG. 3 is a partial cross-sectional view showing a process of resist ashing, wherein A shows a state where ashing has been completed, and B shows a state where cleaning has been subsequently performed and the resist has been completely removed from the semiconductor wafer.

FIG. 4 is a schematic longitudinal sectional view of the ashing device.

FIG. 5 is a schematic perspective view of a chemical mechanical polishing apparatus.

FIG. 6 is a schematic perspective view of a grinding device.

[Explanation of symbols]

10: Surface friction device, 14: Rough silicon substrate, 14
r: rough surface, 15: semiconductor wafer, 16: silicon substrate, 17: silicon oxide, 18: resist, 1
8h: Surface hardened layer, 19: Small hole, 20: CMP device, 30: Grinding device, 40: Ashing device.

Claims (5)

[Claims] 1. A resist removing method for ashing a resist formed on a semiconductor wafer and having a surface hardened layer by plasma of oxygen gas, wherein a small hole is formed by physically partially destroying the surface hardened layer in a first step. Performing the ashing in a second step. 2. The method according to claim 1, wherein the partial hardening of the hardened surface layer is performed by causing a substrate having a rough surface to rub against the hardened surface layer. 3. A maximum height R of the rough surface as the substrate.
The resist removal method according to claim 2, wherein the surface roughness indicated by _max is in the range of not less than the thickness of the hardened layer and not more than (thickness of the hardened layer + 200 nm). . 4. The resist removing method according to claim 1, wherein physical partial destruction of the hardened surface layer is performed by polishing by a chemical mechanical polishing method. 5. The method according to claim 1, wherein the partial hardening of the hardened surface layer is performed by grinding with a grindstone.