JP2000323371A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a minute pattern simply with precision by, at patterning of a photo-sensitized resist film, allowing a reflection-preventive film for irradiation light to comprise an interference layer laminated on a reflective layer, and patterning the photo-sensitized resist film formed on the reflection-preventive film. SOLUTION: A wiring layer 2 is formed on the surface of a silicon substrate 1 through an insulating film. Over, the entire surface, an inter-layer insulating film 3 of a silicon oxide film is formed. A light-reflective layer 4 of an amorphous silicon thin-film is formed on the surface of the interlayer insulating film 3. A light interference layer 5 is laminated on the reflective layer 4 to provide a reflection-preventive film 6. A resist film 7 is formed on the reflection- preventive film 6 by a rotative coating and baking, etc. A pattern for a contact hole is transferred to the resist film 7 to form a resist opening 8. Thus, on the silicon substrate 1, the resist opening 8 of the same size is formed regardless of the location of wiring layer 2 on the substrate 1. So, a reflection-preventing function is provided even on a transparent interlayer insulating film for sensitizing radiation light.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a fine pattern on a semiconductor device.

[0002]

2. Description of the Related Art The miniaturization and the densification of semiconductor devices are still being energetically advanced.
Ultra-highly integrated semiconductor devices such as memory devices or logic devices designed on the basis of dimensions of about m have been developed and prototyped. As the semiconductor device becomes more highly integrated, the dimensions of the semiconductor device become smaller.
It is particularly important to reduce the dimensions of the gate electrode, the wiring, and the contact hole (including the through hole) and the thickness of the material forming the semiconductor element.

In the miniaturization of the above-mentioned semiconductor device, a technique of transferring a fine pattern to a photosensitive resist film by a photolithography technique is most important. At present, a reduced projection exposure method is used in the above-described pattern transfer, and the irradiation light for exposure used in this case is shortened in accordance with the reduction in the pattern size. Excimer laser light (wavelength: about 248 nm) from KrF has been put to practical use, and practical use of excimer laser light (wavelength: about 193 nm) from ArF has been studied.

However, the amount of reflected light generated from the surface of the constituent material of the semiconductor element under the photosensitive resist film at the time of the above-described reduced projection exposure increases as the wavelength becomes shorter. The so-called halation makes it impossible to transfer a fine pattern.

For this reason, an antireflection film for reducing the amount of reflected light as described above is essential. Currently, two types of antireflection films are used. Part 1
One method is to absorb incident light at the time of exposure so as not to reach the constituent material surface of the semiconductor element. A typical example is an organic film ARC (Anti-Re).
There is a light absorption film called "fraction coating".

Another type of film is a film that reduces the amount of reflection from the surface of a constituent material of a semiconductor device by causing incident light of exposure light for exposure to interfere with each other at the time of exposure (hereinafter referred to as an interference film). For the interference film in this case, a material through which irradiation light for photosensitivity is transmitted is used. For example, such an interference film includes an organic SOG described in JP-A-9-69479.
(Spin-on-glass), SiO ₂ or silicon nitride film.

[0007] The control of the dimensions of the component patterns of the semiconductor element, which are miniaturized by taking into account the dry etching technique in addition to the photolithography technique described above, and in particular, the dimension of the contact hole, is particularly important for the high integration of semiconductor devices. It becomes very difficult. This is because, with the increase in the number of wirings in a semiconductor device, the surface of an interlayer insulating film is flattened by a chemical mechanical polishing (CMP) technique or the like, and the depth of a contact hole to be provided is extremely large at a position in a semiconductor chip. Because it will be different.

Next, a case where a contact hole is formed by using a light absorbing film by a photolithography technique will be described with reference to FIG. 5 (hereinafter referred to as a first conventional example). FIG.
3 is a partial cross-sectional view of the semiconductor device.

As shown in FIG. 5, an element isolation insulating film 102 is selectively formed on the surface of a silicon substrate 101. Then, a diffusion layer 103 which is a source region or a drain region of the MOS transistor is formed. Further, the gate electrode 10 is formed on the silicon substrate 101 via the gate insulating film.
4. The first wiring layer 105 is formed on the element isolation insulating film 102.

Further, a first interlayer insulating film 106 is formed on the entire surface by forming a silicon oxide film by a chemical vapor deposition (CVD) method and flattening the silicon oxide film by a CMP method. Then, a second wiring layer 107 is formed, and a second interlayer insulating film 108 is formed in the same manner as in the method of forming the first interlayer insulating film.

[0011] Then, a light absorbing film 109 is formed on the surface of the second interlayer insulating film 108. Here, the light absorption film 109 is an organic film having a thickness of about 200 nm. This light absorbing film 10
9, a resist film 110 is formed. Here, the light absorption film 109 and the resist film 110 are formed through known processes such as spin coating and baking.

The pattern transfer for the contact hole is performed on the resist film 110 by the method described above, and the resist opening 1 is formed.
11 is formed. Then, such a resist film 11
The light absorption film 109 is opened by dry etching using 0 as an etching mask, and the first interlayer insulating film and the second
A contact hole 112 is formed in the interlayer insulating film.

Next, a case where an interference film is used in the photolithography technique will be described with reference to FIG.
This is referred to as a second conventional example). FIG. 6 is a partial cross-sectional view of the semiconductor device as in FIG. Here, the same components as those in FIG. 5 are denoted by the same reference numerals.

As shown in FIG. 6, an element isolation insulating film 102 and a diffusion layer 103 are formed on a surface of a silicon substrate 101. Then, the gate electrode 104 and the first wiring layer 105 are formed, and the first interlayer insulating film 106 is formed. further,
A second wiring layer 107 and a second interlayer insulating film 108 are formed.

[0015] Then, an interference film 113 is formed on the surface of the second interlayer insulating film 108. Here, the interference film 113 is a silicon nitride film having a thickness of about 40 nm. This interference film 11
A resist film 110 is formed on 3. Here, the interference film 113 is formed by a CVD method.

The pattern transfer for the contact hole is performed on the resist film 110 by the method described above. By this pattern transfer, resist openings 111a, 111b, 111c are formed. Then, although not shown, a contact hole is formed in a dry etching process.

[0017]

The above-mentioned conventional techniques have the following problems, respectively. That is, in the first conventional example, the dimension of the completed contact hole 112 is larger than the dimension of the resist opening 111, as shown in FIG. For example, when the size of the resist opening 111 is about 0.13 μm, the contact hole 1
The size of 12 is about 0.2 μm.

In a dry etching step using the resist film 111 as an etching mask, a normal AR
Since the resist film 110 is also etched when the light absorbing film 109 of C is dry-etched, the size of the resist opening 111 becomes large when the ARC film thickness is large.
Then, the size of the completed contact hole 112 becomes large even by dry etching of the lower second and first interlayer insulating films.

Such an increase in the side etching of the light absorbing film is reduced by reducing the thickness of the light absorbing film. Here, in order to reduce the thickness of the light absorbing film, it is necessary to increase the k value of the complex refractive index (n + ik) of the light absorbing film.
However, an increase in the k value causes an increase in the amount of reflection of the irradiation light for exposure, and the halation makes it difficult to transfer a fine pattern.

In the second conventional example, as shown in FIG. 6, the size of the resist opening formed in the resist film 110 varies depending on the region where the contact hole is formed. That is, as shown in FIG. 6, when a resist opening 111a having a predetermined size is formed on the first wiring layer 105, the diffusion layer 10
3, a resist opening 111b having a size larger than that of the resist opening 111a is formed. On the other hand, a resist opening 111c having a smaller size than the resist opening 111a is formed on the second wiring layer 107.

In this case, the photosensitive irradiation light is reflected on the surface of the first wiring layer 105, the surface of the diffusion layer 103, and the surface of the second wiring layer 107, respectively. Then, they mutually interfere with the incident light of the photosensitive irradiation light.

In this case, the intensity of the irradiation light for exposure after the mutual interference varies depending on the thickness of the first or second interlayer insulating film below the resist film. Then, as shown in FIG. 7, the dimension of the completed resist opening periodically changes with the thickness of the interlayer insulating film. In this manner, resist openings having different dimensions are formed. When dry etching of the interlayer insulating film is performed using such a resist film as an etching mask,
Contact holes having different dimensions are formed depending on locations.

An object of the present invention is to provide a method for forming a fine pattern such as a contact hole in a method for forming a fine pattern of a semiconductor device, which solves the above-mentioned problems and can easily and precisely form a fine pattern such as a contact hole. It is in.

[0024]

For this purpose, a method of manufacturing a semiconductor device according to the present invention comprises a step of forming an insulating film on a semiconductor substrate and a step of forming a photosensitive resist film by using a photolithography step for patterning a photosensitive resist film. Forming an antireflection film on the insulating film by forming a reflection layer and an interference layer laminated on the reflection layer, and forming the photosensitive resist film on the antireflection film and patterning it into a predetermined shape And a step of performing.

Here, the intensity of the reflected light of the photosensitive irradiation light from the surface of the reflective layer is the same as the intensity of the reflected light of the photosensitive irradiation light from the surface of the interference layer. The phases of the reflected light from the surface and the reflected light from the interference layer surface are shifted by a half wavelength of the irradiation light for photosensitive.

The insulating film is an interlayer insulating film of a semiconductor device and forms a pattern for a contact hole in the photosensitive resist film.

Further, a method of manufacturing a semiconductor device according to the present invention
Forming the reflective layer with a conductor, dry-etching the antireflection film and the insulating film using the patterned photosensitive resist film as a mask to form contact holes in the insulating film, A step of removing the film and the interference layer; and a step of patterning the reflective layer to be a part of a wiring layer.

The reflection layer is made of a silicon thin film or a titanium nitride thin film, and the interference layer is made of a silicon oxide film, a silicon nitride film or a silicon oxynitride film.

In the present invention, the antireflection film is composed of a laminated reflective layer and an interference layer. Then, in the exposure process of the photolithography technique, the irradiation light for exposure is reflected on the surface of the reflective layer, and interferes with the light reflected on the surface of the interference layer to disappear. Such a laminated film structure effectively functions as an antireflection film even on an interlayer insulating film which is transparent to irradiation light for exposure. Then, fine contact holes can be formed with high precision in the interlayer insulating film of the semiconductor device.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the drawings. FIG. 1 to FIG. 3 are diagrams for explaining a first embodiment of the present invention. Here, FIG. 1 is a cross-sectional view of the semiconductor device in a contact hole forming region. FIGS. 2 and 3 are graphs showing the reflectance of photosensitive irradiation light during photolithography exposure.

As shown in FIG. 1, a wiring layer 2 is formed on the surface of a silicon substrate 1 via an insulating film, and an interlayer insulating film 3 is formed on the entire surface with a silicon oxide film. Here, the surface of the interlayer insulating film 3 is planarized by a CMP method or the like.

Next, a light reflection layer 4 is formed on the surface of the interlayer insulating film 3. The reflection layer 4 is an amorphous silicon thin film having a thickness of about 20 nm. Here, the silicon thin film as the reflection layer 4 may contain impurities such as phosphorus or arsenic.

Then, a light interference layer 5 is formed so as to be laminated on the reflection layer 4. Here, the interference layer 5 is an ARC having a thickness of 30 nm. Thus, according to the present invention, the antireflection film 6 is formed by the reflective layer 4 and the interference layer 5 to be laminated.

Then, a resist film 7 is formed on the antireflection film 6. Here, the resist film 7 is formed through known processes such as spin coating and baking. The pattern transfer for the contact hole is performed on the resist film 7 by the method described above, and the resist opening 8 is formed.

According to such a method, the silicon substrate 1
The resist opening 8 having the same size is formed regardless of the upper and the wiring layers 2. The reason for this will be described with reference to FIGS. 2 and 3 are simulation results showing the relationship between the reflectance of photosensitive irradiation light and the silicon oxide film as an interlayer insulating film when the antireflection film of the present invention is used. Here, the thickness of the reflection layer (silicon thin film) of the antireflection film is shown as a parameter.

The above simulation is performed according to the structure shown in FIG. That is, as shown in the schematic diagram of FIG. 2, a silicon oxide film is formed on a silicon substrate, and a reflective layer (silicon thin film) and an interference layer (ARC having a thickness of 30 nm) are formed on the silicon oxide film. It is formed by lamination. Then, a resist film is formed, and exposure is performed using ArF excimer laser light (wavelength: 193 nm).

As shown in FIG. 2, the thickness of the reflective layer is 5
In the case of nm, the reflectance of the photosensitive irradiation light at the time of exposure varies periodically according to the thickness of the silicon oxide film. When the thickness of the reflection layer is increased, for example, the thickness is 20 n
When it is about m, the reflectance becomes almost zero irrespective of the thickness of the silicon oxide film. Therefore, as described with reference to FIG. 1, the dimension of the resist opening becomes constant without depending on the thickness of the interlayer insulating film below the antireflection film. Then, through the dry etching process, a contact hole having a constant opening size can be formed without depending on the depth of the contact hole.

Here, the intensity of the reflected light from the reflection layer surface of the photosensitive irradiation light is the same as the intensity of the reflected light from the interference layer surface, and the phase of the reflected light is the same as that of the photosensitive irradiation light. It is very effective if the wavelength is shifted by half a wavelength. In this case, the irradiation light for exposure is reflected on the surface of the reflection layer and interferes with the light reflected on the surface of the interference layer to disappear.

On the other hand, as shown in FIG. 3, in the case where the above structure has no reflective layer, that is, in the case corresponding to the second conventional example, the reflectance of the photosensitive irradiation light depends on the thickness of the silicon oxide film. As a result, it fluctuates periodically. For this reason, through the dry etching process, contact holes having different opening sizes depending on the depth of the contact holes are formed.

Next, a second embodiment of the present invention will be described with reference to FIG. Here, FIG. 4 is a partial cross-sectional view of a semiconductor device similar to that described in the related art.

As shown in FIG. 4, an element isolation insulating film 12 is selectively formed on the surface of a silicon substrate 11 having a p-type conductivity. Then, a diffusion layer 13 which is a source region or a drain region of the MOS transistor and has an n-type conductivity is formed. Further, the silicon substrate 11 is interposed via a gate insulating film.
A gate electrode 14 is formed thereon, and a first wiring layer 15 is formed on the element isolation insulating film 12. Here, the gate electrode 14 and the first wiring layer 15 are made of tungsten polycide.

Further, as described in the first conventional example,
A first interlayer insulating film 16 having a flattened surface is formed, and a second wiring layer 17 is formed. Here, the second wiring layer 17 is made of aluminum metal. Then, the second interlayer insulating film 18 is formed in the same manner as in the method of forming the first interlayer insulating film.

Then, an antireflection film 6 is formed on the surface of the second interlayer insulating film 18 by the reflection layer 4 and the interference layer 5 of the present invention.
Here, the reflection layer 4 is formed of a titanium nitride film having a thickness of about 10 nm, and the interference layer 5 is formed of a silicon nitride film having a thickness of 25 nm.

Next, a resist film 7 is formed on the antireflection film 6. Then, pattern transfer for contact holes is performed on the resist film 7 by the method described above, and a resist opening 8 is formed. By the dry etching using such a resist film 7 as an etching mask, the antireflection film 6 is opened, and further, a contact hole 19 is formed in the first interlayer insulating film and the second interlayer insulating film.

Thus, the contact hole can be formed by one photolithography step and one dry etching step.

Next, although not shown, the resist film 7 is removed by a known ashing method, and the interference layer 5 is also removed. Then, a metal film such as tungsten is deposited on the reflective layer 4 so as to be buried in the contact hole 19. Further, the metal film and the reflective layer are patterned to form an upper wiring layer.

In the above dry etching step, the antireflection film 6 is opened by dry etching using the resist film 7 as an etching mask, and then the resist film 7 is removed by ashing. Then, using the antireflection film 6 as an etching mask, the second interlayer insulating film 18 and the first interlayer insulating film 16 may be dry-etched to form the contact holes 19.

In this case, it is effective when the second interlayer insulating film 18 is formed of an organic insulating film which is weak in the ashing process and has a small relative dielectric constant.

In the above embodiment, the case where the present invention is applied to formation of a contact hole or a through hole has been described. The present invention is not limited to this,
It should be noted that the present invention can be similarly applied to the formation of other components of a semiconductor element, for example, a wiring layer using a hard mask.

When the irradiation light for photosensitization is a KrF excimer laser beam,
Poly-Si, WSi, W, an Al-based alloy, Cu, and Ti can be used. When the irradiation light for exposure is an excimer laser light of ArF, Poly-Si, WSi, Al
Based alloys can be used.

As the interference layer, other materials such as SiON
It should be noted that a film and an amorphous carbon film can be used.

The present invention can be similarly applied even when the irradiation light for exposure is an excimer laser beam of F ₂ .

[0053]

As described above, in the method of manufacturing a semiconductor device according to the present invention, the step of forming an insulating film on a semiconductor substrate and the step of forming an anti-reflection film for photo-irradiation light used in the exposure step of photolithography technology. Forming a reflective layer and an interference layer laminated on the reflective layer to form on the insulating film,
Forming a photosensitive resist film on such an antireflection film and patterning it into a predetermined shape. Then, the irradiation light for exposure is reflected on the surface of the reflection layer and interferes with the light reflected on the surface of the interference layer to disappear.

The method of manufacturing a semiconductor device according to the present invention
Forming the reflective layer with a conductor, forming a contact hole in the insulating film by dry etching the antireflection film and the insulating film using a patterned photosensitive resist film as a mask, and the photosensitive resist film Removing the interference layer and patterning the reflective layer to make it a part of the wiring layer.

For this reason, it is possible to effectively function as an anti-reflection film even on an interlayer insulating film transparent to irradiation light for photosensitivity, and to form fine contact holes in the interlayer insulating film of a semiconductor device with high precision. Become.

Further, it is easy to form a contact hole having a constant opening size without depending on the depth of the contact hole formed in the interlayer insulating film.

As described above, the present invention promotes high integration and high speed of a semiconductor device by miniaturization of a semiconductor element.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view of a semiconductor device for describing a first embodiment of the present invention.

FIG. 2 is a graph of a simulation result for describing an effect of the embodiment.

FIG. 3 is a graph of a simulation for explaining the embodiment.

FIG. 4 is a partial cross-sectional view of a semiconductor device for explaining a second embodiment of the present invention;

FIG. 5 is a partial cross-sectional view of a semiconductor device for explaining a first conventional example.

FIG. 6 is a partial cross-sectional view of a semiconductor device for explaining a second conventional example.

FIG. 7 is a graph for explaining a change in resist opening size in the second conventional example.

[Explanation of symbols]

1, 11, 101 Silicon substrate 2 Wiring layer 3 Interlayer insulating film 4 Reflecting layer 5 Interference layer 6 Antireflection film 7, 110 Resist film 8, 111, 111a, 111b, 111c Resist opening 12, 102 Element isolation insulating film 13, 103 Diffusion layer 14, 104 Gate electrode 15, 105 First wiring layer 16, 106 First interlayer insulating film 17, 107 Second wiring layer 18, 108 Second interlayer insulating film 19, 112 Contact hole 109 Light absorbing film 113 Interference film

Claims (6)

[Claims] An interference layer for laminating an antireflection film for irradiating light for exposure used in a step of forming an insulating film on a semiconductor substrate and a photolithography step of patterning a photosensitive resist film on the reflection layer and the reflection layer And a step of forming the photosensitive resist film on the antireflection film and patterning the photosensitive resist film into a predetermined shape. 2. The intensity of light reflected from the reflective layer surface of the photosensitive irradiation light is the same as the intensity of light reflected from the interference layer surface of the photosensitive irradiation light, and the surface of the reflective layer is exposed. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the phase of the reflected light from the light and the phase of the reflected light from the surface of the interference layer are shifted by a half wavelength of the irradiation light for photosensitive. 3. The method of manufacturing a semiconductor device according to claim 1, wherein said insulating film is an interlayer insulating film of a semiconductor device, and a pattern for a contact hole is formed in said photosensitive resist film. . 4. The reflective layer is made of a conductor,
Forming a contact hole in the insulating film by dry-etching the anti-reflection film and the insulating film using the patterned photosensitive resist film as a mask, and removing the photosensitive resist film and the interference layer; 4. The method of manufacturing a semiconductor device according to claim 3, further comprising: patterning the reflection layer to be a part of a wiring layer. 5. The method of manufacturing a semiconductor device according to claim 1, wherein said reflection layer is made of a silicon thin film or a titanium nitride thin film. 6. The semiconductor device according to claim 1, wherein the interference layer is formed of a silicon oxide film, a silicon nitride film or a silicon oxynitride film. Production method.