JP2000321552A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate degradation in display quality at the central part of a screen, caused by the crosstalk between a scanning pulse and a signal line pulse in a scanning line of the succeeding stage in bi-sected driving, etc. SOLUTION: In this simple matrix type liquid crystal display device wherein a screen is bi-sected and simultaneously driven for every 300 scanning lines 6 and also one screen of the bi-sected screens is constituted of 300 pieces of scanning lines 6 and 2400 pieces of signal lines 7, a control circuit 20 is provided for controlling so that a scanning duty is defined as 1/(301), the same display data as that for the 300th scanning period is inputted to the signal line for the 301st scanning period and the scanning pulse is not applied thereto.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device of a simple matrix type which performs, for example, two-division simultaneous driving, in which a scanning pulse and display data of a next scanning line are provided at a boundary between an upper screen and a lower screen. To prevent the display quality from deteriorating at the center of the screen due to interference.

[0002]

2. Description of the Related Art A conventional simple matrix type liquid crystal display (LCD) is generally driven by the following method. For example, a first transparent substrate made of glass or the like provided with 2N scanning lines,
In an LCD in which a second transparent substrate made of glass or the like provided with M signal lines is joined via a liquid crystal layer in a state where the scanning lines and the signal lines are opposed and orthogonal to each other, the screen is vertically shifted by two.
By dividing the divided screens and drawing the divided screens in parallel, the scanning duty is reduced by two-division simultaneous driving, so-called dual scanning (hereinafter referred to as two-division driving).
To improve the image quality.

FIG. 4 is a block circuit diagram of an LCD for two-part drive. In the figure, 1 is an LCD panel, 1
Reference numeral 0 denotes a pixel at the intersection of the signal line 11 and the scanning line 12 orthogonal to each other. The signal line 11 and the scanning line 12 become an electrically resistive load, and the pixel 10 becomes a capacitive load. 13a is a signal line driving circuit for the upper screen (hereinafter, referred to as an upper signal driver),
13b is a lower screen signal line drive circuit (hereinafter, referred to as a lower signal driver), 14a is an upper screen scan line drive circuit (hereinafter, an upper scan driver), and 14b is a lower screen scan line drive circuit (hereinafter, referred to as a lower screen driver). Hereinafter, referred to as a lower scanning driver).

A control circuit 15 is a frame signal (FRAM) for defining a drawing start timing for one screen.
Signal), a LOAD signal as a scan clock signal that defines the input timing of each scan pulse, and a dot clock signal that defines the timing at which a display signal (display data) is taken into the upper signal driver 13a and the lower signal driver 13b. Various control signals for timing and display data are supplied to each driver. The upper signal driver 13a and the lower signal driver 13b are connected to the control circuit 15
The display data transmitted from the device is received by a dot clock signal, the driving of the signal line 11 is started by the LOAD signal, and the signal line 11 is driven according to the display data.

[0005] The upper scanning driver 14a and the lower scanning driver 14b sequentially scan the scanning lines 12 from above at the timing specified by the LOAD signal. At this time, when the upper scanning driver 14a is scanning the first line,
The lower scanning driver 14b scans the (N + 1) th line.
That is, the first line and the (N + 1) th line, and the second line and the Nth line
The two scanning lines 12 are scanned at the same timing as in the +2 line,. A bias circuit 18 supplies a driving bias potential to each driver.

Conventionally, such two-part drive has the following problems. When the screen is divided into two and displayed, the last (N-th) scan line 12 of the upper screen and the head (N
The (+1) th scanning line 12 is located exactly at the center of the screen.
Regarding the display at the center of these screens, the display timing of the last (N-th) scan line 12 and the display timing of the first (first) scan line 12 are adjacent to each other on the upper screen, and the first (N + 1) -th scan line is displayed on the lower screen. 12, the display timing of the last (2Nth) scan line 12 is adjacent to the display timing of the last (2N-th) scan line 12, which is different from the problem between the physically adjacent scan lines 12 on the actual display panel. That is, the image quality at the center of the screen is degraded due to the influence of display data adjacent to the display timing.

Therefore, in order to solve the above problem, in the lower screen, the leading (N + 1) -th scanning line 12 is shifted to the last (2N).
Third) In order to eliminate the influence of the scanning line 12,
The signal of the last (N-th) scanning line 12 on the upper screen is extracted as a correction signal, and the correction signal is supplied to the first (N + 1) -th scanning line 12 immediately before the drawing of the first (N + 1) -th scanning line 12 on the lower screen. However, a method of performing a preliminary drawing operation for 12 scanning lines has been proposed (conventional example 1: JP-A-8-76722).
Reference).

[0008] The first conventional example will be described in detail below. FIG. 5 shows a timing chart of each drive waveform when an LCD having 600 scanning lines is driven in two upper and lower parts. In the figure, FRAM is a signal that defines the scanning start timing for one-screen drawing, and LOAD is a shift clock for sequentially scanning the scanning lines. Top and bottom screen 1
The scan pulse is sequentially output to the scan lines from the first scan period in which the scan pulse is output to the scan line of the line to the last line of the upper and lower screens (the 300th scan period). Then, in the next scanning period (the 301st scanning period in FIG. 5) following the 300th scanning period, the display data output for the first line of the lower screen is the same display data as the last line (300th line) of the upper screen. (Shaded area in the figure). By this, 1 of the lower screen
The line is not affected by the last line of the lower screen. For example, in the case of a display pattern as shown in FIG. 6, a gray line is generated in a portion to be displayed white at the boundary between the upper and lower screens of the liquid crystal panel 1. , Etc., can be eliminated.

[0009]

However, the prior art 1 eliminates the influence of the first scanning line 12 of the lower screen from the last scanning line 12 of the lower screen. No consideration is given to the effect of the top scanning line 12 on the upper screen.

However, in practice, the display data of the next scanning line 12 often affects the scanning pulse of the previous scanning line 12 in the influence between the display data adjacent in the display timing. This is because the scanning pulse of the simple matrix type LCD is dull due to the influence of the pixel capacitance and the wiring resistance as shown in FIG. 7, and overlaps the display data (signal line pulse) of the next scanning line 12 (FIG. 7). Middle shaded area). In particular, the scan pulse on the 300th line is also affected by electromagnetic coupling (crosstalk) due to the switching of display data from on to off, and the dullness of the hatched portion becomes larger as indicated by the arrow in FIG. First, the influence of the display data on the first line becomes stronger.

That is, in the center portion of the liquid crystal panel, the influence of the display data of the first scanning line 12 of the upper screen on the last scanning line 12 of the upper screen is more influenced by the display data of the last scanning line 12 of the lower screen. Is much greater than the effect on the top scanning line 12 of Therefore, image quality is deteriorated at the boundary between the upper and lower screens as shown in FIG. Further, in the above-mentioned conventional example 1, it is necessary to add a memory such as a line buffer in order to input the display data of the upper screen as a correction signal to the lower screen.
This will increase costs.

Accordingly, the present invention has been completed in view of the above circumstances, and an object of the present invention is, for example, in two-division driving, in which a scan pulse becomes dull and a signal line pulse (display data) crosses in a next scan line. The talk eliminates the effect of the display data of the first scanning line on the upper screen on the last scanning line of the upper screen, improves the display quality at the center of the screen, and eliminates the need for an additional line buffer or the like. The cost is to improve the display quality.

[0013]

According to the liquid crystal display device of the present invention, the screen is simultaneously driven by a plurality of scanning lines for each of a plurality of scanning lines, and the number of the divided screen is N (N is an integer of 1 or more). A liquid crystal display device of a simple matrix type comprising a line and M signal lines (M is an integer of 1 or more), wherein the scanning duty is 1 / (N + 1) or less and from the (N + 1) th to the last scanning period. And a control circuit for inputting the display data of the Nth scanning period to the signal line and controlling so as not to apply the scanning pulse.

According to the present invention, the display data of the top scanning line on the upper screen is changed to the last scanning line of the upper screen by the dulling of the scanning pulse and the crosstalk of the signal line pulse (display data) in, for example, two-split driving. The influence on the display can be eliminated, and the display quality at the center of the screen can be improved.

In the present invention, preferably, the control circuit stops a signal for supplying new display data to the shift register of the signal line driving circuit from the Nth time to immediately before the last scanning period.

With this configuration, the signal (dot clock signal) for supplying and latching the display data to the shift register of the signal line driving circuit for each scanning period is only stopped from the Nth to immediately before the last scanning period. Since the display data of the N-th scanning period is continuously input, a line buffer or the like for separately holding the display data of the N-th scanning period is unnecessary, and therefore, the display quality can be improved at low cost. .

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The LCD of the present invention will be described below. FIG. 1 is a block circuit diagram of the LCD of the present invention. In FIG. 1, reference numeral 1 denotes a liquid crystal panel,
The screen of 0 × 2400 signal lines is divided into an upper screen 2 and a lower screen 3, that is, N = 300 and M = 2400,
In this configuration, the upper screen 2 and the lower screen 3 are simultaneously drawn in parallel. 4 is an upper scanning driver, 5 is an upper signal driver, 6
Is a scanning line, 7 is a signal line, 8 is a lower scanning driver, 9 is a lower signal driver, and 20 is a control circuit for transmitting each driving signal and control signal to each driver. The upper screen 2 is image-displayed by the 1st to 300th scanning lines 6 driven by the upper scanning driver 4 and the 2400 signal lines 7 driven by the upper signal driver 5. Also,
The lower screen 3 is driven 30 by the lower scanning driver 8.
An image is displayed by the first to 600th scanning lines 6 and 2400 signal lines 7 driven by the lower signal driver 9.

The LCD of the present invention comprises a first transparent substrate made of glass or the like provided with a plurality of scanning lines 6 and a second transparent substrate provided with a plurality of signal lines 7, Signal line 7
Are of a simple matrix type having a configuration in which they are joined to each other via a liquid crystal layer so as to face each other and cross each other at right angles.

The upper scanning driver 4 and the lower scanning driver 8 receive 1
An FRAM signal, which is a timing for starting screen drawing, a timing for starting scanning of the first and 301st scanning lines, and a LOAD signal, which is a scanning clock signal for sequentially performing scanning, are output. Further, the upper circuit driver 5 and the lower circuit driver 9 transmit the display data signals HD0 to HD7 for the upper screen 2 and the display data signals LD0 to LD7 for the lower screen 3 to the shift register as control signals from the control circuit 20. CP signal which is a dot clock signal to be taken in, display data signals HD0-7 and LD0 latched in the shift register
7 is output to the signal line 7 is transmitted. The LOAD signal is output as a signal common to the upper scanning driver 4 and the lower scanning driver 8, the upper signal driver 5, and the lower signal driver 9.

FIG. 2 is a timing chart of each drive signal and control signal of the LCD of the present invention. In the figure, a period during which a scan pulse (first scan pulse) is output to a first scan line is a first scan period, and a period during which a scan pulse (Nth scan pulse) is output to an Nth scan line. Is expressed as the N-th scanning period.

First, the operation of the upper scanning driver 4 and the lower scanning driver 8 will be described. In FIG.
The AM signal is a signal that defines the start timing of one-screen drawing (one frame) and the scan start timing of the first and 301th scanning lines, and the FRAM signal is H (High).
h) When the pulse of the LOAD signal falls during the period of the level, the first scanning pulse is output and the first scanning period is started.
Subsequently, when the next LOAD signal falls, the first scanning period ends and the second scanning period starts at the same time. The same operation is repeated with respect to the LOAD signal, and the 300th scanning period ends, the pulse of the FRAM signal rises again, the 301st scanning period ends, and the first scanning period starts again. Therefore, the number of scanning pulses for selectively driving each scanning line is 30.
It is output once for each scanning line during one scanning period. That is, each scanning pulse is driven with a 1/301 duty. Then, the upper scanning driver 4 and the lower scanning driver 8 perform the same operation simultaneously and in parallel.

Next, the operation of the upper signal driver 5 and the lower signal driver 9 will be described. In FIG.
Is a dot clock signal, which is display data signals HD0 to HD7 for the upper screen 2 and display data signals LD0 to LD0 for the lower screen 3.
7 functions as a latch pulse for latching in the shift registers in the upper signal driver 5 and the lower signal driver 9. Upper signal driver 5 and lower signal driver 9
, There are first to 300th shift registers, and each shift register stores 8-bit display data (gradation data or the like).

C after the fall of the pulse of the LOAD signal
At the falling edge of P, HD0-7, L
D0-7 are latched, and HD0-7, LD0-7 are latched in the second shift register at the next fall of CP. Thereafter, the above operations are sequentially repeated, and HD0-7 and LD0-7 are latched up to the 300th shift register.
Then, when 2400 data for one scanning line are latched by the upper signal driver 5 and the lower signal driver 9, respectively, the LOAD signal is input again to the upper signal driver 5 and the lower signal driver 9, and During the scanning period of
To 300th shift register to output signal line pulses of voltages corresponding to the respective data. That is, the display data latched in a certain scanning period is input to the signal line in the next scanning period. For example, display data latched in a first scanning period is to be input to a signal line in a second scanning period. And HD0-7, LD0-7 by CP
Is repeated again from the first shift register.

In this embodiment, by stopping the CP in the 300th scanning period, the display data in the 300th scanning period is held in the first to 300th shift registers, and the signal line pulse in the 301st scanning period is changed to the 300th scanning period. It is the same as that of the scanning period. Accordingly, the display data output in the 300th scanning period is held in the 301st scanning period and output again to the signal line (the hatched portion in FIG. 2), and the third display data is output.
No scanning pulse is input during the 01 scanning period. Therefore,
At this time, even if the scanning pulse is dull, the 300th scanning pulse never overlaps the signal line pulse in the first scanning period as shown in FIG. Therefore, in the case of the upper screen, the influence of the display data of the first scanning line on the last scanning line is completely eliminated, and the display quality at the center of the screen does not deteriorate at all.

In this embodiment, the CP signal is sent to the 300th (N
= 300) By stopping in the scanning period, the 300th
Although the example of holding the display data in the scanning period has been described, the means for holding the N-th display data is not limited to the above configuration, and the display data latched in the 300th scanning period is the same as that in the 299th scanning period. Accordingly, the display data in the 301st scanning period becomes the same as the display data in the 300th scanning period, and the effect of the present invention can be obtained.

As described above, the operation of stopping the CP signal in the Nth scanning period or the operation of making the display data latched in the Nth scanning period the same as that in the (N-1) th scanning period is built in the control circuit 20. This can be easily performed by changing the program software for driving the microcomputer, and it is not necessary to add any new components such as a ROM and a line buffer for separately holding display data.

The present invention is not limited to the configuration in which the screen is vertically divided into two, but may be a configuration in which the screen is divided into a plurality of three or more. Further, in the above-described embodiment, the upper and lower two divisions have been described. However, the screen may be divided into a plurality of parts for each of a plurality of scanning lines, and when the scanning lines are arranged in the vertical direction, the screen may be divided into right and left parts.

Further, in the present invention, the scanning duty is set to 1 / (N + 1) or less, and the scanning duty may be further reduced as long as display is not hindered. However, when 1 / (N + n) (where n is an integer of 1 ≦ n), a problem arises in that the frame frequency decreases as n increases. Therefore, n <10 is preferable, and more preferably n = 1.

Further, the present invention relates to a simple matrix type LC.
STN (Super Twisted Nematic) type L applied to D
It can be applied to CD, TN (Twisted Nematic) type LCD, ferroelectric liquid crystal type LCD, antiferroelectric liquid crystal type LCD, bistable liquid crystal type LCD and the like.

Thus, according to the present invention, for example, in two-division driving, the display data of the first scanning line on the upper screen is changed due to the dulling of the scanning pulse and the crosstalk from the signal line pulse (display data) in the next scanning line. This has the effect of eliminating the effect on the final scanning line of the upper screen and improving the display quality at the center of the screen.

It should be noted that the present invention is not limited to the above embodiment, and various changes may be made without departing from the scope of the present invention.

[0032]

According to the present invention, the screen is simultaneously driven by a plurality of scanning lines for each of a plurality of scanning lines, and one screen is divided into N (N).
Is an integer of 1 or more) and M scanning lines (M is an integer of 1 or more)
In the simple matrix type LCD composed of the signal lines, the scanning duty is set to 1 / (N + 1) or less, and display data of the Nth scanning period is input to the signal lines from the (N + 1) th to the last scanning period. And a control circuit for controlling not to apply the scanning pulse, the cross-talk between the scanning pulse and the signal line pulse (display data) in the next scanning line in the two-division driving, for example, causes The effect of completely eliminating the influence of the display data of the first scanning line on the last scanning line of the upper screen and improving the display quality at the boundary of each screen, that is, at the center of the screen.

Further, the control circuit stops the dot clock signal for supplying new display data to the shift register of the signal driver from the Nth to immediately before the last scanning period, thereby reducing the display data of the Nth scanning period. There is no need for a separate line buffer or the like, and display quality can be improved at low cost.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram of a basic configuration of a two-part drive LCD according to the present invention.

FIG. 2 is a timing chart of various control signals and drive signals input to a two-part drive LCD of the present invention.

FIG. 3 is a waveform diagram for explaining that a scanning pulse of a last scanning line (300th scanning line) on an upper screen and a signal line pulse of a first scanning line do not overlap in the two-part drive LCD of the present invention.

FIG. 4 is a block circuit diagram of a basic configuration of a conventional two-part drive LCD.

FIG. 5 is a timing chart of various control signals and drive signals input to a conventional two-part drive LCD.

FIG. 6 is a display pattern diagram showing display deterioration in a central portion of a screen which occurs in a conventional two-part drive LCD.

FIG. 7 is a waveform diagram for explaining that a scanning pulse of a last scanning line (300th scanning line) on an upper screen and a signal line pulse of a first scanning line overlap in a conventional two-part drive LCD.

FIG. 8 shows a two-part drive LCD to be solved by the present invention.
FIG. 4 is a display pattern diagram for explaining display failures of FIG.

[Explanation of symbols]

 1: liquid crystal panel 2: upper screen 3: lower screen 4: upper scanning driver 5: upper signal driver 6: scanning line 7: signal line 8: lower scanning driver 9: lower signal driver 20: control circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA07 NA11 NA22 NA43 NB16 NB23 NC21 ND15 ND54 NF04 NF05 NF13 NF17 NF20 5C006 AA01 AF42 AF44 AF50 BB12 BB14 BF02 BF03 BF04 FA22 FA36 FA51 5C080 DD05 DD10 DD13 GG02

Claims (2)

[Claims] 1. A screen is simultaneously driven by a plurality of scanning lines for each of a plurality of scanning lines, and one screen is divided into N (N is an integer of 1 or more) scanning lines and M (M is an integer of 1 or more) scanning lines. A simple matrix type liquid crystal display device comprising
The scanning duty is 1 / (N + 1) or less, and N +
A liquid crystal display device comprising a control circuit for inputting display data of an Nth scanning period to a signal line from a first scanning period to a last scanning period and controlling so as not to apply a scanning pulse. 2. The liquid crystal display according to claim 1, wherein the control circuit stops a signal for supplying new display data to the shift register of the signal line driving circuit from the Nth time to immediately before the last scanning period. apparatus.