JP2000306067A - Ic card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an IC card securing security equal with conventional one after the issue of the IC card while making the issuer of the IC card control the read/write of a memory built in the IC card without going through an authentication procedure at the time of issuing the IC card. SOLUTION: This IC card mounting a central processing unit(CPU) 13 and a memory 14 and provided with an input/output terminal for receiving/outputting signals from/to the outside, is further furnished with a circuit 21 including an irreversible switch using a fuse 33 for controlling the read/write of a memory 14 without interposing a central processing unit(CPU) 13 in a conducted state and for controlling the read/write of the memory 14 only through the CPU in a non-conducted state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an IC card having a central processing unit and a memory.

[0002]

2. Description of the Related Art Security of an IC card includes a central processing unit (hereinafter referred to as a CPU) mounted on the IC card.
It is secured by the authentication of the memory read / write control by the CPU. FIG. 2 shows a case where a CPU and a memory
FIG. 2 is a diagram illustrating a basic configuration of an IC system that controls reading and writing of a memory through U; All signals between the outside and the memory 14 of the IC are input and output through the CPU 13. That is, in FIG.
Reads information from the input signal terminal 11 and
Is output to the memory 14. The CPU 13 also outputs a signal created based on the output signal of the memory 14 to the outside through the output signal terminal 12.

[0003]

In a conventional IC card IC system, the issuer of the IC card is
At the time of issuing a card, even if reading / writing of the memory of the IC mounted on the IC card is controlled, it is necessary to go through an authentication procedure. The authentication procedure requires a certain amount of time, and therefore, there is a problem that it takes a long time to issue an IC card.

However, if the memory built in the IC can be directly controlled for reading and writing from the outside, the
The security of the card cannot be ensured.

According to the present invention, an IC card issuer controls reading and writing of a memory incorporated in an IC card without issuing an authentication procedure at the time of issuing the IC card. An object of the present invention is to provide an IC card in which equivalent security is ensured.

[0006]

The IC card according to the present invention comprises:
Equipped with a central processing unit and memory, equipped with input / output terminals for inputting and outputting signals to and from the outside.When in a conductive state, it enables read / write control of the memory without the intervention of the central processing unit, and shuts off. When in the state, a circuit including an irreversible switch that enables control of reading and writing of the memory only through the central processing unit is provided.

[0007]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an IC mounted on an IC card according to the present invention.
It is a figure which shows the system of C. FIG. 1A is a diagram showing an entire IC system. FIG.
FIG. 3A is a circuit configuration diagram centering on a circuit including an irreversible switch in FIG. In FIG. 1, the same parts as in FIG. 2 are denoted by the same reference numerals as in FIG.

As shown in FIG. 1, the system of the IC mounted on the IC card comprises a circuit 21 including a multiplexer 23 and an irreversible switch in addition to the system shown in FIG. The multiplexer 23 is connected to the selection signal terminal 2
It has a function of selecting one of an input signal not passing through the CPU 13 and an input signal passing through the CPU 13 and inputting the selected signal to the memory 14 by a signal from 0. The multiplexer 23 has a function of determining whether or not to output the output signal of the memory 14 via the CPU 13 and outputting the signal.

The circuit 21 including the irreversible switch is switched from the conductive state to the cut-off state by the input signal of the switch switching signal terminal 25, but once switched to the cut-off state, it cannot return to the original state. are doing. The circuit 21 including the irreversible switch, before switching the irreversible switch, that is, when in a conductive state,
The input signal from the external input signal terminal 26 is output to the memory 14, and the output signal of the memory 14 is output to the external output signal terminal 27. After switching the irreversible switch to the cutoff state, the circuit 21 including the irreversible switch cannot output the input signal from the external input signal terminal 26 to the memory 14 and outputs the output signal of the memory 14 to the external circuit. It cannot be output to the output signal terminal 27 either. After switching the switch, the connection between the CPU 13 and the memory 14 is always enabled.

In this embodiment, a fuse 33 is used as an irreversible switch. The voltage of VDD 36 is the operating voltage of the IC. The input signal from the external input signal terminal 26 is input to the transfer circuit 38, and the output of the transfer circuit 38 becomes the input signal of the multiplexer 23. The output signal of the multiplexer 23 is input to the transfer circuit 31, and the output signal of the transfer circuit 31 is output to the external output signal terminal 27.

The fuse 33 used as an irreversible switch is broken by the voltage applied to the switch switching signal terminal 25. The voltage is chosen so that the IC does not break.
The resistance value of the resistor 35 is set to be larger than the resistance value of the fuse 33. The signal input to the inverter 37 is set to a low level while the fuse 33 is present without being broken, and the signal input to the inverter 37 is set to a high level after the fuse 33 is broken. .
The voltage at which the fuse 33 is broken and the specific value of the resistor 35 are:
It is determined depending on the target integrated circuit.

The three transfer circuits 31, 32, 38
Output the same signal as the input signal to the transfer circuit when the gate voltage is at the high level. When the gate voltage is low, the transfer circuit 3
1, 32 and 38 become high impedance. The transfer circuit 32 has a high impedance,
Its output is either high.

When the fuse 33 exists, the voltage of the switch signal terminal 25 is set to a low level so that the input signal / output signal of the memory 14 can be controlled by the CPU.
13 or through a circuit 21 including an irreversible switch. But fuse 3
After 3 is broken, a high-level signal is input to the inverter 37, and a low-level signal is input to each gate of the transfer circuits 38 and 31. As a result, the transfer circuits 38 and 31 become high impedance,
An input signal and an output signal between the circuit 21 including the irreversible switch and the memory 14 are cut off.

Switch switching signal terminal 25 and fuse 33
Therefore, even if the signal at the switch switching signal terminal 25 is at a low level, the input of the inverter 37 does not go to a low level. After the fuse 33 is broken, there is no input signal or output signal via the circuit 21 including the irreversible switch, and only the input signal and output signal via the CPU 13 become valid.

The present invention can be applied to a prepaid IC card. The IC mounted on the IC card includes
Parallel signals are input and output through external input terminals 26 and external output terminals 27 through bus terminals. IC also has
Serial signals are input and output through an output signal terminal 11 and an input signal terminal 12, respectively. The selection signal terminal 20 is connected to the output terminal of the inverter 37. The multiplexer 23 is set so that an input signal and an output signal between the CPU 13 and the memory 14 become valid when the signal of the selection signal terminal 20 is at a low level.

A system for issuing a prepaid IC card has a reader / writer for parallel signals. First, a personal identification number and a value indicating the monetary value of the IC card are written into the memory 14 by the reader / writer. This process is based on the CP
The read / write control of the memory is performed without the intervention of the U13, and it is possible to issue the IC card in a short time without going through the authentication by the CPU 13 which is essential in the conventional IC card.

When necessary information is written into the memory 14, a predetermined voltage is applied to the switch switching signal terminal 25, and the fuse 33 is broken. Thereafter, the fuse 33 does not return to the conductive state again, and there is no input / output of a signal through the external input terminal 26 and the external output terminal 27. Outside and I
The CPU 13 always intervenes between the memory 14 of the C card and the security of the IC card.

The IC card according to the present invention can be used, for example, in buying and selling goods in exactly the same manner as a conventional prepaid IC card. In this case, the system inputs and outputs serial data to and from the IC card. I
A data string for collating the personal identification number is sent to the CPU 13 inside the C card, a data string for reducing the value indicating the monetary value of the IC card is sent, and a data string is received from the CPU.

[0020]

As described above, according to the IC card of the present invention, the issuer of the IC card controls the reading and writing of the memory built in the IC card without going through the authentication procedure when the IC card is issued. After issuing an IC card, security equivalent to that of a conventional IC card can be secured.

[Brief description of the drawings]

FIG. 1 is a diagram showing a system of an IC mounted on an IC card of the present invention. FIG. 1A is a diagram showing an entire IC system. FIG. 1B is a circuit configuration diagram mainly showing a circuit including an irreversible switch in FIG.

FIG. 2 is a diagram showing a basic configuration of an IC system.

[Explanation of symbols]

 Reference Signs List 11 input signal terminal 12 output signal terminal 13 CPU 14 memory 20 selection signal terminal 21 circuit including irreversible switch 23 multiplexer 25 switch switching signal terminal 26 external input signal terminal 27 external output signal terminal 31, 32, 38 transfer circuit 33 fuse 34 GND 35 resistor 36 VDD 37 inverter circuit

Claims (1)

[Claims] An IC card equipped with a central processing unit and a memory and having an input / output terminal for inputting / outputting a signal to / from an external device does not pass through the central processing unit when the IC card is conductive. A circuit including an irreversible switch that enables control of reading and writing of the memory and enables control of reading and writing of the memory only through the central processing unit when in a cutoff state. I
C card.