JP2000285614A - Test device and test method for decoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a test device capable of easily inspecting a decoder of a recording medium in need of a lot of data. SOLUTION: On an evaluation board 20 for inspection, the data producing function 21 is furnished for producing test data by replacing a part of reproduced data supplied from an MO drive 33 with error data. Further, since an optical disk control(ODC) chip 10 being an object for inspection is provided with the format information of the reproduced data, the evaluation board 20 capable of automatically producing the test data is supplied at a low cost with the a simple constitution by obtaining the timing for substituting for the error data from the ODC chip 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a test apparatus and a test method for inspecting or testing a board or a device having a function of decoding data used in an optical disk device or the like.

[0002]

2. Description of the Related Art Data is recorded on a recording medium such as an optical disk such as a DVD or MO or a magnetic disk used for an HDD or the like according to a predetermined modulation method (code method) and format. For this reason,
When decoding the data recorded on the recording medium, the identification data recorded at a predetermined position (address) of the format is identified, and the reproduced data is subsequently deformatted and decoded (decoded) according to the identification data. There is a need.

For this reason, if the recording media of different types or the same recording media have different specifications, it is necessary to prepare a format / deformat and code decoding function corresponding to the specifications. In many cases, a device having such a function (hereinafter, referred to as a decoding device) is provided as one integrated circuit (ASIC) and mounted on a recording / reproducing device.

[0004] The recording density of recording media such as optical recording media and magneto-optical recording media has been improving year by year, and it is always required to improve the recording and reproduction speed. Therefore, new designs or improvements are always made to improve the capability of the decoding device. For a newly developed decoding device or an improved decoding device, a test or inspection is performed to check whether the function satisfies a desired condition.

[0005]

In such a decoding apparatus, it is important to reliably and quickly decode a large amount of data recorded on a recording medium. Therefore, in order to test a newly developed or improved decoding device, it is necessary to supply a large amount of data to a new decoding device or a chip for decoding. Furthermore, in order to check the performance of the decoding apparatus, it is necessary to put error data, which is a load for decoding, in an appropriate position.
Therefore, in order to inspect the decoding device, it is necessary to prepare a large amount of data including error data at an appropriate position, and it takes a lot of trouble and time to create such data.

[0006] In particular, as decoding devices have become faster and provided with a function capable of handling a large amount of data, a larger amount of data is required for inspection or testing of such a decoding device. It is necessary to include error data at a certain position. For this reason, labor and cost spent for inspection or testing of the decoding device are increasing.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a test apparatus and a test method capable of easily inspecting or testing a decoding apparatus having such a high speed and improved function. It is still another object of the present invention to provide a test apparatus and a test method that can easily include error data at an appropriate position in a large amount of test data. It is another object of the present invention to provide a test apparatus capable of reliably testing the function of a high-speed decoding device without labor or cost.

[0008]

For this reason, in the present invention, instead of individually creating test data used for inspection or testing of a decoding device, data actually recorded on a recording medium is reproduced. The inspection can be performed by changing a part of the reproduced data and supplying the modified data to the decoding device. That is, the test apparatus of the decoding device having the function of decoding the reproduction data read from the recording medium according to the present invention generates test data by changing a part of the reproduction data read from the recording medium. Data generation means is provided. Further, the test method of the decoding device according to the present invention includes:
There is a data generation step of generating test data by changing a part of the reproduction data read from the recording medium. By providing a data generating means or a data generating step for changing a part of the reproduction data, data recorded on a recording medium can be used for a test without preparing a large amount of data in advance for the test. Can be used. Therefore, time and cost for creating test data can be saved.

In order to check the decoding capability of the decoding device,
It is desirable that a part of the reproduction data be efficiently replaced with error data so as to be an obstacle to decoding. In general, data is formatted and recorded on a recording medium, and the format includes a preformat area in which at least one identification data is recorded at a predetermined position. Therefore, by replacing at least one of the identification data in the preformat area of the reproduction data with the error data in the data generation means or the data generation step, the error data can be effectively obtained.

The function of generating the timing for converting a part of the reproduction data into error data can be configured on the test apparatus side. However, the decryption device has a function of identifying such identification data. Therefore, it is possible to obtain the timing of replacement with the error data from the decoding device. Then, if error data is supplied at a timing when the decoding device recognizes the identification data, the function of the decoding device can be reliably tested. Further, the test apparatus does not need a function for generating timing, so that the cost can be reduced. At the same time, the timing of replacement with error data is obtained from the decoding device to be tested, so that even if the specifications of the decoding device are different, it is possible to cope with the difference, and the versatility increases.

When a plurality of identification data are included in the pre-format area, the timing for reading the next identification data in the same format is determined by the timing at which the next identification data is read in the same format. The signal to be controlled can be generated by the decoding device. Therefore, by obtaining the signal by the data generating means and providing a step of obtaining such a signal in the data generating step, it is possible to replace appropriate identification data with an error signal.
That is, in the data generation means or the data generation step, a signal in which at least one of the identification data is recognized by the decoding device, or a signal generated in the decoding device for recognizing other identification data based on the signal is acquired from the decoding device. A part of the reproduction data can be replaced with error data based on those signals.

[0012] Since a predetermined format of the reproduced data is supplied to the series from the recording medium, a signal in which at least one of the identification data is recognized by the decoding device is obtained, and the next format is obtained based on the signal. It is also possible to replace at least one of the identification data of the converted reproduction data with error data.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an ODC (Optical Disc Control) which is a decoding device using the test device according to the present invention.
l) The environment for testing the chip is shown. The test apparatus of this example is realized in the form of an evaluation board 20 on which the ASIC-based ODC 10 can be mounted. First, the ODC 10 of the present example to be tested has both a function of decoding reproduced data and a function of encoding recorded data. For this purpose, a function unit 11 for encoding and decoding recorded or reproduced data, a function unit 12 for formatting or deformatting the recorded or reproduced data, and a function unit 13 for correcting errors in the reproduced data
, A SCSI interface (I / F) 18, a manager 14 for managing a buffer therebetween, and a RAM 15 serving as a buffer, and these are connected by a bus 16.

Reproduced data input from an MO drive 33, which will be described later, is input to a function unit 11 for decoding via an interface 17, and is interpreted by a function unit 12 for deformatting according to a predetermined format. Then, after being processed by the error correcting function unit 13, the processing is performed via the buffer manager 14 and the interface 18.
It is output to the CSI tester 31. The ODC 10 can exchange control data with the evaluation board 20 via the control interface 19.
Is controlled by the

The evaluation board 20 of the present embodiment is an MO drive 3
The data generation function 21 processes the reproduction data RD supplied from the OPC 3 and supplies it to the ODC 10 as test data TD.
It has. The data generation function 21 is an MO drive 3
3. A mask circuit 22 for masking a part of the reproduction data RD supplied from 3 and replacing it with error data, and controls the mask circuit 22 and the ODC 10 to generate test data TD including appropriate error data. A CPU 23 capable of executing processing, a ROM 24 storing a test program and the like, a RAM 25 serving as a work area, and a function unit 26 for controlling an interrupt of the ODC 10 are provided. Have been. further,
The evaluation board 20 includes a control interface 28 connected to a computer 32 for controlling a test environment, and an interface 29 for receiving reproduction data RD from an MO drive 33.

Data generation function 2 of evaluation board 20 of the present embodiment
In 1, the test data TD is generated by replacing a part of the reproduction data RD supplied from the MO drive 33. The outline will be described with reference to FIG. FIG. 2 shows an example of a sector format of a double capacity MO. The sector format 50 of the present example includes a preformat area 51 and a data area 52. In the preformat area 51, data for identifying data recorded in the sector format 50 is recorded at a predetermined position (address) according to a predetermined format. That is, in the pre-format area 51, identification data such as a sector mark SM indicating the start of a sector, data VFO for PLL synchronization, an address mark AM indicating a head of an address, and an address ID of a sector are sequentially recorded from the head thereof. ing. Further, in the sector format 50, the address ID is repeatedly recorded three times, so that the synchronization data VFO and the address mark AM appear repeatedly.

A 667-byte data area 52 is further continued from the 52-byte preformat area 51 having such a configuration with a gap GAP. Data area 5
2 is provided with synchronization data SYNC and a data field 54 following the synchronization data SYNC. Further, data and a CRC for error correction are recorded in a predetermined area of the data field, and resynchronization data RES for synchronizing data is recorded.
YNC is also recorded.

On the MO disk reproduced by the MO drive 33, a sector format 50 composed of such a preformat area 51 and a data area 52 is provided continuously. Therefore, the reproduction data RD in the same format as that shown in FIG. 2 is input to the evaluation board 20 from the MO drive 33.

The ODC chip 10 mounted on the evaluation board 20 is designed so that data can be reproduced and recorded according to the format of the MO disk. Therefore, a signal is provided for identifying data at a predetermined position in the format of the reproduced data to be decoded. First, the sector mark found signal (hereinafter, SM-F signal) is output when the 5-byte sector mark SM is recognized. The address mark window signal (hereinafter, the AM-W signal) is a signal that is output after a predetermined time has elapsed from the SM-F signal.
The address mark AM is detected while the -W signal is enabled. When the address mark AM is detected, an address mark found signal (hereinafter referred to as AM-F
) Is output, and the address ID appearing after the address mark AM is recognized and interpreted.

In the evaluation board 20 of this embodiment, the mounted data generator 21 obtains these signals, SM-F, AM-W, and AM-F signals generated by the ODC chip 10, and obtains the reproduction data RD. The test data TD is generated by partially replacing the test data TD. As the replacement target, data of the pre-format area 51 which has the greatest influence on the data identification, that is, the sector mark SM, the address mark AM and the address ID are selected. further,
Also in the data area 52, the synchronization data SYNC for synchronizing data and the resynchronization data RESYNC are selected as signals to be replaced in order to generate the test data TD. Since the timings at which these signals appear in the reproduction data RD differ depending on the format standard, they are not prepared on the evaluation board 20 but are obtained from the ODC chip 10 mounted for testing.

As shown in FIG. 2, in order to mask the address mark AM with the error data ED, AM-W
For 4 bytes after the signal rises, the reproduction data RD
Is replaced with the error data ED. Also, after the AM-F signal rises to mask the address ID, the AM
Replace the reproduced data RD until the fall of the -W signal with the error data ED. Further, the synchronization data SYNC
Is counted, the time since the fall of the SM-F signal is counted, and the reproduction data RD at a predetermined timing is replaced with the error data ED by the byte of the synchronization data SYNC. Resynchronization data RESYNC
The same is true for Still further, in order to mask the sector mark SM, the S of the preceding sector format 50 is masked.
The counting starts at the falling edge of the MF signal, and the 5-byte reproduced data RD from the beginning of the next sector format 50 is replaced with error data ED.

As described above, in the evaluation board 20 of this embodiment, a part of the normal reproduction data RD supplied from the MO drive 33, in particular, the preformat area 51 which plays an important function for recognizing the data. Is replaced with error data ED by the mask circuit 22 around the data of
The test data TD is automatically generated. For this reason, a large amount of test data TD including error data at an appropriate position can be generated, and the large amount of test data can be stored in the OD to be evaluated.
It can be supplied to the C chip 10. Therefore, a newly developed ODC chip or an improved ODC chip 10
Can be easily checked without spending time and money. The error data ED may be random, but in this example, the clock RFCLK of the PLL-amplified reproduction data and the QB
The logical product of CLK is used as error data ED.

FIG. 3 shows an example of the mask circuit 22. The mask circuit 22 of the present example includes the reproduction data RD read from the MO drive 33 and the clock R as described above.
FCLK and clock QBCLK are supplied to an AND gate 62.
The error data ED generated through the selector 61
And the test data TD including the error data ED is generated at a predetermined timing. Then, the SDC obtained from the ODC chip 10 to generate a timing for converting a part of the reproduction data RD into the error data ED is generated.
MF, AM-W and AM-F signals are used. The SM-F signal is first supplied to a timing generation circuit 71 including a counter and the like.
The timing generation circuit 71 starts counting at the falling edge of the SM-F signal, and outputs the next sector format 5
The head timing of 0 is output. Then, 5
A signal indicating the period for masking a byte is output. Therefore, if the control signal φ1 for masking the sector mark SM is turned on, a signal for replacing the sector mark SM with the error data ED is output via the AND gate 65.

Synchronization data SYNC and resynchronization data R
The same applies to ESYNC, in which the respective timing generation circuits 72 and 73 start counting at the falling timing of the SM-F signal, and output a signal for measuring the timing of masking at a predetermined timing set in advance. If the control signal φ2 or φ3 for masking the synchronization data SYNC or the resynchronization data RESYNC is turned on, a signal for replacing the respective data with the error data ED is output via the AND gate 66 or 67.

On the other hand, the AM-W signal is input to a timer or counter 74 for setting an interval of 4 bytes.
The counting starts when the MW signal rises. Therefore, when the control signal φ4 for masking the address mask AM is turned on, a signal for replacing the address mark AM with the error data ED is output via the AND gate 68. The AM-W signal is further transmitted to the timing generation circuit 7.
0 is also input. Therefore, a signal for masking the address ID is generated, which is turned on when the AM-F signal rises and turned off when the AM-W signal falls. Therefore, when the control signal φ5 for masking the address ID is turned on, a signal for replacing the address ID with the error data ED is output via the AND gate 69. Note that the timing generation circuit 70 and the counter 74 are state machines, and are capable of recognizing the order of an address mark and an address.

Signals for performing these replacements pass through an OR gate 64 and control a selector 61. Therefore,
As described above, the control signal for masking each data is C
If the PU 23 is turned on in accordance with a predetermined program stored in the ROM 24, the data of the corresponding portion of the reproduction data RD is replaced with the error data ED from the data supplied from the MO drive 33, and the test data TD is generated. .

The flow of the process for generating the test data TD will be described with reference to the flowcharts shown in FIGS. First, in step 81, the MO drive 3
The reproduction data RD supplied from 3 is supplied to the ODC 10 and the ODC 10 waits until the SM-F signal indicating that the sector mark SM has been recognized is output. SM-F
The signal is supplied to the data generation circuit 21, and the signal SM-
When it is recognized in step 88 that the AM-W signal has been output from the ODC 10 following the F signal, the data generation circuit 21 determines in step 89 whether or not the program for masking the address mark AM has been performed. It is confirmed. And in the case of a program to be masked,
In step 90, a signal to be masked is output, and 4
A byte interval count is performed.

Subsequently, at step 91, O
When it is recognized that the AM-F signal has been output from the DC 10, the data generation circuit 21 checks in step 92 whether the program is a program for masking the address ID. In the case of a program to be masked, a signal to be masked is output in step 93 and output continuously until it is recognized in step 94 that the AM-W signal has fallen.

In the double capacity sector format shown in FIG. 2, since the address ID is repeated three times and included in the reproduction data RD, the same process as described above is repeated three times. Is completed, the process returns to step 81 and the processing of the next sector format 50 is performed.

As shown in FIG. 5, in step 81, SM-indicating that the sector mark SM has been recognized.
When the F signal is output, the program or circuit 83 for masking the sector mark SM, the program or circuit 84 for masking the synchronization signal SYNC, and the program or circuit 85 for masking the resynchronization signal RESYNC start. Prior to this, in step 82, a counter common to these circuits starts counting.

The process of masking the sector mark SM, the process of masking the synchronization signal SYNC, and the process of masking the resynchronization signal RESYNC are performed in substantially the same steps. For this reason, FIG. 6 shows a process of masking the sector mark SM as a representative. First, step 96
And the sector mark SM of the next sector format 50
It is checked whether the process of masking is selected,
When masking the sector mark SM, step 97
Then, it is determined whether or not the value of the counter which has started counting in step 82 reaches the position of the sector mark SM. If the position is the position of the sector mark SM, error data ED in place of the sector mark SM is output and replaced at step 98. Until it is determined in step 99 that the sector mark SM has been completed, the reproduced data R
D is masked with error data ED, and replacement is stopped at step 100. Then, the processing for masking the synchronization signal SYNC and the processing for masking the resynchronization signal RESYNC are performed in the same manner.

As described above, the evaluation board 20 of this embodiment has the OD
The performance can be tested by installing C10,
Further, the test data TD including the error data ED at an appropriate position is automatically generated by the function 21 for automatically generating test data, and is supplied to the ODC 10.
Therefore, in the evaluation board 20 of the present example, of the reproduction data RD, data to be replaced with the error data ED,
Only by storing a program defining the order and the like in the ROM 24, an OD is generated using a large amount of test data TD using reproduction data supplied from the MO driver 33.
C10 can be tested. Therefore, it is not necessary to prepare a large amount of test data in advance, and a new ODC test can be performed extremely easily.

Further, the timing at which the data included in the reproduction data RD is replaced with the error data ED is determined by the ODC 1 having the function of generating such timing.
I get it from 0. Therefore, the test data T
Since it is not necessary to prepare a circuit or a function for analyzing the reproduction data RD to generate D on the evaluation board 20, a test environment can be constructed at low cost. Further, by inputting the error data ED to the ODC 10 using the signal from the ODC 10, the error data ED can be input to the ODC 10 at the expected timing, and the processing or performance of the ODC corresponding thereto can be reliably performed. Can be determined.

As described above, the ODC to be tested is designed and manufactured in accordance with the format of the reproduction data to be decoded. Since the ODC to be tested contains all the format information of the reproduction data, the signal from the ODC is By replacing with the error data ED using
Appropriate test data can be automatically generated without preparing format information on the test device side, that is, on the evaluation board 20. In addition, it is possible to realize an evaluation board capable of automatically generating test data based on the ODC format information. Therefore, it is possible to realize an extremely versatile test apparatus with a simple configuration.

In the above description, an ODC having a decoding function for an MO drive has been described as an example of a decoding device. Of course, the present invention can also be applied to a test device for a decoding device for a recording medium. Furthermore, in the above description, an ODC that is used for both recording and reproduction is described as an example, but it goes without saying that an ODC that has a decoding function exclusively for reproduction may be used.

[0036]

As described above, according to the present invention, a test apparatus or a test method is provided with a data generating means or a data generating step for changing a part of reproduction data read from a recording medium. Even if a large amount of data is not prepared in advance for a test, data normally recorded on a recording medium can be used as test data. Therefore, time and cost for creating test data can be saved.

Furthermore, the timing at which a part of the reproduced data is replaced with error data in order to generate test data is to be inspected. By obtaining the timing from the decoding device, the error data can be reliably transmitted to the decoding device at a desired timing. Can be entered. Further, since it is not necessary to generate the timing for replacing the error data in the test device, the test device can be supplied at low cost, and a highly versatile test device can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing an outline of a test environment using an evaluation board for inspection according to the present invention.

FIG. 2 is a diagram showing an outline of a format of reproduction data supplied from the MO drive shown in FIG. 1 and test data corresponding thereto.

FIG. 3 is a block diagram showing an example of a mask circuit of the evaluation board shown in FIG.

FIG. 4 is a flowchart showing a process of generating test data using the evaluation board shown in FIG.

5 is a flowchart showing a process of generating the same test data as in FIG. 4, and is a diagram showing a process of masking SM, masking SYNC, and masking RESYNC.

6 is a diagram representatively showing a process of masking the SM among the processes of masking the SM, the mask of the SYNC, and the masking of the RESYNC shown in FIG. 5;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ODC (decoding apparatus) 20 Evaluation board (test apparatus) 21 Test data generation function 22 Mask circuit 23 CPU 24 ROM 25 RAM 26 Interrupt control 31 SCSI tester 32 Computer for control of inspection environment 33 MO drive

Claims (8)

[Claims] 1. A test device for a decoding device having a function of decoding reproduction data read from a recording medium, wherein test data is generated by changing a part of the reproduction data read from the recording medium. A test apparatus for a decoding apparatus, comprising: a data generation unit configured to supply test data generated by the data generation unit to the decoding apparatus. 2. A recording medium according to claim 1, wherein the data is formatted and recorded on the recording medium.
A preformat area in which at least one identification data is recorded at a predetermined position, wherein the data generation means replaces at least one of the identification data of the preformat area of the reproduction data with error data. A test device for a decoding device. 3. The pre-format area according to claim 2, wherein the pre-format area includes a plurality of pieces of identification data, and the data generation unit includes at least one of the pieces of identification data.
One of the signals recognized by the decoding device, or a signal generated in the decoding device for recognizing other identification data based on the signal is obtained from the decoding device, and a part of the reproduced data is converted into error data based on the signal. A test device for a decoding device, characterized by being replaced. 4. The data generating means according to claim 2, wherein said data generating means acquires a signal in which said decoding device has recognized at least one of said identification data, and identifies the next formatted reproduced data based on the signal. At least one of the data
A test device for a decoding device, wherein one of the test devices is replaced with error data. 5. A test method for a decoding device provided with a function of decoding reproduction data read from a recording medium, wherein test data is generated by changing a part of the reproduction data read from the recording medium. A test method for a decoding device, comprising: supplying the test data generated in the data generation process to the decoding device. 6. The recording medium according to claim 5, wherein the data is formatted and recorded on the recording medium.
A preformat area in which at least one identification data is recorded at a predetermined position; and in the data generation step, replacing at least one of the identification data of the preformat area of the reproduction data with error data. A method for testing a decoding device, which is characterized by the following. 7. The preformat area according to claim 6, wherein the preformat area includes a plurality of pieces of identification data, and the data generation step includes at least one of the pieces of identification data.
Obtaining from the decoding device a signal recognized by the decoding device, or a signal generated by the decoding device in order to recognize other identification data based on the signal, and a part of the reproduced data based on those signals. Replacing the error data with error data. 8. The data generating step according to claim 6, wherein the data generating step obtains a signal in which the decoding device recognizes one of the pieces of identification data; Replacing at least one of the identification data with error data.