JPS6117271A - Optical disk device - Google Patents

Abstract

PURPOSE:To execute a correct positioning even in case of a failure in an address area, and also to deteriorate no reliability of a data by executing the positioning from the previous sector as other sector controlling circuit of a data processing. CONSTITUTION:When a failure address area exists, an SYNC code detecting signal 50 of an address area is not generated, but by counting the SYNC code detecting signal of the previous sector by a counter circuit 18, its value is decoded, and also supplied to a register circuit 20. This register circuit 20 can generate a sector control signal 51 being a position signal of a sector, a failure sector write position signal 52, a data area write position signal 53, a failure sector flag detecting area signal 54, etc. In this way, the sector position signal can be generated correctly even if several failure address areas exist, and a correct sector processing can be executed by address information of a data area.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an optical disc device, and particularly relates to an optical disc device related to sector positioning and defective sector processing when recording and reproducing all information. At the time of manufacturing the medium, a method was used to record the address area by stamping, and furthermore, it was difficult to re-write the V on the optical disk medium.

Therefore, conventional optical disk devices determine the safe area or data area of a sector based on the address area or sector start position mark, but if the address information of the address area is unknown, the positioning of the sector cannot be determined. (Objective of the Invention) An object of the present invention is to eliminate such drawbacks in conventional optical disk devices, and also to detect fcn in the previous sector when the address area or sector start position mark cannot be detected. The address area name is positioned from the sector start position mark, and the objective is to provide an optical disk device with increased reliability against media defects.

(Structure of the Invention) According to the present invention, track address, sector address?
A disk medium constituted by a sector format having an address area indicating the track and sector address, a data area to which all information indicating the track and sector address is added, and a bad sector flag area indicating a defective sector, and data processing for recording and reproducing all information on the disk medium. With equipment? An optical disk device having a bad sector mark detection circuit that detects a bad sector mark, and a bad sector flag of the sector based on the position of the address area of the previous sector when address information in the address area cannot be read during sector processing. A signal to determine the detection area and data area?
The present invention provides an optical disk device characterized in that it includes a signal generating circuit that generates a signal, performs positioning from the address of the previous sector when the address area is unknown, and enables sector processing using the address information of the data area.

(Example) Next, embodiments of the present invention will be described with reference to all the drawings.

FIG. 1 shows an optical disc device that is an embodiment of the present invention. In FIG. 2, this embodiment uses an optical disk medium with a complete sector format configuration including an address area, a bad sector flag area, and a data area, and further includes a read system and a write system for this optical disk medium, and processes the sectors. In the data processing circuit, if the address area cannot be read, the position of the address area of the previous sector is determined to determine the entire defect flag area and data area of that sector. include.

As shown in FIG. 2, the optical disk medium used in this embodiment is composed of an address area 40 indicating a track address and a sector address as a sector format, a data area 42, and a bad sector flag area 41. Information indicating track addresses and sector addresses (not shown) is also added within the data processing circuit.The data processing circuit includes an optical disk head 1, a sense amplifier circuit 2, and a data discrimination circuit 3 that demodulates read data.
．． Error correction circuit 4. It has a data back/child circuit 5 and a bad sector mark detection circuit 6 as a full read system, an error correction code addition circuit 10, a modulation circuit 9 and a write driver circuit 8 as a write system, and the address area can be read during sector processing. A sector control path 7 that generates all signals for determining the bad sector flag detection area and data area of the previous sector based on the address area position of the previous sector when there is no such area, and a microprocessor circuit 11 that controls all of these. First, the read signal from the original disk head 1 is sent to the sense amplifier circuit 2 and converted into a digital signal. Next, the data of this digital signal is demodulated by the data discrimination circuit 3, and sent to the error correction circuit 4. After the correction operation,
Also, the iF write data is sent through the data buffer circuit 5 to the error correction code addition circuit 10.

Next, the signal is modulated by the modulation circuit 9 and sent to the optical head 1 from the write driver circuit 8 . In the above read/write operation, the start position of the bad sector flag and the start position of the data area are essential, but the mark detection circuit 6 is smaller than the 8YNC code detection signal 50 of the address area shown in FIG.
The signal is taken out and supplied to the sector control circuit 7.

As shown in FIG. 2, this sector control circuit 7 detects a sector control signal 51, a defective sector write position signal 52, a data area write position signal 53, and a defective sector write position signal 53 based on the address area 8YNC code detection signal 50. A sector flag detection area signal 54 is generated.

The microprocessor circuit 11 receives these signals? Used as a positioning signal to achieve all desired purposes.

Next, FIG. 3 shows details of the sector control circuit 7 in this embodiment. In FIG. 3, a sector control circuit used in this embodiment, a data area detection circuit 14 to which all mark detection signals from a mark detection circuit 6 are input, and a boundary pattern (ID 8YNC) detection circuit indicating a boundary between a synchronization pattern and data. 15, a sector control hold circuit 16 which inputs the 5YNC code detection signal of the address area from the detection circuit 15, a counter circuit 18, a decode circuit 19, and the decode circuit 19.
receiving all signals from the register circuit 20 generating each signal 51 to 54 and receiving all signals from the register circuit 2o;
The delay circuit 17 that supplies the counter circuit 18? The decode circuit 19 is configured to receive a signal from the sector control hold circuit and a signal from the counter circuit 18.

This sector control circuit 7 is connected to the data area detection circuit 14 and the ID area detection circuit 14 by the signal from the mark detection circuit 6.
Activate the 8YNC detection circuit (ID 5YNC: calls the boundary pattern between the synchronization pattern and data) 15, and
8YNC code detection signal 50 by YNC detection circuit 15
t-generate. This signal 5° activates the sector control and hold circuit 16, which causes the sector control circuit 7 to operate for several sectors. Counter circuit 1
8 starts counting from the 8YNC code detection signal 50, supplies the signal to all decoding circuits 19, and further supplies the result to all register circuits 20. register circuit 20
Based on this, the signals 51 to 54 for sector positioning are
Etc.7 occurs. Note that the delay circuit 17 determines the value to be loaded into the counter circuit 18 in relation to the signal 5°.

In this embodiment, if a defective address area rarely occurs in this embodiment, the 8YNC code detection signal 50 for the address area is not generated as shown in FIG.

By counting the 5YNC code detection signal of the previous sector by the counter circuit 18, the value is decoded,
and is supplied to the register circuit 20. 4. This register circuit w520 can generate a sector control signal 51 which is a sector position signal, a bad sector write position signal 52, a data area write position signal 53, a bad sector flag detection area signal 54, etc. Therefore, in this embodiment, as shown in FIG. 4, sector position signals can be generated correctly even if there are several defective address areas, so that correct sector processing can be performed based on the address information of the data area. In addition, in this embodiment, which is made into smaller blocks than the block diagram in FIG. 1, it is also possible to add serial←parallel conversion 12.24, a defective flag generation circuit 22, etc. as shown in FIG. .

(Effects of the Invention) As described above, the present invention uses a sector control circuit to perform positioning from the previous sector in addition to data processing, thereby making it possible to perform correct positioning even in the case of defects in the address area. Moreover, the reliability of the data is not compromised.

[Brief explanation of drawings]

Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a diagram showing a sector format and a time chart of main parts in this embodiment, and Fig. 3 is a sector control circuit in an embodiment of the present invention. FIG. 4 is a diagram illustrating a time chart in the case where there are 4 bad sectors in this embodiment. DESCRIPTION OF SYMBOLS 1... Optical tissue head, 2... Sense amplifier circuit, 3... Data discrimination circuit, 4... Error correction circuit, 5... Data buffer circuit, 6... Mark detection circuit , 7... sector control circuit, 8...
Light driver, 9.23...Modulation circuit, 10.
・Error correction code addition circuit, 11...Micro・
Processor circuit, 12... serial → parallel conversion,
13... Error correction circuit, 14... Data area detection, 15... ID8YNC detection circuit, 16... Sector control hold circuit, 17... Tilley circuit, 18... Counter circuit, 19 ...Decode circuit, 20...Register circuit, 21...Write.
Driver circuit, 22...Flag/pattern generation circuit, 24...Parameter to serial conversion circuit, 25...
Error correction code addition circuit diagram

Claims (1)

[Claims] A disk medium configured with a sector format having an address area indicating a track address, a sector address, a data area to which information indicating the track and sector address is added, and a bad sector flag area indicating a defective sector, and information on the disk medium. An optical disk device having a data processing device for recording and reproducing data, a defective sector mark detection circuit for detecting a defective sector mark, and a data processing device for detecting a defective sector mark, and a data processing device for detecting a defective sector mark, and a defective sector mark detection circuit for detecting a defective sector mark, and a data processing device for detecting a defective sector mark. It includes a signal generation circuit that generates a signal to determine the bad sector/flag detection area of the sector and the data area based on the position, and when the address area is unknown, the position is determined from the address of the previous sector and the data area is determined. An optical disc device characterized in that sector processing is enabled by address information.