JP2000284747A - Display device, and its driving circuit and driving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the display device which has luminance differences between areas on a screen reduced and also has the generation of a border due to a luminance difference suppressed. SOLUTION: Sustain electrodes 13 of a PDP 1 are sectioned into blocks BK1 to BK4. At the border parts of the blocks BK1 to BK4, some of sustain electrodes in the respective blocks are arranged between sustain electrodes 13 of other blocks. Sustain drivers 41 to 44 are connected to the sustain electrodes 13 of the corresponding blocks BK1 to BK4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a display device for displaying an image by controlling discharge, a driving circuit and a driving method thereof.

[0002]

2. Description of the Related Art PDP (Plasma Display Panel)
Is advantageous in that it can be made thinner and have a larger screen. In this plasma display device, an image is displayed by utilizing light emission at the time of gas discharge.

FIG. 12 is a schematic sectional view of a three-electrode surface discharge cell in an AC type PDP. Discharge cell 1 shown in FIG.
In 00, a pair of scan electrode 12 and sustain electrode 13 are formed in a horizontal direction on surface glass substrate 101, and these scan electrode 12 and sustain electrode 13 are covered with transparent dielectric layer 102 and protective layer 103. I have.

On the other hand, address electrodes 11 are formed in a vertical direction on a back glass substrate 104 facing the front glass substrate 101. On the address electrode 11, a transparent dielectric layer 105 is formed. A phosphor 106 is applied on the transparent dielectric layer 105.

In the discharge cell 100, an address discharge is generated between the address electrode 11 and the scan electrode 12 by applying a write pulse between the address electrode 11 and the scan electrode 12 during the write period. In the above, a sustain discharge is performed between the scan electrode 12 and the sustain electrode 13 by applying a periodic sustain pulse that is alternately inverted between the scan electrode 12 and the sustain electrode 13.

FIG. 13 is a block diagram showing a configuration of a conventional plasma display device. The plasma display device of FIG. 13 includes a PDP (plasma display panel) 1, a data driver 2, a scan driver 3, a plurality of scan driver ICs (integrated circuits) 3a, and a sustain driver 4.

The PDP 1 includes a plurality of address electrodes (data electrodes) 11, a plurality of scan electrodes (scan electrodes) 12, and a plurality of sustain electrodes (sustain electrodes) 13. The plurality of address electrodes 11 are arranged in the vertical direction of the screen, and the plurality of scan electrodes 12 and the plurality of sustain electrodes 13 are arranged in the horizontal direction of the screen. The plurality of sustain electrodes 13 are commonly connected.

A discharge cell shown in FIG. 28 is formed at each intersection of the address electrode 11, the scan electrode 12, and the sustain electrode 13, and each discharge cell forms a pixel on the screen.

The data driver 2 is connected to a plurality of address electrodes 11 of the PDP 1. The plurality of scan driver ICs 3a are connected to the scan driver 3.
The plurality of scan electrodes 12 of the PDP 1 are connected to each scan driver IC 3a. The sustain driver 4 is connected to a plurality of sustain electrodes 13 of the PDP 1.

The data driver 2 applies a write pulse to a corresponding address electrode 11 of the PDP 1 according to image data during a write period. The plurality of scan driver ICs 3a are driven by the scan driver 3, and shift the shift pulse SH in the vertical scanning direction during the writing period while the plurality of scan electrodes 1 of the PDP 1 are arranged.
2 are sequentially applied with a write pulse. Thereby, an address discharge is performed in the corresponding discharge cell.

Further, a plurality of scan driver ICs 3a
In the sustain period, a periodic sustain pulse is applied to PDP1.
To the plurality of scan electrodes 12. On the other hand, the sustain driver 4 simultaneously applies a sustain pulse 180 ° out of phase with respect to the sustain pulse of the scan electrode 12 to the plurality of sustain electrodes 13 of the PDP 1 during the sustain period. Thereby, sustain discharge is performed in the corresponding discharge cell.

[0012]

FIG. 14 shows the PD shown in FIG.
Scan electrode 12 and sustain electrode 1 at P1
FIG. 6 is a timing chart illustrating an example of a drive voltage of No. 3;

In the initialization and writing periods, an initial setup pulse Pset is applied to a plurality of scan electrodes 12 simultaneously. Thereafter, the write pulse Pw is sequentially applied to the plurality of scan electrodes 12. Thereby, PD
An address discharge occurs in the discharge cell corresponding to P1.

Next, in the sustain period, the sustain pulse Psc is periodically applied to the plurality of scan electrodes 12, and the sustain pulse Psu is periodically applied to the plurality of sustain electrodes 13. The phase of the sustain pulse Psu is
The phase is shifted by 180 ° with respect to the phase of c. Thus, a sustain discharge occurs following the address discharge.

FIG. 15 is a circuit diagram showing a configuration of the sustain driver 4 of FIG. As shown in FIG. 15, the sustain driver 4 includes a power recovery circuit 400 and a switch S
W11 and SW12. The output terminal of power recovery circuit 400 is connected to node N5. Switch SW11 is connected between power supply terminal V4 and node N5, and switch SW12 is connected between node N5 and the ground terminal. The voltage Vsus is applied to the power supply terminal V4. The node N5 is connected to, for example, 480 sustain electrodes 13. In FIG. 15, a plurality of sustain electrodes 1 are shown.
3 and the panel capacitance Cp corresponding to the total capacitance between the ground terminal
It is shown.

The power recovery circuit 400 includes a recovery capacitor C
1, including a recovery coil L1, switches SW21 and SW22, and diodes D1 and D2. The recovery capacitor C1 is connected between the node N8 and the ground terminal. The switch SW21 and the diode D1 are connected in series between the node N8 and the node N9.
, A diode D2 and a switch SW22 are connected in series. The recovery coil L1 is connected between the nodes N9 and N5.

FIG. 16 is a timing chart showing the operation of the sustain driver 4 of FIG. FIG. 16 shows the voltage of the node N5 and the switches SW21, SW11,
The operation of SW22 and SW12 is shown.

In the sustain period, during the period Ta, the switch S
W21 turns on and switch SW12 turns off. At this time, the switches SW11 and SW22 are off. As a result, L due to the recovery coil L1 and the panel capacity Cp
Due to the C resonance, the voltage of the node N5 gradually increases.
Thereafter, in a period Tb, the switch SW21 is turned off, and the switch SW11 is turned on. As a result, the voltage of the node N5 sharply increases, and during the period Tc, the voltage of the node N5 is fixed to Vsus.

In the period Td, the switch SW11 turns off and the switch SW22 turns on. Thereby, LC resonance by the recovery coil L1 and the panel capacitance Cp causes
The voltage of node N5 gradually decreases. Then, period T
e, the switch SW22 is turned off and the switch SW22 is turned off.
12 turns on. As a result, the voltage of node N5 rapidly drops and is fixed at the ground potential.

By repeating this operation during the sustain period, a periodic sustain pulse Psu is applied to the plurality of sustain electrodes 13.

As described above, the rising portion and the falling portion of the sustain pulse Psu correspond to the LC resonance section in the periods Ta and Td by the operation of the power recovery circuit 400 and the switch S
Period T due to ON operation of W11 or switch SW12
b, Te edges.

The sustain pulse Psc shown in FIG.
2 is applied periodically.

In the above-described plasma display device, when the number of scan electrodes 12 and sustain electrodes 13 is increased to increase the size of the PDP 1, the driving capability required for the sustain driver 4 is increased, and the sustain driver 4 is configured. It is necessary to increase the output of elements such as transistors. Therefore, in order to disperse the driving current, the PDP 1 is divided into a plurality of blocks, and a plurality of sustain drivers are used corresponding to those blocks. A plasma display device that drives a plurality of blocks of a PDP using a plurality of sustain drivers as described above is disclosed in, for example, Japanese Patent Application Laid-Open No. 6-4039.

FIG. 17 is a block diagram showing a configuration of a plasma display device provided with two sustain drivers.

In the plasma display device shown in FIG.
PDP 1 is divided into two blocks, and two sustain drivers 4a and 4b are provided corresponding to the two blocks. The sustain driver 4a is connected to the sustain electrode 13 of the upper block of the PDP 1, and the sustain driver 4b is connected to the sustain electrode 13 of the lower block of the PDP 1. As a result, the driving ability required for each of the sustain drivers 4a and 4b is reduced to half of the case where one sustain driver 4 is used.

However, as shown below, the PDP
In some cases, a luminance difference may occur due to a difference in the light emission area between the upper block and the lower block of one screen.

Here, as shown in FIGS. 18A and 18B, a large light emitting region 501 is provided in the upper half of the screen of the PDP 1 and a small light emitting region 502 is provided in the lower half thereof.
A case of displaying an image having the following will be described.

In the plasma display device shown in FIG.
As shown in FIG. 18A, one sustain driver 4 drives the sustain electrodes 13 in the entire region of the PDP 1. In this case, the sustain driver 4 sends the PDP 1
The sum of the discharge currents supplied to the plurality of sustain electrodes 13 is I0.

On the other hand, in the plasma display device of FIG. 17, as shown in FIG. 18B, the sustain electrodes 13 of the upper block and the lower block of the PDP 1 are driven by two sustain drivers 4a and 4b, respectively. In this case, since the area of the light emitting region 501 of the image in the upper block is large, the total sum I1 of the discharge current supplied from the sustain driver 4a to the plurality of sustain electrodes 13 in the upper block is large. On the other hand, since the area of the light emitting region 502 of the image in the lower block is small,
The total sum I2 of the discharge current supplied from the sustain driver 4b to the plurality of sustain electrodes 13 in the lower block becomes smaller.

FIG. 19 shows the sum I1 of the discharge current supplied by the sustain driver 4a and the sum I2 of the discharge current supplied by the sustain driver 4b. FIG.
As shown in FIG. 9, the sum I1 of the discharge current supplied by the sustain driver 4a is larger than the sum I2 of the discharge current supplied by the sustain driver 4b.

On the other hand, as shown in FIG. 20, the potential of sustain pulse Psu applied to sustain electrode 13 decreases due to a voltage drop due to the discharge current. In FIG.
The potential of the sustain pulse Psu at the time of the black screen is shown by a solid line, and FIG.
8 (b) Sustain pulse P in the block below PDP1
The potential of su is indicated by a dotted line, and the potential of the sustain pulse Psu in the upper block is indicated by a chain line.

In the example of FIG. 18B, since the sum I2 of the discharge current is small in the block below the PDP 1, the voltage drop of the sustain pulse Psu due to the discharge current is small as shown by the dotted line. On the other hand, since the sum I1 of the discharge current is large in the upper block of the PDP 1, the voltage drop of the sustain pulse Psu due to the discharge current is small as shown by the dashed line.

As described above, when the sum of the discharge currents in each block is large, the potential of the sustain pulse Psu is lower than when the sum of the discharge currents is small. Thereby,
In the example of FIG. 18B, the discharge light emission amount of each discharge cell in the upper block is smaller than the discharge light emission amount of each discharge cell in the lower block. As a result, the luminance of the light emitting area 501 in the upper half of the screen is lower than the luminance of the light emitting area 502 in the lower half of the screen. Also, the light emitting area 5 in the upper half of the screen
01 and a light emitting area 502 in the lower half of the screen, a boundary appears due to a luminance difference.

An object of the present invention is to provide a display device in which the luminance difference between the respective areas of the screen is reduced and the occurrence of boundaries due to the luminance difference is suppressed, and a driving circuit and a driving method thereof.

[0035]

Means for Solving the Problems (1) First invention A display device according to a first invention comprises a plurality of first electrodes arranged in a first direction and a plurality of first electrodes intersecting the first direction. A plurality of second electrodes arranged in two directions, a plurality of third electrodes arranged in the second direction to be paired with the plurality of second electrodes, and a plurality of first electrodes. A plurality of discharge cells provided at intersections of a plurality of second electrodes and a plurality of third electrodes, and a first voltage for applying a first pulse voltage to a corresponding first electrode according to image data Applying means, second voltage applying means for applying a second pulse voltage to the plurality of second electrodes, and third voltage applying means for applying the third pulse voltage to the plurality of third electrodes. The plurality of third electrodes are divided into a plurality of blocks, and at least a part of the third electrodes of each block is the other one of the plurality of blocks. Alternatively, the third voltage applying means, which is located between the third electrodes of the two blocks, is provided corresponding to the plurality of blocks, and applies a third pulse voltage to the third electrodes of the corresponding blocks. And a plurality of third voltage applying circuits.

In the display device according to the present invention, a first pulse voltage is applied to a corresponding first electrode according to image data, and a second pulse voltage is applied to a plurality of second electrodes. As a result, an address discharge occurs in the corresponding discharge cell. Thereafter, the second pulse voltage is applied to the plurality of second electrodes and the third pulse voltage is applied to the plurality of third electrodes, so that the sustain discharge follows the address discharge in the corresponding discharge cell. Happens.

In this case, the plurality of third electrodes are divided into a plurality of blocks, and at least a part of the third electrodes of each block is located between the third electrodes of the other one or two blocks, The third electrode of each block is driven by a corresponding third voltage application circuit. Thereby, the luminance difference between the blocks is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each block is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(2) Second invention The display device according to the second invention is the display device according to the first invention, in which the third block of the two blocks is at least in a boundary region between two adjacent blocks. Are alternately positioned one or more at a time.

In this case, the luminance difference is reduced at least in the region of the boundary between two adjacent blocks. Therefore, the luminance difference due to the difference in the light emitting area in each block is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(3) Third Invention In the display device according to the third invention, in the configuration of the display device according to the first invention, each of the plurality of blocks is divided into a plurality of sub-blocks, and The blocks are arranged in order.

In this case, the difference in luminance between the blocks over the entire screen is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each block is sufficiently reduced, and the occurrence of the boundary due to the luminance difference is prevented.

(4) Fourth Invention A display device according to a fourth invention is the display device according to any one of the first to third inventions, wherein the plurality of second electrodes are divided into a plurality of groups. Wherein at least some of the second electrodes of each group are located between the other one or two groups of second electrodes, the second voltage applying means is provided corresponding to the plurality of groups, and A plurality of second electrodes each applying a second pulse voltage to a second electrode of a corresponding group.
Of the present invention.

In this case, the plurality of second electrodes are divided into a plurality of groups, and at least some of the second electrodes of each group are located between the other one or two groups of second electrodes, The second electrode of each block is driven by a corresponding second voltage application circuit. Thereby, the luminance difference between groups having different luminances is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each group is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(5) Fifth Invention The display device according to the fifth invention is the display device according to the fourth invention, wherein the second group of the two groups is arranged at least in the boundary region between the two adjacent groups. Are alternately positioned one or more at a time.

In this case, the luminance difference is reduced at least in the region of the boundary between two adjacent groups. Therefore, the luminance difference due to the difference in the light emitting area in each group is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(6) Sixth invention A display device according to a sixth invention is the display device according to the fourth invention, wherein each of the plurality of groups is divided into a plurality of subgroups, and The groups are arranged in order.

In this case, the luminance difference between the groups over the entire screen is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each group is sufficiently reduced, and the occurrence of the boundary due to the luminance difference is prevented.

(7) Seventh Invention The display device according to the seventh invention has a plurality of first electrodes arranged in a first direction and a plurality of first electrodes arranged in a second direction intersecting the first direction. A plurality of second electrodes, a plurality of third electrodes arranged in the second direction so as to be paired with the plurality of second electrodes, a plurality of first electrodes, and a plurality of second electrodes. A plurality of discharge cells provided at the intersections of the electrodes and the plurality of third electrodes; a first voltage applying means for applying a first pulse voltage to the corresponding first electrodes according to image data; A second voltage applying unit that applies a second pulse voltage to the second electrode; and a third voltage applying unit that applies a third pulse voltage to the plurality of third electrodes. Are divided into a plurality of blocks, and the plurality of second electrodes are divided into a plurality of groups at positions different from the plurality of blocks. Divided, third
Includes a plurality of third voltage applying circuits provided corresponding to the plurality of blocks, each of which applies a third pulse voltage to the third electrode of the corresponding block; The applying means includes a plurality of second voltage applying circuits provided corresponding to the plurality of groups and applying a second pulse voltage to the second electrodes of the corresponding groups.

In the display device according to the present invention, the first pulse voltage is applied to the corresponding first electrode according to the image data, and the second pulse voltage is applied to the plurality of second electrodes. As a result, an address discharge occurs in the corresponding discharge cell. Thereafter, the second pulse voltage is applied to the plurality of second electrodes and the third pulse voltage is applied to the plurality of third electrodes, so that the sustain discharge follows the address discharge in the corresponding discharge cell. Happens.

In this case, the plurality of third electrodes are divided into a plurality of blocks, and the plurality of second electrodes are divided into a plurality of groups at positions different from the plurality of blocks. Are driven by the corresponding third voltage applying circuits, and the second electrodes of each group are driven by the corresponding second voltage applying circuits. As a result, the brightness difference is reduced at the boundary between adjacent blocks and at the boundary between adjacent groups. Therefore, the luminance difference due to the difference in the light emission area between each block and each group is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(8) Eighth Invention The display device according to the eighth invention is the display device according to any one of the fourth to seventh inventions, wherein each of the plurality of second voltage application circuits includes: A plurality of driving integrated circuits, wherein the plurality of driving integrated circuits are connected to a plurality of second integrated circuits in a corresponding group.
Of at least a part of each group
Are arranged between the other one or two groups of second electrodes in the unit of the driving integrated circuit. In this case, wiring between the driving integrated circuit and the second electrode is simplified.

(9) Ninth Invention The display device according to the ninth invention is the display device according to any one of the first to eighth inventions, wherein the second pulse voltage is a plurality of pulses during the writing period. A write pulse applied to the second electrode and a first sustain pulse applied to the plurality of second electrodes during a sustain period; a third pulse voltage includes a plurality of third electrodes during the sustain period; The second applied to
Of the sustain pulse.

In this case, the difference in luminance between the blocks during the sustain period is reduced, and the occurrence of boundaries due to the difference in luminance is suppressed.

(10) Tenth Invention A drive circuit according to a tenth invention is arranged with a plurality of first electrodes arranged in a first direction and a second direction intersecting the first direction. A plurality of second electrodes, a plurality of third electrodes arranged in the second direction so as to be paired with the plurality of second electrodes, a plurality of first electrodes, and a plurality of second electrodes. A drive circuit used for a display device including an electrode and a plurality of discharge cells provided at intersections of a plurality of third electrodes, wherein a first pulse voltage is applied to a corresponding first electrode according to image data. And a plurality of second voltage applying means.
A second voltage applying means for applying a second pulse voltage to the plurality of electrodes; and a third voltage applying means for applying a third pulse voltage to the plurality of third electrodes. Is divided into a plurality of blocks, at least a part of the third electrode of each block is located between the third electrodes of the other one or two blocks, and the third voltage applying means is divided into the plurality of blocks. The third of the correspondingly provided and each corresponding block
And a plurality of third voltage application circuits for applying a third pulse voltage to the electrodes.

In the driving circuit according to the present invention, a first pulse voltage is applied to a corresponding first electrode according to image data, and a second pulse voltage is applied to a plurality of second electrodes. As a result, an address discharge occurs in the corresponding discharge cell. Thereafter, the second pulse voltage is applied to the plurality of second electrodes and the third pulse voltage is applied to the plurality of third electrodes, so that the sustain discharge follows the address discharge in the corresponding discharge cell. Happens.

In this case, the plurality of third electrodes are divided into a plurality of blocks, and at least a part of the third electrodes of each block is located between the third electrodes of the other one or two blocks, The third electrode of each block is driven by a corresponding third voltage application circuit. Thereby, the luminance difference between the blocks is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each block is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

(11) Eleventh Invention In a driving method according to an eleventh invention, a plurality of first electrodes arranged in a first direction are arranged in a second direction intersecting the first direction. A plurality of second electrodes, a plurality of third electrodes arranged in the second direction so as to be paired with the plurality of second electrodes, a plurality of first electrodes, and a plurality of second electrodes. A driving method for a display device comprising: an electrode and a plurality of discharge cells provided at intersections of a plurality of third electrodes, wherein the plurality of third electrodes are divided into a plurality of blocks, and at least one of the blocks is divided into a plurality of blocks. The third electrode of the unit is located between the third electrodes of the other one or two blocks, the first pulse voltage is applied to the corresponding first electrode according to the image data, and the plurality of third electrodes are applied. A second pulse voltage is applied to the second electrodes and different voltages are applied to the third electrodes of the plurality of blocks. The third pulse voltage is applied by a voltage application circuit.

In the driving method according to the present invention, a first pulse voltage is applied to a corresponding first electrode according to image data, and a second pulse voltage is applied to a plurality of second electrodes. As a result, an address discharge occurs in the corresponding discharge cell. Thereafter, the second pulse voltage is applied to the plurality of second electrodes and the third pulse voltage is applied to the plurality of third electrodes, so that the sustain discharge follows the address discharge in the corresponding discharge cell. Happens.

In this case, the plurality of third electrodes are divided into a plurality of blocks, and at least a part of the third electrodes of each block is located between the third electrodes of the other one or two blocks, The third electrode of each block is driven by a corresponding third voltage application circuit. Thereby, the luminance difference between the blocks is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each block is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

[0060]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a plasma display device will be described as an example of a display device according to the present invention.

(1) First Embodiment FIG. 1 is a block diagram showing a configuration of a plasma display device according to a first embodiment of the present invention. FIG. 2 is a diagram showing a method of dividing a PDP into blocks in the plasma display device of FIG.

The plasma display device shown in FIG.
P (plasma display panel) 1, data driver 2, scan driver 3, 8 scan driver ICs
(Integrated Circuit) 3a, Four Sustain Drivers 41, 4
2, 43, 44 and a control signal generation circuit 5.

PDP 1 includes a plurality of address electrodes (data electrodes) 11, a plurality of scan electrodes (scan electrodes) 12, and a plurality of sustain electrodes (sustain electrodes) 13. The plurality of address electrodes 11 are arranged in the vertical direction of the screen, and the plurality of scan electrodes 12 and the plurality of sustain electrodes 13 are arranged in the horizontal direction of the screen.

A discharge cell shown in FIG. 12 is formed at each intersection of the address electrode 11, the scan electrode 12, and the sustain electrode 13, and each discharge cell forms a pixel on the screen.

The plurality of sustain electrodes 13 of the PDP 1
It is divided into four blocks BK1, BK2, BK3 and BK4. In this embodiment, each of the blocks BK1 to BK4 includes 128 sustain electrodes 13.

As shown in FIG. 2, at the boundary between block BK1 and block BK2, part of block BK1 is arranged in block BK2, and part of block BK2 is arranged in block BK1. That is, at the boundary between block BK1 and block BK2, block BK
The sustain electrodes 13 of 1 and BK2 are alternately arranged one by one or a plurality of them.

Similarly, the blocks BK2 and BK3
A part of the block BK2 is disposed in the block BK3, and a part of the block BK3 is disposed in the block BK2. At the boundary between the blocks BK3 and BK4, part of the block BK3 is arranged in the block BK4, and part of the block BK4 is arranged in the block BK3.

In FIG. 1, the data driver 2 includes a PD
It is connected to a plurality of address electrodes 11 of P1. Eight scan driver ICs 3a are connected to the scan driver 3. The eight scan driver ICs 3a are P
It is connected to a plurality of scan electrodes 12 of DP1.

The sustain driver 41 is connected to the block BK1
, The sustain driver 42 is connected to the sustain electrode 13 of the block BK2, the sustain driver 43 is connected to the sustain electrode 13 of the block BK3, and the sustain driver 44 is connected to the sustain electrode 13 of the block BK4. I have.

The control signal generating circuit 5 supplies various control signals to the data driver 2, scan driver 3, scan driver IC 3a and sustain drivers 41 to 44.

The data driver 2 applies a write pulse to the corresponding address electrode 11 of the PDP 1 according to the image data VD during the writing period. The plurality of scan driver ICs 3a are driven by the output voltage of the scan driver 3, and sequentially apply write pulses to the plurality of scan electrodes 12 of the PDP 1 during the write period while shifting the shift pulse SH in the vertical scanning direction. Accordingly, an address discharge occurs in the corresponding discharge cell.

The plurality of scan driver ICs 3a apply a sustain pulse to the plurality of scan electrodes 12 during the sustain period. In the sustain period, the sustain drivers 41 to 44 control the plurality of sustain electrodes 13 of the PDP 1.
The phase of the sustain pulse of the scan electrode 12 is 180
Apply a sustain pulse shifted by °. Thereby, sustain discharge is performed in the corresponding discharge cell.

FIG. 3 is a timing chart showing drive voltages of scan electrode 12 and sustain electrode 13 in PDP 1 of FIG.

During the initialization and writing periods, an initial setup pulse Pset is applied to a plurality of scan electrodes 12 simultaneously. Thereafter, the write pulse Pw is sequentially applied to the plurality of scan electrodes 12. Thereby, PD
An address discharge occurs in the discharge cell corresponding to P1.

Next, in the sustain period, the sustain pulse Psc is periodically applied to the plurality of scan electrodes 12, and the sustain pulse Psu is periodically applied to the sustain electrode 13. The phase of the sustain pulse Psu is shifted from the phase of the sustain pulse Psc by 180 °. The voltage of the sustain pulse Psc and the voltage of the sustain pulse Psu are Vsus.

FIG. 4 mainly shows the scan driver 3 of FIG.
FIG. 3 is a circuit diagram showing the configuration of FIG. FIG. 4 shows only one scan driver IC 3a connected to the scan driver 3.

As shown in FIG. 4, the scan driver 3
Is a power recovery circuit 300 and a plurality of switches SW1,
SW2, SW3, SW5, SW6, and SW7. The output terminal of power recovery circuit 300 is connected to node N1. The configuration of the power recovery circuit 300 is the same as the configuration of the power recovery circuit 400 shown in FIG.

The switch SW1 is connected between the power supply terminal V1 and the node N
1 and the switches SW2 and SW7 are connected between the node N1 and the ground terminal. Switch SW
3 is connected between the power supply terminal V2 and the node N1. The switch SW5 is connected between the power supply terminal V3 and the node N3, and the switch SW6 is connected between the node N1 and the node N3.
Is connected between. The nodes N1 and N3 are connected to the scan driver IC 3a. The scan driver IC 3a is connected to 64 scan electrodes 12.

The voltage Vsus is applied to the power terminal V1, the voltage Vset is applied to the power terminal V2, and the voltage Vscn is applied to the power terminal V3. The voltage Vsus is, for example, 200 V, and the voltage Vset is, for example, 450 V
And the voltage Vscn is, for example, 70V.

FIG. 5 is a timing chart showing the operation of the scan driver 3 of FIG. In FIG. 5, a switch SW
Arrows indicate the ON periods of SW1, SW2, SW3, SW5, SW6 and SW7.

At the start of the initialization period, the switch SW
1, SW3, SW5 and SW7 are turned off, and the switch SW
2. SW6 is ON. Then, the switches SW1,
SW3 turns on, and switch SW2 turns off. Thereby, the voltages of the nodes N1 and N3 rise to Vset. Thereafter, the switches SW1 and SW3 are turned off and the switch SW
After the switch 7 is turned on, the switch SW2 is turned on. Thereby, the voltages of nodes N1 and N3 decrease to 0V. In this case, the scan driver IC 3a includes nodes N1 and N3.
Is applied to the plurality of scan electrodes 12. Thus, the initial setup pulse Pset is applied to the plurality of scan electrodes 12.

In the writing period, the switch SW5 turns on and the switch SW6 turns off. The switch SW2 maintains the on state, and the switches SW1, SW3, and SW7 maintain the off state. As a result, the voltage of the node N3 becomes Vs
cn, and the voltage of the node N1 becomes 0V. In this case, the scan driver IC3a shifts the shift pulse SH in the vertical scanning direction and applies a negative write pulse Pw to the plurality of scan electrodes 12 in synchronization with the shift pulse SH.
Are sequentially applied. Thereafter, the switch SW5 turns off and the switch SW6 turns on. Thereby, the voltage of the node N3 becomes 0V.

In the sustain period, the switches SW3 and S
W5 and SW7 are kept off, and switch SW6 is kept on. In this state, the switch SW1 and the switch SW2 alternately turn on and off. As a result, the voltages of the nodes N2 and N3 become Vsus and 0 at a constant cycle.
V. In this case, the scan driver IC
3a supplies the voltages of the nodes N1 and N3 to the plurality of scan electrodes 12. As a result, the periodic sustain pulse Psc is simultaneously applied to the plurality of scan electrodes 12.

FIG. 6 is a circuit diagram showing a configuration of the sustain driver 41 of FIG. Sustain driver 4 of FIG.
The configurations of 2, 43 and 44 are the same as the configuration of the sustain driver 41.

As shown in FIG. 6, the sustain driver 4
1 is a power recovery circuit 400 and switches SW11, S
W12. The output terminal of power recovery circuit 400 is connected to node N5. The configuration of the power recovery circuit 400 is the same as the configuration of the power recovery circuit 400 illustrated in FIG. The switch SW11 is connected to the power supply terminal V4 and the node N5.
And the switch SW12 is connected between the node N5 and the ground terminal. The voltage Vsus is applied to the power supply terminal V4. The voltage Vsus is, for example, 200 V
It is. The node N5 is connected to 64 sustain electrodes 13.

FIG. 7 is a timing chart showing the operation of the sustain driver 41 of FIG. In FIG. 7, the period during which the switches SW11 and SW12 are on is indicated by arrows.

During the initialization and writing period, the switch SW11 turns on and the switch SW12 turns off. Thereby, the voltage of the sustain electrode 13 is fixed to Vsus.

In the sustain period, the switches SW11 and SW12 alternately turn on and off. Thereby, the voltage of the node N5 periodically changes between Vsus and 0V. As a result, a periodic sustain pulse Psu is simultaneously applied to the plurality of sustain electrodes 13.

In the plasma display device of this embodiment, some of the sustain electrodes 13 of the blocks BK1 to BK4 driven by the sustain drivers 41 to 44 are arranged between the sustain electrodes 13 of the other blocks BK1 to BK4. As a result, the block BK1
A mixed area of two blocks is formed at the boundary of BK4. In the light emitting region of the image located in such a mixed region, the discharge current is shared by the two sustain drivers.

For example, a mixed area of blocks BK1 and BK2 is formed at the boundary between blocks BK1 and BK2.
When the light emitting area of the image is located in the mixed area of the blocks BK1 and BK2, the discharge current is shared by the two sustain drivers 41 and. Therefore, for example, a large light emitting area is provided on the side of the block BK1 and the block BK2
If an image with a small light emitting area is displayed on the side of,
The difference between the sum of the discharge current supplied from the sustain driver 41 to the sustain electrode 13 of the block BK1 and the sum of the discharge current supplied from the sustain driver 42 to the sustain electrode 13 of the block BK2 is reduced. Thereby, the difference between the voltage drop of the sustain pulse Psu in the block BK1 and the voltage drop of the sustain pulse Psu in the block BK2 is reduced, and the light emission amount of each discharge cell of the block BK1 and the discharge of each discharge cell of the block BK2. The difference from the amount of light emission becomes small. As a result, the blocks BK1 and BK
2 is reduced.

The luminance of the mixed area of the blocks BK1 and BK2 is apparently the luminance of the block BK1 and the luminance of the block BK1.
Block BK1, BK2
Occurrence of a boundary due to a luminance difference between the pixels is prevented. Similar effects can be obtained between the blocks BK2 and BK3 and between the blocks BK3 and BK4.

As described above, the difference in luminance due to the difference in the light emitting area in each of the blocks BK1 to BK4 is reduced, and
The occurrence of boundaries due to the difference in luminance is suppressed.

FIG. 9 is a diagram showing another example of the block dividing method of the PDP 1 of FIG. In the example of FIG.
Each of K4 is divided into a plurality of sub-blocks, and sub-blocks of different blocks BK1 to BK4 are sequentially arranged over the entire PDP1.

In this case, since a mixed area of a plurality of blocks BK1 to BK4 is formed in the entire area of PDP1,
Even when an image having a light emitting region of any shape is displayed on the screen of the PDP 1, the discharge current is shared by the plurality of sustain drivers 41 to 44.

For example, when an image having a large light emitting area in the upper half of the screen of the PDP 1 and a small light emitting area in the lower half of the screen is displayed, the discharge current in the large light emitting area is controlled by the sustain drivers 41 to 44. The shared and shared discharge current in the small light emitting region is also reduced by the sustain drivers 41-41.
It is shared at 44. Therefore, the sustain driver 41
, The sum of the discharge current supplied from the sustain driver 42 to the sustain electrode 13 of the block BK2, the sum of the discharge current supplied from the sustain driver 42 to the sustain electrode 13 of the block BK2, and the supply from the sustain driver 43 to the sustain electrode 13 of the block BK3. Of the discharge current supplied from the sustain driver 44 to the sustain electrode 13 of the block BK4.

Therefore, each of the sustain drivers 41 to 41
44, the voltage drop of the sustain pulse Psu applied to the plurality of sustain electrodes 13 becomes equal in the entire region of the PDP 1. As a result, the discharge light emission amount of each discharge cell becomes equal in the entire region of the PDP 1, and there is no difference in luminance in the entire region. Also,
No boundary due to the luminance difference occurs in the entire area of PDP1.

(2) Second Embodiment FIG. 9 is a block diagram showing a configuration of a plasma display device according to a second embodiment of the present invention. FIG. 10 shows a scan driver I in the plasma display device of FIG.
FIG. 4 is a diagram illustrating a connection between C and a scan electrode.

In the plasma display device shown in FIG.
The plurality of sustain electrodes 13 of DP1 are four blocks B
K1, BK2, BK3, and BK4, and the plurality of scan electrodes 12 include four blocks bk1, bk2, and b
k3 and bk4.

At the boundary between block bk1 and block bk2, part of block bk1 is arranged in block bk2, and part of block bk2 is arranged in block bk1. That is, the scan electrodes 12 of the blocks bk1 and bk2 are alternately arranged one by one or a plurality of scan electrodes 12 at the boundary between the blocks bk1 and bk2.

Similarly, blocks bk2 and bk3
At the boundary between the two, a part of the block bk2 is arranged in the block bk3, and a part of the block bk3 is arranged in the block bk2. At the boundary between the blocks bk3 and bk4, a part of the block bk3 is arranged in the block bk4, and a part of the block bk4 is arranged in the block bk3.

In the plasma display device shown in FIG.
Scan drivers 31, 32, 33, and 34 are provided. Two scan driver ICs 3a1 and 3a2 are connected to the scan driver 31, and two scan driver ICs 3a3 and 3a4 are connected to the scan driver 32.
Are connected to the scan driver 33, and two scan driver ICs 3a5 and 3a6 are connected to the scan driver 33, and two scan driver ICs 3a7 and 3a are connected to the scan driver 34.
8 are connected.

The two scan driver ICs 3a1 and 3a2 connected to the scan driver 31 include a block bk1
Of the scan driver 32
Scan driver ICs 3a3, 3a connected to
4 is connected to the scan electrode 12 of the block bk2. The two scan driver ICs 3a5 and 3a6 connected to the scan driver 33 are connected to the scan electrode 12 of the block bk3, and the two scan driver ICs 3a7 and 3a8 connected to the scan driver 33 are connected to the scan electrode 12 of the block bk4. Have been.

As shown in FIG. 10, an adjacent block b
Scan electrodes 12 connected to two adjacent scan driver ICs 3a2 and 3a3 at the boundary between k1 and bk2 are alternately arranged. That is, the mixed area 300 of the blocks bk1 and bk2 is formed in the unit of the scan driver IC at the boundary between the adjacent blocks bk1 and bk2.

The operation of scan driver ICs 3a1-3a8 is the same as the operation of scan driver IC3a of FIG. However, the scan driver ICs 3a1 and 3a8 sequentially apply the write pulse Pw to the plurality of scan electrodes 12 in synchronization with the shift pulse SH while shifting the shift pulse SH in the vertical scanning direction.
In a2 to 3a7, a shift pulse having a cycle twice as long as the shift pulse SH is shifted in the vertical scanning direction, and a write pulse Pw is sequentially applied to the plurality of scan electrodes 12 in synchronization with the shift pulse having a cycle twice as long. .

As a result, the scan driver IC 3a1
Scan driver ICs having the same circuit configuration can be used for 3a8. Thus, by forming a mixed area of two blocks in units of the scan driver IC, the circuit configuration of the scan driver IC can be simplified and the number of scan driver ICs can be minimized. Further, by using connectors having odd-numbered and even-numbered terminals alternately on both side surfaces, the scan driver ICs 3a2 and 3a3 and the scan electrodes 1
The wiring with the device 2 is simplified.

In the plasma display device of this embodiment, at least a part of the sustain electrodes 13 of each of the blocks BK1 to BK4 driven by the respective sustain drivers 41 to 44 are connected to the other blocks BK1 to BK4.
Are arranged between the sustain electrodes 13 to form a mixed area of two blocks at the boundary between the blocks BK1 to BK4. In the light emitting region of the image located in such a mixed region, the discharge current is shared by the two sustain drivers. Therefore, similarly to the first embodiment, the blocks BK1 to BK1 are output from the sustain drivers 41 to 44, respectively.
The difference in the sum of the discharge currents supplied to the sustain electrodes 13 of the BK4 is reduced. Thereby, the blocks BK1 to BK
The difference in voltage drop of the sustain pulse Psu at K4 is reduced,
The difference between the discharge light emission amounts of the respective discharge cells of the blocks BK1 to BK4 becomes smaller. As a result, the luminance difference due to the difference in the light emitting area in each of the blocks BK1 to BK4 is reduced, and
The occurrence of boundaries due to the difference in luminance is suppressed.

In addition, at least some of the scan electrodes 12 of each of the blocks bk1 to bk4 driven by each of the scan drivers 31 to 34 are connected to another block bk1.
, The mixed area of the two blocks is formed on the boundary between the blocks bk1 to bk4. In the light emitting region of the image located in such a mixed region, the discharge current is shared by the two scan drivers. Therefore, the scan drivers 31 to 31
The difference in the sum of the discharge currents supplied from 34 to the scan electrodes 12 of the blocks bk1 to bk4 is reduced.
Thereby, the sustain pulse P in the blocks bk1 to bk4
The difference in voltage drop of SC is reduced, and blocks bk1 to bk
4, the difference between the discharge light emission amounts of the respective discharge cells becomes smaller. As a result, the luminance difference due to the difference in the light emitting area in each of the blocks bk1 to bk4 is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

As a result, the luminance difference due to the difference in the light emitting area in each area of the screen is sufficiently reduced, and the occurrence of the boundary due to the luminance difference is sufficiently controlled.

Note that the block bk1 of the scan electrode 12
To BK4 may be the same as the method for dividing the blocks BK1 to BK4 of the sustain electrode 13, or may be different.

Similarly to the blocks BK1 to BK4 in FIG. 8, each of the blocks bk1 to bk4 is divided into a plurality of subblocks, and the subblocks of the different blocks bk1 to bk4 are sequentially arranged over the entire PDP1. Good.

(3) Third Embodiment FIG. 11 is a block diagram showing a configuration of a main part of a plasma display device according to a third embodiment of the present invention.

In the plasma display device shown in FIG.
A plurality of scan electrodes of PDP1 are two blocks bk
1 and bk2, and the plurality of sustain electrodes of PDP1 are divided into two blocks BK1 and BK2. Division positions of blocks bk1 and bk2 and blocks BK1 and B
It is different from the division position of K2.

The scan driver 3A is connected to the scan electrode of the block bk1, and the scan driver 3B is connected to the scan electrode of the block bk2. The sustain driver 4A is connected to the sustain electrode of the block BK1, and the sustain driver 4B is connected to the block BK1.
2 sustain electrodes.

In the plasma display device of this embodiment, in an image in which a luminance difference occurs between the blocks bk1 and bk2, no luminance difference occurs between the blocks BK1 and BK2. On the other hand, in an image in which a luminance difference occurs between the blocks BK1 and BK2, no luminance difference occurs between the blocks bk1 and bk2.

For example, the block bk1 has a large light-emitting area 501 and the block bk2 has a small light-emitting area 50.
When an image having a 2 is displayed, a discharge current is supplied from the scan driver 3A to the scan electrodes 12 in the light emitting region 501, and a discharge current is supplied from the scan driver 3B to the scan electrodes 12 in the light emitting region 502. Therefore, the sum of the discharge currents supplied from the scan driver 3A to the scan electrodes 12 of the block bk1 becomes larger than the sum of the discharge currents supplied from the scan driver 3B to the scan electrodes 12 of the block bk2. Thereby, the voltage drop of the sustain pulse Psc applied to the scan electrode 12 of the block bk1 becomes larger than the voltage drop of the sustain pulse Psc applied to the scan electrode 12 of the block bk2.

However, the discharge current supplied to the sustain electrodes 13 of the large light emitting region 501 is shared by the sustain drivers 4A and 4B, and the discharge current supplied to the sustain electrodes 13 of the small light emitting region 502 is also controlled by the sustain drivers 4A and 4B. Be shared. Therefore, the sustain driver 4A transmits the sustain electrode 1 of the block BK1.
The sum of the discharge current supplied to the sustain driver 4 is
It becomes almost equal to the sum of the discharge current supplied from B to the sustain electrode 13 of the block BK2. Thereby, the voltage drop of the sustain pulse Psu applied to the sustain electrode 13 of the block BK1 becomes substantially equal to the voltage drop of the sustain pulse Psu applied to the sustain electrode 13 of the block BK2. As a result, the luminance difference between the blocks bk1 and bk2 is reduced by half.

When an image having a large light emitting area in the block BK1 and a small light emitting area in the block BK2 is displayed, the sum of the discharge currents supplied from the sustain driver 4A to the sustain electrodes 13 of the block BK1. From the sustain driver 4B to the block BK2
Is larger than the sum of the discharge currents supplied to the sustain electrodes 13. Thereby, the voltage drop of the sustain pulse Psu applied to the sustain electrode 13 of the block BK1 becomes larger than the voltage drop of the sustain pulse Psu applied to the sustain electrode 13 of the block BK2.

However, the discharge current supplied to the scan electrode 12 in the large light emitting area is
A, 3B, the scanning electrode 1 in a small light emitting area
2 are also supplied to the scan drivers 3A and 3B.
Is shared. Thus, the sum of the discharge currents supplied from the scan driver 3A to the scan electrodes 12 of the block bk1 becomes substantially equal to the sum of the discharge currents supplied to the scan electrodes 12 of the block bk2 from the scan driver 3B. Therefore, the voltage drop of the sustain pulse Psc applied to the scan electrode 12 of the block bk1 is reduced by the sustain pulse Psc applied to the scan electrode 12 of the block bk2.
It becomes almost equal to the voltage drop of sc. As a result, the luminance difference between the blocks BK1 and BK2 is reduced by half.

As described above, since the boundaries between the blocks bk1 and bk2 are different from the boundaries between the blocks BK1 and BK2, the luminance difference between the blocks BK1, BK2, bk1, and bk2 is reduced. Therefore, each block BK1, BK2, b
The luminance difference due to the difference in the light emitting area between k1 and bk2 is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

In the plasma display device of this embodiment, as in the first and second embodiments, each block BK is located at the boundary between blocks BK1 and BK2.
At least a part of the sustain electrodes 13 of the first and BK2 may be arranged between the sustain electrodes 13 of the other blocks BK1 and BK2. Further, similarly to the second embodiment, each of the blocks bk1, bk2 at the boundary between the blocks bk1, bk2.
At least a part of the scan electrodes 12 of k2 may be arranged between the scan electrodes 12 of the other blocks bk1 and bk2.

In the above embodiment, the address electrode 11 is the first
The scan electrode 12 corresponds to the second electrode, and the sustain electrode 13 corresponds to the third electrode. Further, the write pulse applied to the address electrode 11 corresponds to a first pulse voltage, the sustain pulse Psc corresponds to a second pulse voltage, and the sustain pulse Psu corresponds to a third pulse voltage. Further, the data driver 2 corresponds to the first voltage applying means, and the scan drivers 3, 31 to 34,
3A, 3B and the scan driver IC 3a correspond to second voltage applying means or a plurality of second voltage applying circuits,
The sustain drivers 41 to 44, 4A, and 4B correspond to third voltage applying means or a plurality of third voltage applying circuits. Further, the scan driver IC 3a corresponds to a driving integrated circuit. Blocks BK1, BK2, BK3, BK4
Correspond to a plurality of blocks, and blocks bk1, bk2,
bk3 and bk4 correspond to a plurality of groups.

[0122]

According to the present invention, the luminance difference between the respective areas of the screen is reduced. Therefore, the luminance difference due to the difference in the light emitting area in each block is reduced, and the occurrence of the boundary due to the luminance difference is suppressed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a plasma display device according to a first embodiment of the present invention.

FIG. 2 is a PD in the plasma display device of FIG.
Diagram showing block division method for P

FIG. 3 is a timing chart showing drive voltages of scan electrodes and sustain electrodes in the PDP of FIG. 1;

FIG. 4 is a circuit diagram mainly showing a configuration of a scan driver in the plasma display device of FIG. 1;

FIG. 5 is a timing chart showing the operation of the scan driver of FIG. 4;

FIG. 6 is a circuit diagram mainly showing a configuration of a sustain driver in the plasma display device of FIG. 1;

FIG. 7 is a timing chart showing the operation of the sustain driver of FIG. 6;

FIG. 8 is a diagram showing another example of a PDP block dividing method.

FIG. 9 is a block diagram showing a configuration of a plasma display device according to a second embodiment of the present invention.

FIG. 10 is a diagram showing a connection between a scan driver IC and a scan electrode in the plasma display device of FIG. 9;

FIG. 11 is a block diagram showing a configuration of a main part of a plasma display device according to a third embodiment of the present invention.

FIG. 12 is a schematic sectional view of a three-electrode surface discharge cell in an AC type PDP.

FIG. 13 is a block diagram showing a configuration of a conventional plasma display device.

14 is a timing chart showing an example of a drive voltage of a scan electrode and a sustain electrode in the PDP of FIG.

FIG. 15 is a circuit diagram showing a configuration of the sustain driver of FIG. 13;

16 is a timing chart showing the operation of the sustain driver of FIG.

FIG. 17 is a block diagram showing a configuration of a plasma display device including two sustain drivers.

18 is a diagram for explaining a difference in luminance due to a difference in light emitting area of each block of the plasma display device of FIG.

FIG. 19 is a waveform chart for explaining a difference in the sum of discharge currents due to a difference in light emitting area in each block.

FIG. 20 is a waveform chart for explaining a difference in a decrease in the potential of a sustain pulse due to a difference in the sum of discharge currents.

[Explanation of symbols]

1 PDP 2 Data driver 3, 31, 32, 33, 34, 3A, 3B Scan driver 3a, 3a1, 3a2, 3a3, 3a4, 3a5, 3a
6, 3a7, 3a8 Scan driver IC 5 Control signal generation circuit 11 Address electrode 12 Scan electrode 13 Sustain electrode 41, 42, 43, 44, 4A, 4B Sustain driver BK1, BK2, BK3, BK4, bk1, bk2, b
k3, bk4 block

Claims (11)

[Claims] A plurality of first electrodes arranged in a first direction; a plurality of second electrodes arranged in a second direction intersecting the first direction; and a plurality of second electrodes. A plurality of third electrodes arranged in the second direction so as to be paired with the plurality of electrodes, respectively; and a plurality of the third electrodes, the plurality of first electrodes, the plurality of second electrodes and the plurality of third electrodes. A plurality of discharge cells provided at the intersection; a first voltage applying means for applying a first pulse voltage to a corresponding first electrode according to image data; a second voltage applying means for applying a second pulse voltage to the plurality of second electrodes; A second voltage applying unit that applies a pulse voltage; and a third voltage applying unit that applies a third pulse voltage to the plurality of third electrodes, wherein the plurality of third electrodes includes a plurality of blocks. And at least part of the third electrode of each block is divided into another one or two blocks. The third voltage applying means is provided corresponding to the plurality of blocks, and applies the third pulse voltage to the third electrodes of the corresponding blocks. A display device comprising a plurality of third voltage applying circuits. 2. The method according to claim 1, wherein the third electrodes of the two blocks are alternately positioned one or more at least in a region of a boundary between two adjacent blocks.
The display device according to the above. 3. The display device according to claim 1, wherein each of the plurality of blocks is divided into a plurality of sub-blocks, and sub-blocks of different blocks are arranged in order. 4. The plurality of second electrodes are divided into a plurality of groups, at least a portion of the second electrodes of each group is located between the other one or two groups of second electrodes, The second voltage applying means includes a plurality of second voltage applying circuits provided corresponding to the plurality of groups and applying the second pulse voltage to the second electrodes of the corresponding groups. The display device according to claim 1, further comprising: 5. The method according to claim 4, wherein one or more second electrodes of the two groups are alternately arranged in at least a boundary region between two adjacent groups.
The display device according to the above. 6. The display device according to claim 4, wherein each of the plurality of groups is divided into a plurality of subgroups, and subgroups of different groups are arranged in order. 7. A plurality of first electrodes arranged in a first direction; a plurality of second electrodes arranged in a second direction intersecting the first direction; and a plurality of second electrodes. A plurality of third electrodes arranged in the second direction so as to be paired with the plurality of electrodes, respectively; and a plurality of the third electrodes, the plurality of first electrodes, the plurality of second electrodes and the plurality of third electrodes. A plurality of discharge cells provided at the intersection; a first voltage applying means for applying a first pulse voltage to a corresponding first electrode according to image data; a second voltage applying means for applying a second pulse voltage to the plurality of second electrodes; A second voltage applying unit that applies a pulse voltage; and a third voltage applying unit that applies a third pulse voltage to the plurality of third electrodes, wherein the plurality of third electrodes includes a plurality of blocks. And the plurality of second electrodes are provided in a plurality of groups at positions different from the plurality of blocks. The third voltage applying means is provided in correspondence with the plurality of blocks, and each of the plurality of third voltage applying means applies the third pulse voltage to the third electrode of the corresponding block. A voltage application circuit, wherein the second voltage application means is provided corresponding to the plurality of groups, and each of the plurality of second voltage application means applies the second pulse voltage to the second electrodes of the corresponding group. 2. A display device comprising: the voltage application circuit according to claim 2; 8. Each of the plurality of second voltage applying circuits includes a plurality of driving integrated circuits, and the plurality of driving integrated circuits are connected to a plurality of second electrodes in a corresponding group. The at least some of the second electrodes of each group are arranged between the other one or two groups of second electrodes in the unit of the driving integrated circuit.
The display device according to any one of the above. 9. The second pulse voltage includes a write pulse applied to the plurality of second electrodes during a write period and a first sustain pulse applied to the plurality of second electrodes during a discharge sustain period. The method according to any one of claims 1 to 8, wherein the third pulse voltage includes a second sustain pulse applied to the plurality of third electrodes during the discharge sustain period. Display device. 10. A plurality of first electrodes arranged in a first direction, a plurality of second electrodes arranged in a second direction intersecting the first direction, and a plurality of second electrodes arranged in a second direction intersecting the first direction. A plurality of third electrodes arranged in the second direction so as to be paired with the plurality of electrodes, the plurality of first electrodes, and the plurality of second electrodes, respectively.
And a plurality of discharge cells provided at the intersections of the plurality of third electrodes and a plurality of discharge cells, wherein the first electrode corresponding to the first electrode corresponding to the image data First voltage applying means for applying a pulse voltage; second voltage applying means for applying a second pulse voltage to the plurality of second electrodes; and a third pulse voltage to the plurality of third electrodes. And a third voltage application unit that applies a voltage to the plurality of third electrodes, wherein the plurality of third electrodes are divided into a plurality of blocks, and at least a part of the third electrodes of each block includes A plurality of third voltage applying means provided between the third electrodes, the third voltage applying means being provided corresponding to the plurality of blocks, and applying the third pulse voltage to the third electrodes of the respective blocks. Characterized by including a third voltage application circuit of That the drive circuit. 11. A plurality of first electrodes arranged in a first direction, a plurality of second electrodes arranged in a second direction intersecting the first direction, and a plurality of second electrodes arranged in a second direction intersecting the first direction. A plurality of third electrodes arranged in the second direction so as to be paired with the plurality of electrodes, the plurality of first electrodes, and the plurality of second electrodes, respectively.
And a plurality of discharge cells provided at intersections of the plurality of third electrodes. A method of driving a display device, comprising: dividing the plurality of third electrodes into a plurality of blocks; At least a portion of the third electrode is located between the third electrodes of the other one or two blocks, and a first pulse voltage is applied to the corresponding first electrode according to the image data; A second electrode is provided on the plurality of second electrodes.
A driving method, wherein a third pulse voltage is applied to the third electrodes of the plurality of blocks by different voltage application circuits.