JP2000278616A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device for displaying a satisfactory image that the change of image pickup data does not appear without raising a driving frequency by controlling the length of one vertical scanning period in read driving of an image pickup means to become specified times the length of one vertical scanning period in the display driving of a display means. SOLUTION: The repetitive time of a VD of an image pickup system expresses one vertical scanning period in the driving of the circuit of the image pickup system and a video signal which is read from a CCD 13 in the period is written into an image memory 17 at prescribed timing. The repetitive time of the VD of a display system expresses the one vertical scanning period in the driving of the circuit of the display system and the length of repetitive time has the rate of 1/60 seconds or 1/50 seconds. The video signal is read from the picture memory 17 at the period and an image is displayed on an LCD 19. At that time, a system driving control circuit 21 controls an image pickup system driving circuit 14 so that the length of one vertical scanning period of the image pickup system becomes twice s long as the one vertical scanning period of the display system.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an imaging device such as an electronic still camera.

[0002]

2. Description of the Related Art FIG. 9 is a schematic view of an interline solid-state image pickup device used in a conventional image pickup apparatus. In the figure, 41 is a pixel, 42 is a vertical charge transfer element, 43 is a horizontal charge transfer element, 44 is an output unit, and 45 is a signal output terminal. The signal charge photoelectrically converted by the pixel 41 is
Sent to the vertical charge transfer element 42, the four-phase drive pulse φV
1, and are sequentially transferred in the direction of the horizontal charge transfer element 43 by φV2, φV3 and φV4. Horizontal charge transfer element 43
Transfers the signal charges for one horizontal line transferred from the vertical charge transfer element 42 to the output unit 44 by the two-phase driving pulses φH1 and φH2, and converts the signal charges into a voltage at the output unit 44 from the image signal output terminal 45. Is output. Further, the solid-state imaging device in FIG. 9 includes a plurality of columns of light-shielded pixels indicated by hatched portions 46 of the pixels 41, so-called optical black portions, and an output portion 44 of the horizontal charge transfer device 43. And a dummy bit indicated by a shaded portion 47 is provided immediately before.

FIG. 10 shows a block diagram of a conventional image pickup apparatus. 11 is a photographic lens, 12 is an aperture for controlling the amount of light of the subject, 13 is a solid-state imaging device for converting the subject image into an electric signal, for example, a CCD, 14 is an imaging system circuit,
That is, an imaging system driving circuit for driving a portion from the CCD 13 to writing of data to the image memory 17,
Reference numeral 5 denotes a CDS circuit for removing noise from a video signal output from the CCD, and an A / D converter for converting the output signal from an analog signal to a digital signal.
Is an imaging signal processing circuit for performing predetermined processing on a signal output from the CCD, 17 is an image memory, 18 is a predetermined signal capable of displaying a signal output from the image memory 17 on an image display device 19 described later. A display signal processing circuit 19 for converting an image into an image display device such as a liquid crystal display device (LC
D) and 20 are display-system circuits, that is, a display-system drive circuit for driving a portion from reading data from the image memory 17 to the LCD 19.

[0004] The operation of a conventional imaging apparatus will be described with reference to FIGS. The video signal output from the CCD 13 is a CD
The signal is converted into a digital signal by the S circuit and the A / D converter 15, subjected to predetermined processing by the imaging signal processing circuit 16, and input to the image memory 17. The image memory 17 converts the number of pixels in the horizontal direction and the number of lines in the vertical direction so that the input video signal can be displayed on the LCD 19 and supplies the converted signal to the display signal processing circuit 18.
D19 to convert the signal into a signal of a predetermined format that can be displayed on the LCD.
When supplied to the LCD 19, a video signal captured by the CCD 13 is displayed on the LCD 19.

[0005]

However, the number of pixels of the solid-state imaging device in the conventional imaging apparatus has been dramatically increased in recent years. Until now, reading of a video signal from a solid-state imaging device has been performed so that one vertical scanning period (one field) has a rate of, for example, 1/60 second. In order to read a video signal by using a CCD, the driving frequency of the solid-state imaging device must be increased, and the driving frequency of the subsequent CDS circuit and A / D converter must be increased. Circuit is required, leading to an increase in cost. If the frequency is too high, it may not be possible to cope with the problem.

Therefore, in practice, it is necessary to lower the driving frequency of the solid-state imaging device and the circuit at the subsequent stage for driving. However, in this case, the time required to read a video signal from the solid-state imaging device becomes longer. In addition, the length T1 of one vertical scanning period of the imaging system becomes longer than the length T2 of one vertical scanning period of the display system. In this case, since the time for writing data to the image memory and the time for reading data do not match, as is apparent from FIG. 11, the upper part of the screen is rewritten with new data, while the remaining part is old. There has been a problem that the switching portion of the data in the image memory is displayed on the LCD screen, such as when the data is displayed.

To solve this problem, the driving frequency of the display system is lowered to increase the length T3 of one vertical scanning period as shown in FIG. Although it is conceivable to make them coincide with each other, the rewriting cycle of the display image on the LCD becomes longer, which causes a problem that the image quality deteriorates such as flicker and a decrease in contrast.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image pickup apparatus capable of displaying a good image in which image data is not switched with a simple configuration without increasing the driving frequency and without deteriorating the image quality such as flicker. What you want to do.

[0009]

In order to achieve the above object, the present invention provides an image pickup means, a display means for displaying an image signal from the image pickup means, and one vertical scanning period in the read driving of the image pickup means. Control means for controlling the length to be twice the length of one vertical scanning period in display driving of the display means.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) An imaging apparatus according to a first embodiment of the present invention will be described with reference to FIGS. 1, 2 and 3. FIG.

FIG. 1 shows a block diagram of an imaging apparatus according to the present embodiment. In the figure, the components denoted by the same reference numerals as those in FIG. 10 indicate the same components. 1
Numeral 1 denotes a photographing lens, numeral 12 denotes an aperture for controlling the amount of light of a subject, numeral 13 denotes a solid-state imaging device for converting a subject image into an electric signal, for example, a CCD. The CCD used in the present embodiment is shown in FIG. Since it is the same as the conventional example shown in FIG. Reference numeral 14 denotes an imaging system driving circuit for driving a circuit of the imaging system, that is, a portion from the CCD 13 to writing of data into the image memory 17, and 15 denotes a circuit for removing noise of a video (image) signal output from the CCD. CDS circuit and A / D for converting output signal from analog signal to digital signal
A converter 16 is an imaging signal processing circuit for performing predetermined processing on the signal output from the CCD, 17 is an image memory, 18 is a predetermined signal capable of displaying the signal output from the image memory 17 on an image display device 19 described later. A display signal processing circuit for converting the image signal into an image display device 19, for example, a liquid crystal display device (LCD) 20 for driving a circuit of a display system, that is, a portion from reading data from the image memory 17 to the LCD 19; Is a system drive control circuit composed of a microcomputer or the like for controlling the driving of the imaging system drive circuit 14 and the display system drive circuit 20.

The operation of the imaging apparatus according to the present embodiment will be described with reference to FIG. The subject light incident through the photographing lens 11 and the aperture 12 is converted into an electric signal by the CCD 13. The CCD 13 is driven by a driving pulse supplied from the imaging system driving circuit 14 and outputs a video signal. The output video signal is converted from an analog signal into a digital signal after the noise is removed by the CDS circuit and the A / D converter 15, and further subjected to predetermined processing, for example, processing such as γ correction and white balance by the imaging signal processing circuit 16. And is supplied to the image memory 17. The image memory 17 converts the number of pixels in the horizontal direction and the number of lines in the vertical direction so that the input video signal can be displayed on the LCD 19, and supplies the converted signal to the display signal processing circuit 18. The display signal processing circuit 18 has an LCD 19
The signal is converted into a signal of a predetermined format that can be displayed on the LCD.
When supplied to the LCD 19, a video signal captured by the CCD 13 is displayed on the LCD 19.

FIG. 2 is a schematic diagram of the drive timing of the image pickup apparatus according to the present embodiment, and FIG. 3 is a detailed view of the drive timing of the image pickup system. A driving control method of the imaging apparatus according to the present embodiment will be described with reference to FIGS. 1, 2, and 3. FIG. In FIG. 2, a repetition time T4 of VD of the imaging system indicates one vertical scanning period in driving the circuit of the imaging system, and during this period, the video signal read from the CCD 13 is written into the image memory 17 at the timing shown in FIG. . The display system VD repetition time T2 indicates one vertical scanning period in driving the display system circuit. For example, the length of T2 is 1/60 seconds or 1/50 seconds. In this cycle, the video signal is read from the image memory 17 and an image is displayed on the LCD 19. At this time, the system drive control circuit 21 controls the image pickup system drive circuit 14 so that the length T4 of one vertical scan period of the image pickup system is twice as long as the length T2 of one vertical scan period of the display system. . At this time, the timing of the drive pulse output from the imaging system drive circuit 14 is as shown in FIG.
T4 indicates one vertical scanning period, the repetition time T5 of the imaging system HD indicates one horizontal scanning period, and φV
1 represents a four-phase drive pulse of the vertical charge transfer element 42 as a representative, and φH1 represents a two-phase drive pulse of the horizontal charge transfer element 43 as a representative. Reference numeral 31 denotes a charge reading pulse for reading the signal charges accumulated in the pixels 41 to the vertical charge transfer element 42. The CCD output is a video signal output from the CCD 13 when the CCD 13 is driven by the driving pulse shown in FIG. The output is shown. In FIG. 3, the charge read from the pixel 41 to the vertical charge transfer element 42 by the charge read pulse 31 at the time t1 is changed by the vertical transfer pulse φV1 output every horizontal scanning period from the time t2 to the horizontal charge transfer element 43. And the horizontal transfer pulse φ
The horizontal charge transfer element 43 is transferred in the horizontal direction by H1, and output from the signal output terminal 45. At this time CCD
Assuming that the number of lines of the video signal to be read from 13 is n lines, as shown in FIG.
Since the vertical transfer pulse φV1 must be output n times in order to read out the signal for the line, the system drive control circuit 21 controls the image pickup system drive circuit 14 so that n lines are output during the period from time t2 to time t0. The length T5 of one horizontal scanning period of the image pickup system is set so that the above signal can be read.

By driving the image pickup apparatus shown in FIG. 1 at the timings shown in FIGS. 2 and 3, the length of one vertical scan period in driving the image pickup system is reduced by one vertical scan period in drive of the display system. The length is twice as long, and the switching of the rewriting of the image on the memory can be performed in the vertical blanking period in which no image is displayed.

By doing so, even in an image pickup apparatus using a solid-state image pickup device having a large number of pixels, it is possible to view the switching of the image accompanying the rewriting of data in the memory on the LCD without increasing the driving frequency. In addition, it is possible to display a good image without image quality deterioration such as flicker.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
FIG. 4 is a drive timing chart of an imaging system of the imaging apparatus according to the embodiment. The block diagram of the imaging apparatus of the present embodiment is
Since this embodiment is the same as that of the embodiment shown in FIG. Further, the schematic diagram of the drive timing in this embodiment is as shown in FIG. 2 similarly to the first embodiment, and the length T4 of one vertical scanning period of the imaging system is one vertical scanning period of the display system. The length is twice the length of the scanning period T2. In the timing chart shown in FIG. 4, the same signals as those in FIG. 3 indicate the same signals. In the figure, the repetition time T4 of the imaging system VD indicates one vertical scanning period, the repetition time T6 of the imaging system HD indicates one horizontal scanning period, and φV1 represents a four-phase driving pulse of the vertical charge transfer element 42. ΦH1 represents a two-phase driving pulse of the horizontal charge transfer element 43 as a representative. Reference numeral 31 denotes a charge reading pulse for reading the signal charges accumulated in the pixels 41 to the vertical charge transfer element 42. The CCD output is a video signal output from the CCD 13 when the CCD 13 is driven by the driving pulse shown in FIG. The output is shown. In FIG. 4, the charge read from the pixel 41 to the vertical charge transfer element 42 by the charge readout pulse 31 at time t1 is 1 from time t2.
The signal is transferred to the horizontal charge transfer element 43 by a vertical transfer pulse φV1 output every horizontal scanning period, further transferred in the horizontal direction by the horizontal transfer pulse φH1, and output from a signal output terminal 45. . At this time, the length T6 of one horizontal scanning period is set shorter than the length T5 of the first embodiment. Therefore, the time required to read the signals for n lines is from time t2 to time t3, as shown in FIG. From time t3 to time t0, the length of one vertical scanning period is T
The drive pulse is output during the idle readout period for adjusting to 4, and is the same as during the normal readout period, that is, the period from time t2 to time t3. FIG. 5 shows a detailed timing chart around time t0 in the timing chart of FIG. In the figure, the length T7 of the last horizontal scanning period immediately before time t0
Is shorter than the length T6 of the previous horizontal scanning period. By adjusting the length of the last horizontal scanning period in this manner, the length T4 of the vertical scanning period is set to be twice as long as the length T2 of the vertical scanning period of the display system.
Therefore, although the length of T7 is shorter than T6 in FIG. 5, the present invention is not limited to this, and T7 may be the same length as T6, or T7 may be longer than T6. Needless to say, there is.

By doing so, the same effect as that of the first embodiment can be obtained, and when there is no need to display an image on the LCD, the idle readout period can be omitted. It is possible to shorten the time for reading the video signal from the solid-state imaging device.

(Third Embodiment) FIG. 6 shows a third embodiment of the present invention.
Circuit and A / D of the imaging apparatus according to the embodiment
FIG. 2 shows a block diagram of a converter. The overall block diagram of the imaging device of the present embodiment is the same as that of the first and second embodiments, and is shown in FIG. The block diagram in FIG. 6 corresponds to the CDS and A / D converter 15 in FIG. 6, reference numeral 151 denotes an input terminal of a video signal supplied from the CCD 13, 152 denotes an input terminal of a drive pulse supplied from an imaging system drive circuit, 153 denotes a CDS circuit,
54 is a CLAMP circuit, 155 is an A / D converter, 1
Reference numeral 56 denotes a digital signal output terminal. The operation of FIG. The video signal supplied from the CCD 13 via the input terminal 151 is input to the CDS circuit 153,
The DS circuit 153 removes noise from the video signal using the sample and hold pulses supplied from the fourteen imaging system drive circuits via the input terminal 152. Further, the output signal of the CDS circuit is supplied to the 154 CLAMP circuit,
The signal at the timing of the clamp pulse supplied from the second input terminal is clamped at a predetermined potential with the reference level as the reference level. That is, the clamp pulse has such a timing as to clamp the video signal of the optical black portion of the CCD 46 in FIG. 9 in order to use the video signal as a black-level reference signal. The output of the CLAMP circuit 154 is supplied to the A / D converter 155, which converts the analog signal into a digital signal having a predetermined number of bits and outputs the digital signal from the output terminal 156. FIG. 7 shows a drive timing chart of the imaging system according to the third embodiment of the present invention. The imaging system VD in FIG.
The respective timings of the imaging system HD, φV1, φH1, and CCD output are the same as those in FIG. 4 of the second embodiment, so that detailed description is omitted here. In the figure, OBCLP
What is shown as a pulse is the imaging system drive circuit 14.
15 shows the clamp pulse supplied to the CLAMP circuit 154 through the input terminal 152. In the imaging apparatus according to the present embodiment, as shown in FIG. 7, the clamp pulse for clamping the optical black portion is not only read during the normal reading period from time t2 to time t3, but is also read idle from time t3 to time t0. Is also output during the period. If the clamp pulse is not output during the idle readout, the potential of the clamp circuit is not stabilized during the idle readout. Therefore, even when the normal readout is started at time t2 and the supply of the clamp pulse is started, the black level is predetermined by the clamp circuit. It takes time for the potential to stabilize, and the image is displayed on the LCD. By outputting a clamp pulse also during the idle readout period, it is necessary to stabilize the black level during the idle readout period. Can be done.

By doing so, in addition to the same effects as those of the first and second embodiments, the reference black level of the video signal can be stabilized even during the idle readout period. A better image can be displayed on the LCD.

(Fourth Embodiment) FIG. 8 shows a fourth embodiment of the present invention.
9 shows an enlarged view of the drive timing of the imaging system in the embodiment. The drive timing of the imaging system according to this embodiment is the same as that of the third embodiment, and is shown in FIG. In FIG. 8, what is indicated by 32 is
9 is a video signal output of a dummy bit portion of the horizontal charge transfer element indicated by 47 of the CCD in FIG. 9, and a video signal output of an optical black portion indicated by 46 is indicated by 33. . In FIG. 8, in the normal read period before time t3, the clamp pulse has a timing for clamping the 33 optical black portions, and in the idle read period after time t3, it clamps the 32 dummy bit portions. The timing has come. Since the video signal read from the CCD during the idle readout does not include the optical black signal, the dummy bits are clamped during the idle readout to stably operate the clamp circuit. .

By doing so, it is possible to obtain the same effect as in the third embodiment, and to display a good image on the LCD by stabilizing the black level with higher accuracy. Become.

(Correspondence between the Invention and the Embodiment) In the above embodiment, the CCD 13 is used as the image pickup means of the present invention,
D19 is a display unit of the present invention, and the imaging system drive circuit 14 and the system drive control circuit 21 are a control unit of the present invention.
The MP circuits 154 each correspond to a clamp circuit of the present invention.

The above is the correspondence between each configuration of the embodiment and each configuration of the present invention. However, the present invention is not limited to the configuration of the embodiment and the functions described in the claims or Any configuration that can achieve the functions of the configuration of the embodiment can be applied.

For example, the software configuration and the hardware configuration of the above embodiment can be replaced as appropriate.

In the present invention, the above-described embodiments or their technical elements may be combined as necessary.

Further, the present invention may be applied to a case where all or a part of the configuration of the claim or the embodiment forms one device or is combined with another device. , Which may be a constituent element of the device.

Also, the present invention provides a video movie camera,
Video still cameras, cameras using silver halide film,
Various forms of cameras such as single-lens reflex cameras, lens shutter cameras, surveillance cameras, etc., as well as imaging devices other than cameras, optical devices, and other devices, as well as those cameras, imaging devices, optical devices, and other devices The present invention can also be applied to devices applied to the devices and to the elements constituting these devices.

[0029]

As described above, according to the present invention,
It is possible to provide an imaging apparatus capable of displaying a good image with no switching of imaging data with a simple configuration without increasing the driving frequency and without deteriorating image quality such as flicker.

[Brief description of the drawings]

FIG. 1 is a block diagram of an imaging device according to first to fourth embodiments of the present invention.

FIG. 2 is a schematic diagram of driving timing of the imaging device of FIG. 1;

FIG. 3 is a drive timing chart of an imaging system of the imaging device according to the first embodiment of the present invention.

FIG. 4 is a drive timing chart of an imaging system of an imaging device according to a second embodiment of the present invention.

FIG. 5 is an enlarged view of a drive timing diagram of an imaging system of an imaging device according to a second embodiment of the present invention.

FIG. 6 is a block diagram of a CDS circuit and an A / D converter according to a third embodiment of the present invention.

FIG. 7 is a drive timing diagram of an imaging system of an imaging device according to third and fourth embodiments of the present invention.

FIG. 8 is an enlarged view of a drive timing diagram of an imaging system of an imaging device according to a fourth embodiment of the present invention.

FIG. 9 is a schematic diagram of an interline solid-state imaging device according to the present invention and a conventional example.

FIG. 10 is a block diagram of a conventional imaging device.

FIG. 11 is a schematic diagram of driving timing of a conventional imaging device.

FIG. 12 is a schematic diagram of driving timing of a conventional imaging device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 11 photographing lens 12 aperture 13 CCD 14 imaging system drive circuit 15 CDS circuit and A / D converter 16 imaging signal processing circuit 17 image memory 18 display signal processing circuit 19 LCD 20 display system drive circuit 21 system drive control circuit 31 charge readout pulse 32 CCD output signal of dummy bit portion 33 CCD output signal of optical black portion 41 Pixel 42 Vertical charge transfer device 43 Horizontal charge transfer device 44 Output unit 45 Signal output terminal 46 Optical black 47 Dummy bit 151 CCD output input terminal 152 Drive pulse Input terminal 153 CDS circuit 154 CLAMP circuit 155 A / D converter 156 Digital signal output terminal

Claims (5)

[Claims] 1. An image pickup means, a display means for displaying an image signal from the image pickup means, and a length of one vertical scanning period in readout drive of the image pickup means, one vertical scan period in display drive of the display means. Control means for controlling the length to be twice the length of the imaging device. 2. The imaging apparatus according to claim 1, wherein said imaging means is an area sensor. 3. The image pickup device according to claim 1, wherein the control unit sets the length of one vertical scanning period in the readout drive of the image pickup unit to twice the length of one vertical scan period in the display drive of the display unit. 3. The imaging apparatus according to claim 2, wherein an idle readout period is provided in the readout drive of the means. 4. A clamp circuit for clamping a predetermined portion of an image signal output from the image pickup means to a predetermined voltage, wherein the control means controls the clamp circuit to perform the clamp operation during the idle readout. The imaging apparatus according to claim 3, wherein the imaging is performed. 5. The horizontal charge transfer device of the image pickup unit includes a plurality of dummy bits, and the control unit causes the clamp circuit to perform the clamp operation during a period of the dummy bit in the idle readout period. The imaging device according to claim 4, wherein: