JP2000259195A - Decode circuit and reproducing device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reproduce an encoded bit stream without generating noises at the time of decode parameter change by executing mute processing to a decoded signal after the change of a decode parameter. SOLUTION: When it is discriminated a decode parameter 35 is changed, a CPU 13 transmits an automatic mute instruction to the changed decode parameter to an automatic mute instruction part 24. When automatic mute is set to the changed decode parameter, the automatic mute instruction part 24 instructs the start of automatic mute processing to an automatic mute processing part 146. The automatic mute processing part 146 performs mute processing to a digital output signal 37. Therefore, the digital output signal 37 outputted by a signal processing part 145 is converted to soundless data. Afterwards, a decoded soundless signal is read out of an output buffer 15. This operation is continued until reset is indicated by the CPU 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a decoding circuit for decoding an encoded bit stream of an audio signal and a reproducing apparatus using the same.

[0002]

2. Description of the Related Art An encoded bit stream in an audio encoding system generally includes an audio encoded signal,
The header information is decoding information for decoding an audio encoded signal. The header information includes decoding parameters such as sampling frequency information, emphasis information, the number of channels, and channel mode information. For example, MPEG1 and 2 audio coding methods correspond to this. (ISO / IEC 11172-3:
1993 and ISO / IEC CD 13818-3.
2).

A reproducing apparatus for reproducing an encoded bit stream encoded as described above generally includes a decoding circuit for decoding the encoded bit stream to generate a digital output signal, and a decoding circuit for converting the decoded digital output signal to an analog signal. Peripheral circuits such as a DA converter for converting a signal, a media data extraction circuit for transferring an encoded bit stream from a medium in which the encoded bit stream is stored to a decoding circuit, and a CPU for controlling the entire playback device
Etc.

Among such playback devices, for example, MPE
The G1 audio encoded signal reproducing device 500 has a configuration shown in FIG. In FIG. 5, the MPEG1 standard audio bit stream extracted from the media data extraction circuit 531 is sent to the stream buffer 532 under the control of the CPU 533. The decoding circuit 534 starts decoding the audio bit stream in accordance with an instruction from the CPU 533.

[0005] Inside the decoding circuit 534, an audio bit stream is read by a stream reading unit 342. Then, the header analysis unit 343 extracts header information from the audio bit stream and performs header analysis to obtain decoding parameters such as sampling frequency information, layer information, and channel mode.

At this time, the sampling frequency information extracted by the header analysis section 343 is sent to the CPU 533 through the host interface section 341 and is sent to the CPU 533.
The setting of the DA converter 536 is performed by 533.

On the other hand, in the decoding circuit 534, after analyzing the header, the signal processing section 344 performs a decoding process on the audio coded signal based on the decoding parameter obtained by the header analyzing section 343. The digital output signal decoded by the signal processing unit 344 is output by the output unit 345 to the output buffer 53.
Sent to 5. The digital output signals held in the output buffer 535 are sequentially read out, converted to analog through a DA converter 536, and output to the outside.

[0008]

However, the reproducing apparatus having such a configuration has the following problems.

If the sampling frequency changes during reproduction, it is necessary to reset the sampling frequency of the DA converter. However, it is very difficult to reset the DA converter in synchronization with the decoding processing of the decoding processing circuit. Because it takes time to reset the DA converter,
This is because a delay time occurs until the CPU obtains information indicating that the sampling frequency has changed from the decoding circuit.

[0010] Actually, the decoding parameter change during decoding can occur due to a change in the track or channel of the reproduction stream, and the conventional tecode circuit and reproduction apparatus generate abnormal noise when such a decoding parameter change is performed. There is a problem.

[0011] For example, DVD format and STB
When reproducing a packetized coded bit stream with time stamp information added according to the (set-top box) format, a digital output signal decoded in synchronization with the time stamp information must be output.

If the encoded bit stream to be decoded is, for example, an MPEG standard audio stream, it indicates the sampling frequency information and layer information included in the decoding parameter of the header information of the encoded bit stream, and indicates the presence or absence of half-rate sampling. The number of output data samples per frame and the reproduction time vary depending on the ID information.

If these decoding parameters are changed during reproduction, the output of the decoded digital output signal in synchronism with the time stamp information without resetting the internal decoding process will cause abnormal noise. There is a problem that it occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of such a conventional problem, and has been made in consideration of the conventional problem. An object of the present invention is to provide a decoding circuit and a reproducing device using the same.

[0015]

A decoding circuit according to the present invention inputs a bit stream including an audio coded signal and header information for decoding the audio coded signal, and based on the header information. A decoding circuit for decoding the audio encoded signal, wherein at least one decoding parameter obtained from the header information;
A header analysis unit that outputs decoding parameter change information indicating whether or not the decoding parameter has been changed; a signal processing unit that decodes the audio encoded signal and outputs a decoded signal based on the decoding parameter; An automatic mute processing unit that performs a mute process on the decoded signal after the change of the decoding parameter, and an output unit that outputs a decoded signal output from the automatic mute processing unit, Objective is achieved.

[0016] The automatic mute processing section may execute the mute processing for a predetermined time.

[0017] The decoding circuit may further include a host interface unit for performing communication processing with the outside of the decoding circuit.

[0018] The host interface unit may include an automatic mute processing instruction means for setting whether or not the mute processing is required.

The decoding parameter includes sampling frequency information, the header analysis section outputs sampling frequency change information indicating whether or not the sampling frequency information has been changed, and the automatic mute processing section has the sampling frequency change information. The automatic mute processing instruction means may include a sampling frequency change automatic mute instruction means for setting whether or not the mute processing is required according to a change in the sampling frequency information.

The decoding parameter includes emphasis information, the header analysis section outputs emphasis change information indicating whether or not the emphasis information has been changed, and the automatic mute processing section has the emphasis change information based on the emphasis change information. The automatic mute processing instruction means may execute mute processing, and the automatic mute processing instruction means may include an emphasis change automatic mute instruction means for setting necessity of mute processing according to the change of the emphasis.

The decoding parameter includes channel mode information, the header analysis unit outputs channel mode change information indicating whether or not the channel mode information has been changed, and the automatic mute processing unit has the channel mode change information. The automatic mute processing instruction means may include a channel mode change automatic mute instruction means for setting whether or not the mute processing is required according to the change of the channel mode information.

[0022] The bit stream may include an MPEG audio encoded stream.

The decoding parameter includes layer information, the header analysis section outputs layer change information indicating whether or not the layer information has been changed, and the automatic mute processing section has a function of outputting the layer change information based on the layer change information. The automatic mute processing instruction means for executing a mute processing may include a layer change automatic mute instruction means for setting whether or not the mute processing is necessary according to the change of the layer information.

The decryption parameter includes ID information,
The header analysis unit outputs ID change information indicating whether or not the ID information has been changed, and the automatic mute processing unit performs the mute process based on the ID change information,
The automatic mute processing instruction means may include an ID change automatic mute instruction means for setting necessity of mute processing according to the change of the ID information.

The decoding circuit further includes an initialization section for automatically initializing decoding processing of the decoding circuit, and the host interface section controls the initialization section in response to a request from outside the decoding circuit. On the other hand, it may include initialization instruction means for instructing initialization of decoding processing of the decoding circuit.

The host interface unit includes a parameter display unit that outputs the decryption parameter to the outside;
A parameter change interrupt unit that outputs the decoding parameter change information to the outside.

The host interface unit includes an automatic mute timer setting unit capable of setting a timer setting time, and the automatic mute processing unit performs the mute processing for the timer setting time according to a change in the decoding parameter. May go.

The host interface unit includes an externally settable automatic mute release instructing unit. The automatic mute processing unit sets the automatic mute release instructing unit when the automatic mute release instructing unit is set. Good.

The decoding parameter includes sampling frequency information, the header analysis section outputs sampling frequency change information indicating whether or not the sampling frequency information has been changed, and the automatic mute processing section has the sampling frequency change information. The mute process may be executed based on

The decoding parameter includes emphasis information, the header analysis section outputs emphasis change information indicating whether or not the emphasis information has been changed, and the automatic mute processing section has the emphasis change information based on the emphasis change information. A mute process may be executed.

[0031] The decoding parameter includes channel mode information, the header analysis unit outputs channel mode change information indicating whether or not the channel mode information has been changed, and the automatic mute processing unit has the channel mode change information. The mute process may be executed based on

[0032] The bit stream may include an MPEG audio encoded stream.

[0033] The decoding parameter includes layer information, the header analysis unit outputs layer change information indicating whether or not the layer information has been changed, and the automatic mute processing unit has a function based on the layer change information. A mute process may be executed.

The decoding parameters include ID information,
The header analysis unit may output ID change information indicating whether or not the ID information has been changed, and the automatic mute processing unit may execute the mute process based on the ID change information.

A reproducing apparatus according to the present invention includes the decoding circuit according to the present invention, and a control circuit for controlling the decoding circuit, thereby achieving the above object.

[0036] The playback device may further include a media data extraction circuit that extracts the audio coded signal and the header information from the coded bit stream and outputs the extracted audio data and the header information to the decoding circuit.

[0037] The reproducing apparatus may further include a D / A converter for D / A converting the decoded signal output from the decoding circuit.

[0038] The control circuit may stop the operation of the media data extraction circuit based on the decoding parameter change information.

The control circuit may set a sampling frequency of the D / A converter based on the decoding parameter change information.

[0040] The control circuit may reset the decoding circuit based on the decoding parameter change information.

[0041] The control circuit may restart the operation of the media data extraction circuit based on the decoding parameter change information.

[0042]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A reproducing apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a basic configuration of a reproducing apparatus 100 according to the present embodiment. For the sake of simplicity, the playback device 100 according to the present embodiment is a playback device that extracts an MPEG audio encoded bit stream (hereinafter, also referred to as an “encoded bit stream”) from a specific medium and reproduces it. .

The encoded bit stream includes an encoded audio signal and header information. The header information includes a decoding parameter. The decoding parameters include sampling frequency, emphasis information, channel mode information, layer information, and ID information.

As for the decoding parameters of the encoded bit stream to be reproduced, it is assumed that the sampling frequency changes first during the reproduction, and then the layer information further changes.

In the audio bit stream of the MPEG standard, the sampling frequency indicated by the header information is:
When ID bit = 1, 44.1k / 48k / 32kHz
If any ID bit of z = 0, 22.05k /
24 kHz / 16 kHz.

The number of output data samples in one frame differs depending on the layer information indicated by the header information. For example, one layer has 384 samples, and layer 2 has 1152 samples.

Referring to FIG. 1, playback apparatus 100 includes a media data extraction circuit 11, a stream buffer 12, and a CP.
U13, a decoding circuit 14, an output buffer 15, and a DA converter 16 are included.

The decoding circuit 14 includes a stream reading section 143, a header analysis section 144, a signal processing section 145, an automatic mute processing section 146, an output section 147, a host interface section 141, and an initialization section 142.

Referring to FIGS. 1 and 2, host interface unit 141 includes an initialization instruction unit 21, a parameter display unit 22, a parameter change interrupt unit 23, an automatic mute instruction unit 24, and an automatic mute timer setting unit 25.
And an automatic mute release instruction unit 26.

The automatic mute instructing section 24 includes a sampling frequency change automatic mute instructing section 241, an ID change automatic mute instructing section 242, a layer change automatic mute instructing section 243, an emphasis change automatic mute instructing section 244, and a channel mode change automatic mute instructing section. 245.

In FIG. 1, a media data extraction circuit 1
1 extracts an encoded bit stream 32 from a broadcast wave such as STB or media data 31 of a specific medium such as a DVD disk, and outputs the encoded bit stream 32 to the stream buffer 12. The coded bit stream 32 includes a coded audio signal and header information.

The CPU 13 performs input / output, decoding, and control of data with respect to the reproducing apparatus 100. Decoding circuit 1
4 decodes the encoded audio signal 33 input to the stream buffer 12 based on an instruction from the CPU 13 and outputs the decoded digital output signal 37 to the output buffer 15.

The DA converter 16 reads the digital output signal 37 from the output buffer 15 based on the sampling frequency set by the CPU 13, converts the digital output signal 37 into an analog signal 34, and outputs it to the outside.

Next, the decoding circuit 14 will be described in detail.

The host interface unit 141 has a CP
It communicates with U13. The initialization processing unit 142
Upon receiving a reset instruction from the CPU 13 via the host interface unit 141, the stream reading unit 1
43, the header analysis unit 144, the signal processing unit 145, the automatic mute processing unit 146, and the output unit 147.
The stream reading unit 143 reads the coded bit stream 32 from the stream buffer 12.

The header analysis unit 144 extracts the header information 34 from the coded bit stream 32,
4 is analyzed, and a decoding parameter 35 is obtained from the header information 34. The header analysis unit 144 transmits the obtained decoding parameters 35 to the parameter display unit 22. When the decryption parameter 35 is changed, the header analysis unit 144 transmits to the parameter change interrupt unit 23 the interrupt information 36 on the changed parameter.

The signal processing unit 145 includes a header analyzing unit 144
A decoding process of the audio encoded signal 33 is performed based on the decoding parameter 35 obtained as described above to generate and output a digital output signal 37.

The automatic mute processing section 146 starts mute processing for the digital output signal 37 after the set decoding parameter is changed, based on the instruction to start the automatic mute processing from the automatic mute instruction section 24. . The output unit 147 receives the digital output signal 37 from the automatic mute processing unit 146, and outputs the digital output signal 37 to the output buffer 15.

The initialization instructing section 21 is provided by the CPU 13
Receiving the reset instruction from the
2 is instructed to reset the decode circuit 14. The parameter display unit 22 transmits the decoding parameter 35 extracted by the header analysis unit 144 to the CPU 13.
The parameter change interrupt unit 23 outputs the interrupt information 3 for notifying the change of the decoding parameter when the decoding parameter 35 extracted by the header analysis unit 144 is changed.
Send 6. The interrupt information 36 is processed by interrupting the processing of the CPU 13.

The CPU 13 sets an automatic mute instruction for the change of various decoding parameters to the automatic mute instruction section 24. The CPU 13 sets the automatic mute time for the automatic mute in the automatic mute timer setting section 25. When the set time elapses after the start of the mute process, the automatic mute processing unit 146 sets the automatic mute timer setting unit 25 to which the automatic mute time is set.
To the automatic mute release.

The CPU 13 sets the automatic mute release instruction means 26 to automatic mute release. When the automatic mute release is set by the CPU 13, the automatic mute release instruction means 26 instructs the automatic mute processing unit 146 to release the automatic mute.

Only one of the automatic mute timer setting means 25 and the automatic mute release instructing means 26 may be provided.

The CPU 13 sets in advance in the sampling frequency change automatic mute instructing means 241 whether or not automatic mute is necessary after the sampling frequency is changed. C
The PU 13 provides the ID change automatic mute instruction means 242 with:
The necessity of automatic mute after the ID change is set in advance.

The CPU 13 sets in advance the necessity of the automatic mute after the layer change in the layer change automatic mute instructing means 243. The CPU 13 sets in advance the necessity of automatic mute after the emphasis change in the emphasis change automatic mute instruction means 244. The CPU 13 sets in advance the necessity of the automatic mute after the channel mode change in the channel mode change automatic mute instructing means 245.

The operation of the thus-constructed reproducing apparatus 100 according to the present embodiment will be described with reference to the flowcharts of FIGS.

Upon receiving a reset instruction from the CPU 13 via the host interface unit 141, the initialization unit 142 resets the stream reading unit 143, the header analysis unit 144, the signal processing unit 145, the automatic mute processing unit 146, and the output unit 147. (S1).

The CPU 13 sets the sampling frequency change automatic mute instruction means 241 to automatic mute after the sampling frequency change (S2). At this point, it is assumed that automatic mute has not been set by changing the decoding parameters other than the sampling frequency. That is, it is assumed that automatic mute has not been set for the ID change automatic mute instruction means 242, the layer change automatic mute instruction means 243, the emphasis change automatic mute instruction means 244, and the channel mode change automatic mute instruction means 245.

The media data extraction circuit 11 includes a CPU 1
The coded bit stream 32 is output to the stream buffer 12 based on the instruction from S3 (S3). The decoding circuit 14 starts decoding the coded bit stream 32 input from the stream buffer 12.

First, the stream reading unit 143 reads the coded bit stream 32 from the stream buffer 12 (S4). The header analysis unit 144 extracts the header information 34 from the encoded bit stream 32, performs header analysis, and obtains a decoding parameter 35 (S5). The header analysis unit 144 determines whether the decoding parameter 35 has been changed (S6).

The header analysis section 144 decodes the decoding parameter 35
If there is a change in the parameter, the interrupt information 36 relating to the changed parameter is transmitted to the parameter change interrupt unit 23. The parameter change interrupt unit 23 transmits the interrupt information 36 to the CPU 13. Interrupt information 36
Is processed by interrupting the processing of the CPU 13 (S7).

The header analysis section 144 decodes the decoding parameter 35
Is transmitted to the parameter display unit 22. The parameter display unit 22 sends the sent decoding parameter 35 to the CPU 13 (S8).

Next, it is determined whether or not the automatic mute processing unit 146 is executing the automatic mute processing (S).
9). When it is determined that the automatic mute processing unit 146 is performing the automatic mute processing (YES in S9),
It is determined whether automatic mute release is set for the automatic mute release instruction means 26 (S10).

If it is determined that automatic mute release has not been set for the automatic mute release instructing means 26 (NO in S10), the automatic mute timer setting section 25 sets the automatic mute time at the time of automatic mute. It is determined whether or not it has been performed (S11).

If it is determined that the automatic mute time has been set (YES in S11), the time during which the automatic mute processing unit 146 executed the automatic mute (timer time)
Is shorter than the automatic mute time set in the automatic mute timer setting section 25 (S1).
2). If it is determined that the timer time is not shorter than the automatic mute time set in the automatic mute timer setting section 25 (NO in S12), the automatic mute timer setting section 25 sets the time set after the start of the mute process. Has elapsed, the automatic mute processing unit 146 is instructed to cancel automatic mute. The automatic mute processing unit 146 instructed to cancel the automatic mute ends the execution of the automatic mute processing (S13).

When it is determined that the automatic mute release is set for the automatic mute release instruction section 26 (S10)
In this case, the automatic mute release instruction unit 26 instructs the automatic mute processing unit 146 to release the automatic mute. The automatic mute processing unit 146 instructed by the automatic mute release instruction unit 26 to release the automatic mute ends the execution of the automatic mute processing (S14).

When it is determined that the automatic mute processing unit 146 is not executing the automatic mute processing (NO in S9),
When it is determined that the automatic mute time in the automatic mute is not set in the automatic mute timer setting section 25 (NO in S11), the timer time is longer than the automatic mute time set in the automatic mute timer setting section 25. If it is determined that the time is short (YES in S12), or if the automatic mute processing unit 146 instructed to release the automatic mute by the automatic mute release instructing unit 26 ends the execution of the automatic mute processing (S14), the CPU 13 It is determined whether or not the decoding parameter 35 has been changed (S15).

If it is determined that the decoding parameter 35 has been changed (YES in S15), the CPU 13 transmits an automatic mute instruction for the changed decoding parameter to the automatic mute instruction section 24 (S16).

The automatic mute instructing section 24 determines whether or not automatic mute is set for the changed decoding parameter (S17). When the automatic mute for the changed decoding parameter is set (YES in S17), the automatic mute instruction unit 24 instructs the automatic mute processing unit 146 to start the automatic mute processing (S18).

When it is determined that the decoding parameter 35 has not been changed (NO in S15), when the automatic mute for the changed decoding parameter has not been set (NO in S17), or when the automatic mute instructing unit 24 sets the automatic mute to If the processing unit 146 is instructed to start the automatic mute processing (S18), the signal processing unit 145
Performs a decoding process on the audio coded signal 33 based on the decoding parameter 35 obtained by the header analysis unit 144 to generate and output a digital output signal 37 (S1).
9).

It is determined whether or not the automatic mute processing section 146 has instructed the automatic mute processing section 146 to start automatic mute processing (S20). When it is determined that the instruction to start the automatic mute processing has been issued (YES in S20), the automatic mute processing unit 146 performs mute processing on the digital output signal 37 (S2).
1).

When it is determined that the automatic mute processing unit 146 has not instructed the automatic mute processing from the automatic mute instruction unit 24 (NO in S20), or the automatic mute processing unit 146 ,
When the mute process is performed (S21), the output unit 14
7 is a digital output signal 37 for automatically mute processing unit 14
6 and output to the output buffer 15 (S2
2).

It is determined whether a reset instruction of CPU 13 is issued (S23). When it is determined that the reset instruction of the CPU 13 is performed (YES in S23),
Return to S1. When it is determined that the reset instruction of the CPU 13 is not performed (NO in S23), the process returns to S4.

The output section 147 outputs the digital output signal 3
7 is output to the output buffer 15 (S22), it is determined whether or not the reset instruction of the CPU 13 is performed (S23). However, it is determined whether or not the reset instruction of the CPU 13 is performed. The timing to be performed is not limited to this.

As described above, when the automatic mute is not performed and the decoding parameter is not changed, the reproduction apparatus 10
0 operates as follows.

In step S 19, the signal processing unit 145 performs a decoding process on the audio coded signal 33 in the coded bit stream 32 based on the decoding parameters obtained by the header analysis unit 144, and calculates a digital output signal 37. .

In the automatic mute processing section 146, since the change of each decoding parameter has not yet occurred and the automatic mute is off (NO in step S20), the output section is not subjected to the mute processing of the digital output signal 37. 14
7 The output unit 147 outputs the decoded digital output signal 37 to the output buffer 15 (Step S22).

Thereafter, the digital output signal 37 decoded by the decoding circuit 14 by the DA converter 16
Is read from the output buffer 15, converted into an analog signal, and output to the outside. Unless a reset instruction is issued by the CPU 13, the process returns to step S4 and the decoding process of the encoded bit stream 32 read from the stream reading unit 143 is performed until the decoding parameter is changed.
Repeated frame by frame.

The operation of the reproducing apparatus 100 when the sampling frequency of the decoding parameters changes during reproduction will be described.

As described above, the decoding process is performed for each frame of the input coded bit stream 32. First, after the encoded bit stream 32 is read from the stream buffer 12 by the stream reading unit 143, header information is extracted and header analyzed by the header analysis unit 144, and the decoding parameter 35 is obtained.

At this time, the header analysis unit 144 compares the decoding parameters analyzed in steps S6 and S7 with the decoding parameters obtained in the previous frame, recognizes that the sampling frequency has been changed, and recognizes that the host interface has changed. To each of the parameter change interrupt unit 23 and the parameter display unit 22 of the unit 141, the interrupt information 36 indicating the change of the sampling frequency and the sampling frequency (decoding parameter 35) obtained by analyzing the header of this frame are sent.

The parameter display section 22 of the host interface section 41 transmits the decoding parameter 35 to the CPU 13 in step S8.

If the automatic mute is not being performed, the process proceeds from steps S9 and S15 to S16, and the CPU 13 transmits an automatic mute instruction for the changed sampling frequency to the automatic mute instruction section 24 (S16).

Then, in step S17, it is determined whether or not the automatic mute for the changed parameter is set, and if it is set, step S1 is performed.
In step 8, the automatic mute is turned on, and the automatic mute processing unit 146 is instructed to perform mute processing.

The signal processing unit 145 includes a header analyzing unit 144
Coded signal 33 in the coded bit stream 32 based on the decoding parameters 35 obtained by
And outputs a digital output signal 37.

Since the automatic mute is set for the change parameter, the automatic mute is turned on in step S18. Therefore, the digital output signal 37 output by the signal processing unit 145 is
6, mute processing is performed (step S21),
Converted to silent data.

Accordingly, the output section 147 outputs a silent signal to the output buffer 15 as a digital output signal 37. Thereafter, the decoded silence signal is output to the output buffer 15.
And converted into an analog signal by the DA converter 16 and output to the outside. This operation is performed by the CPU
13 until a reset instruction is issued.

On the other hand, the CPU 13 receives the information indicating the change of the sampling frequency from the interrupt information 36 from the parameter change
2, the changed sampling frequency is received.

Next, the CPU 13 causes the media data extraction circuit 11 to stop inputting the coded bit stream 32 to the stream buffer 12,
The A converter 16 is set by the changed sampling frequency obtained by the parameter display unit 22.

Thereafter, when the setting of the DA converter 16 is completed, the CPU 13 instructs the decode circuit 14 to reset the decode via the host interface 141, and instructs the media data extracting circuit 11 to reset the decode.
The input of the encoded bit stream 32 to the stream buffer 12 is restarted.

The decoding circuit 14 thereafter receives a decoder reset instruction through the initialization instruction section 21 of the host interface 141, as in the operation at the start of decoding, and returns to step S1 to return to the initialization section 1
42, the decoding circuit 14 is internally reset.
Resume decoding.

Next, the operation when the layer information in the decoding parameter 35 changes during reproduction will be described. In this embodiment, as described above, the CPU 13 instructs the decoding circuit 14 in advance to the sampling frequency change automatic mute instructing unit 241 inside the host interface 141 so as to execute automatic mute when the sampling frequency is changed. ing. However, no automatic mute instruction is made by changing other decoding parameters. The decoding operation by the decoding circuit 14 is repeatedly performed in frame units of the input coded bit stream 32 in the same manner as described above.

First, the stream reading unit 143
Encoding bit stream 3 from stream buffer 12
After 2 is read, in step S5, header information extraction and header analysis are performed by the header analysis unit 144, and decoding parameters are extracted.

Then, in step S6, the header analyzer 144
Compares the analyzed decoding parameter with the decoding parameter obtained in the previous frame, recognizes that the layer information has changed, and in step S7, changes the parameter change interrupt unit 2 of the host interface unit 141.
3 and the parameter display unit 22, the interrupt information 36 indicating the change of the layer information and the layer information (decoding parameter 35) obtained by analyzing the header of this frame are sent.

The parameter change interrupting unit 23 and the parameter display unit 24 transmit the interrupt information 36 indicating the change of the layer information and the layer information (decoding parameter 35) to the CPU 13 in step S8.

However, since automatic mute is not set in the layer change automatic mute instructing means 243,
The mute process is not instructed to the automatic mute processing unit 146 (NO in S17).

In the signal processing unit 145, the header analysis unit 14
4, the audio encoded signal 33 in the encoded bit stream 32 based on the decoding parameter 35 obtained by
And outputs a digital output signal 37.

In the automatic mute processing section 146, although the change of the layer information has occurred, the automatic mute is not set in the layer change automatic mute instructing section 243 by the CPU 13, and the Since the automatic mute start instruction is not received, the digital output signal 37 is sent to the output unit 147 without performing the mute process.

The output section 147 outputs the digital output signal 37.
Is output to the output buffer 15. Thereafter, the digital output signal 37 decoded by the decoding circuit 14 is read from the output buffer 15 by the DA converter 16 and
It is converted to an analog signal and output to the outside.

In the reproducing apparatus 100 of the present embodiment, an example has been described in which the automatic mute processing by the decoding circuit 14 is performed only when the sampling frequency is changed, but the present invention is not limited to this.
Only by changing the automatic mute setting for each decoding parameter in the initial operation of the CPU 13, the automatic mute process can be freely executed every time each decoding parameter is changed.

For example, if automatic mute is set in the layer change automatic mute instructing section 243 from the CPU 13, the layer change automatic mute instructing section 243 sends an automatic mute instruction to the automatic mute processing section 146 when the layer information is changed. Since the mute start instruction is executed, the automatic mute processing unit 146 executes the automatic mute processing on the digital output signal 37. The digital output signal 37 that has been subjected to the automatic mute processing is sent to the output unit 147.

Of the decoding parameters described in the present embodiment, the resetting of the DA converter 16 is necessarily required for the sampling frequency, emphasis, and ID (half rate), and is not necessarily required in the layer and channel modes. Absent.

If the decoding circuit 14 includes an up-sampling process at the time of half-rate reproduction, it is unnecessary to reset the DA converter 16 when the ID is changed.

As described above, the CPU 13 is the DA converter 1
6 for a decoding parameter change that needs to be reset
If the reset of the decoding circuit 14 is performed after the resetting of the A-converter 16 is completed, the parameter can be surely changed without generating abnormal noise.

On the other hand, parameter changes that do not require the DA converter 16 to be reset, for example, layer and channel mode changes, and I / O when the decoding circuit 14 includes an upsampling process during half-rate reproduction.
For changing D, it is not always necessary to set automatic mute.

If the decoding circuit 14 is a decoding circuit corresponding to the reproduction of a bit stream to which a time stamp is added, for example, most DVD format disks, the CPU 13 needs to change the time management data. Reset may be performed only for a change in the decoding parameter. For other decoding parameters, only the automatic mute may be released using the automatic mute timer setting unit 25 and the automatic mute release instruction unit 26.

For example, among the decoding parameters shown in the present embodiment, the decoding parameter change that requires the change of the time management data is a change of the sampling frequency, ID, and layer.

For example, the automatic mute timer setting means 25
If the automatic mute timer is set in step S9, the process proceeds from step S9 or S10 to step S11, where the automatic mute timer is set. In step S12, the timer time is compared with the mute time. If the timer has not reached the mute time, the process proceeds to step S15. If the timer has reached the mute time, the process proceeds to step S13.
Go to to turn off the automatic mute. In this way, the mute process can be automatically canceled after a predetermined time.

When the automatic mute release is set by the automatic mute release instructing means 26, the process proceeds from step S10 to step S14 to turn off the automatic mute. By doing so, the mute process can be automatically canceled.

In the present embodiment, the fade processing in the operation before the automatic mute processing and after the reset has not been described. However, the fade-out processing immediately before the automatic mute processing and the fade-in processing at the restart after the automatic mute processing are performed. Can also be added. It goes without saying that a more effective automatic mute operation can be performed by adding a fade-in process and a fade-out process.

However, it is necessary to set the fade-in process and the fade-out process to be performed after analyzing the header of the next frame.

In the present embodiment, the case where the automatic mute processing is canceled by an internal reset of the decode circuit 14 is described. However, the initialization instructing means 21 is provided inside the host interface unit 141 in the present embodiment.
In addition, an automatic mute timer setting unit 25 and an automatic mute release instructing unit 26 are also provided, so that the operation of the mute process and the reset process can be selectively used depending on when each decoding parameter is changed. By properly using these processes, more effective mute processing and reset processing can be performed.

For example, the time required for resetting the DA converter 16 is set in advance in the automatic mute timer setting means 25, and when only the emphasis which does not require the internal reset of the decoding circuit 14 is changed, the automatic mute operation is performed. After starting, automatic mute timer setting means 2
The automatic mute may be automatically canceled after the time required for resetting the DA converter 16 set in step 5 has elapsed.

If it is sufficient to mute only during the transition period corresponding to the delay time of the band combining filter, such as when changing the channel mode, the automatic mute may be released by the mute release instruction means 26 immediately after detecting the start of automatic mute. .

Normally, the decoding circuit 14 in the present embodiment
Is an LSI or DSP for media decoding,
In a reproducing apparatus such as this embodiment, it is often positioned as an independent part of the reproducing system, and in most cases, it is developed separately and independently of the CPU that controls the entire reproducing system. .

As described above, the decoding circuit 14 is independent of L
If the SI has been designed in advance, the decoding circuit 14 is configured to have general versatility for automatic mute processing and reset processing when the decoding parameter is changed, as in the present embodiment.
Compatibility with can be increased. By using such a decoding circuit, as a result, the design of the reproducing apparatus can be facilitated.

As described above, according to the present embodiment, there is provided an automatic mute processing section for performing mute processing on a digital output signal after a change of at least one of the decoding parameters obtained by the header analysis section. Thus, the mute process can be performed in a timely manner immediately after the decoding parameter is changed.

Further, according to the present embodiment, by providing an automatic mute processing unit for performing a mute process for a fixed time according to a change in at least one of the decoding parameters obtained by the header analysis unit, Immediately after the time, the mute process can be performed in a timely manner for a fixed time.

Further, according to the present embodiment, an automatic mute instructing unit 24 for setting necessity of mute processing according to a change in a certain decoding parameter is provided by the host interface unit 1.
With the provision of No. 4, the mute process can be performed only when the decoding parameter specified externally in advance is changed.

Further, according to the present embodiment, the initialization section 142 for automatically initializing the decoding processing, the parameter display section 22 provided inside the host interface section 14, the parameter change interrupt section 23, and the initialization instruction section 21 With this arrangement, the mute process can be started in a timely manner immediately after the decoding parameter is changed, and the decoding circuit can be initialized after an elapse of an arbitrary time.

Further, according to the present embodiment, by providing automatic mute processing section 146 for performing mute processing based on the change in sampling frequency information obtained by the header analysis section, timely immediately after the sampling frequency change is provided. Mute processing can be performed.

Further, according to the present embodiment, by providing the automatic mute processing section 146 for performing mute processing according to the change of the emphasis information obtained by the header analysis section 144, the mute can be timely performed immediately after the emphasis change. Processing can be performed.

Further, according to the present embodiment, the automatic mute processing section 146 which performs mute processing according to the change in the channel mode information obtained by the header analysis section 144.
Is provided, the mute processing can be performed in a timely manner immediately after the channel mode change.

Further, according to the present embodiment, by providing the automatic mute processing section 146 for performing mute processing in accordance with the change in the layer information obtained by the header analysis section 144, the mute can be timely performed immediately after the layer change. Processing can be performed.

Further, according to the present embodiment, by providing automatic mute processing section 146 for performing mute processing in response to a change in ID information obtained by header analysis section 144, timely mute immediately after ID change. Processing can be performed.

Further, according to the present embodiment, CPU 13
And a time set by the automatic mute timer setting unit 25 of the host interface unit 141 based on a change in at least one of the decoding parameters obtained by the header analysis unit 144. By providing the automatic mute processing unit 146 that performs mute processing for minutes, it is possible to perform mute processing for a time set by the automatic mute timer setting unit 25 from the CPU 13 in a timely manner immediately after parameter change.

Further, according to the present embodiment, CPU 13
And an automatic mute release instructing unit 2 of the host interface unit 141 in accordance with a change in at least one of the decoding parameters obtained by the header analysis unit 144.
Until the automatic mute release is set to 6, the automatic mute is started in a timely manner immediately after the decoding parameter change by providing the automatic mute processing unit 146 for performing the mute processing, and the automatic mute release from the CPU 13 is performed. Mute processing can be performed until the mute release instruction is issued by the instruction unit 26.

Further, according to the present embodiment, by using the decoding circuit 14 to reproduce the coded bit stream 32 of the audio signal, no abnormal noise is generated even after the decoding parameter is changed. Playback device 10
0 can be provided.

[0138]

As described above, according to the present invention, an encoded bit stream decoding circuit capable of reproducing an encoded bit stream without generating abnormal noise when a decoding parameter is changed, and a reproducing apparatus using the same. Can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a playback device according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a host interface unit according to the present embodiment.

FIG. 3 is a flowchart (part 1) illustrating an operation of the decoding circuit according to the present embodiment;

FIG. 4 is a flowchart (part 2) illustrating an operation of the decoding circuit according to the present embodiment;

FIG. 5 is a block diagram illustrating a configuration example of a conventional playback device.

[Explanation of symbols]

 14 Decoding section 144 Header analysis section 145 Signal processing section 146 Automatic mute processing section 147 Output section

Continuing from the front page (72) Inventor Masahiro Sueyoshi 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Inventor Shuji Miyasaka 1006 Okadoma Kazuma Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd. (72) Inventor Person Shoji Matsumoto 1006 Kadoma Kadoma, Kadoma City, Osaka Prefecture (72) Inside the Matsushita Electric Industrial Co., Ltd. (72) Inventor Akihisa Kawamura 1006 Kadoma Kadoma, Kadoma City, Osaka Prefecture Inside the Matsushita Electric Industrial Co., Ltd. (72) Kazutoshi Abe Kazuma Abe, Osaka Pref. 1006 Kadoma Matsushita Electric Industrial Co., Ltd.

Claims (27)

[Claims] 1. A decoding circuit for receiving a bit stream including an audio encoded signal and header information for decoding the audio encoded signal, and decoding the audio encoded signal based on the header information. A header analysis unit that outputs at least one decoding parameter obtained from the header information and decoding parameter change information indicating whether or not the decoding parameter has been changed; and, based on the decoding parameter, A signal processing unit that decodes and outputs a decoded signal; an automatic mute processing unit that performs mute processing on the decoded signal after the decoding parameter is changed; and a decoding that is output from the automatic mute processing unit. A decoding circuit comprising: an output unit that outputs a signal; 2. The decoding circuit according to claim 1, wherein said automatic mute processing unit executes said mute processing for a predetermined time. 3. The decoding circuit according to claim 1, wherein the decoding circuit further includes a host interface unit that performs a communication process with a control circuit that controls the decoding circuit. 4. The decoding circuit according to claim 3, wherein said host interface unit includes an automatic mute processing instruction means for setting whether or not said mute processing is required. 5. The decoding parameter includes sampling frequency information, the header analysis unit outputs sampling frequency change information indicating whether or not the sampling frequency information has changed, and the automatic mute processing unit has the sampling frequency information. The mute process is performed based on change information, and the automatic mute process instructing unit includes a sampling frequency change automatic mute instructing unit in which necessity of the mute process according to a change in the sampling frequency information is set. 4. The decoding circuit according to 4. 6. The decoding parameter includes emphasis information, the header analysis unit outputs emphasis change information indicating whether or not the emphasis information has been changed, and the automatic mute processing unit has a function based on the emphasis change information. 5. The decoding circuit according to claim 4, wherein said mute processing is executed by said automatic mute processing instruction means, and said automatic mute processing instruction means includes an emphasis change automatic mute instruction means for setting necessity of mute processing in accordance with said emphasis change. 7. The decoding parameter includes channel mode information, the header analysis unit outputs channel mode change information indicating whether the channel mode information has been changed, and the automatic mute processing unit has the channel mode information. The mute processing is performed based on change information, and the automatic mute processing instruction means includes a channel mode change automatic mute instruction means in which necessity of mute processing according to the change of the channel mode information is set. 4. The decoding circuit according to 4. 8. The decoding circuit according to claim 4, wherein said bit stream includes an MPEG audio encoded stream. 9. The decoding parameter includes layer information, the header analysis unit outputs layer change information indicating whether or not the layer information has been changed, and the automatic mute processing unit has a function based on the layer change information. 9. The decoding circuit according to claim 8, wherein said mute processing is executed by said automatic mute processing instruction means, and said automatic mute processing instruction means includes a layer change automatic mute instruction means for setting necessity of mute processing according to a change of said layer information. 10. The decoding parameter includes ID information, the header analysis section outputs ID change information indicating whether or not the ID information has been changed, and the automatic mute processing section has a function based on the ID change information. 9. The decoding circuit according to claim 8, wherein said mute processing is performed by said automatic mute processing instruction means, and said automatic mute processing instruction means includes ID change automatic mute instruction means for setting necessity of mute processing in accordance with change of said ID information. 11. The decoding circuit further includes an initialization unit for automatically initializing a decoding process of the decoding circuit, and the host interface unit controls the initialization unit in response to a request from the control circuit. 4. The decoding circuit according to claim 3, further comprising initialization instruction means for instructing the decoding circuit to initialize a decoding process. 12. The host interface unit includes: a parameter display unit that outputs the decoding parameter to the control circuit; and a parameter change interrupt unit that outputs the decoding parameter change information to the control circuit. The described decoding circuit. 13. The host interface unit includes an automatic mute timer setting unit that can set a timer setting time, and the automatic mute processing unit ends the mute processing based on an instruction from the automatic mute timer setting unit. 4. The decoding circuit according to claim 3, wherein 14. The host interface unit includes an automatic mute release instruction unit that can be set from the control circuit. The automatic mute processing unit performs the mute processing based on an instruction from the automatic mute release instruction unit. 4. The decoding circuit according to claim 3, wherein the decoding is terminated. 15. The decoding parameter includes sampling frequency information, the header analysis unit outputs sampling frequency change information indicating whether or not the sampling frequency information has been changed, and the automatic mute processing unit has the sampling frequency information. 2. The decoding circuit according to claim 1, wherein said mute processing is started based on change information. 16. The decoding parameter includes emphasis information; the header analysis unit outputs emphasis change information indicating whether or not the emphasis information has been changed; and the automatic mute processing unit has a function based on the emphasis change information. The decoding circuit according to claim 1, wherein the mute processing is started by using the decoding circuit. 17. The decoding parameter includes channel mode information, the header analysis unit outputs channel mode change information indicating whether or not the channel mode information has been changed, and the automatic mute processing unit has the channel mode information. 2. The decoding circuit according to claim 1, wherein said mute processing is started based on change information. 18. The decoding circuit according to claim 1, wherein said bit stream includes an MPEG audio encoded stream. 19. The decoding parameter includes layer information, the header analysis unit outputs layer change information indicating whether or not the layer information has been changed, and the automatic mute processing unit has a function based on the layer change information. 20. The decoding circuit according to claim 18, wherein said mute processing is started by performing the following. 20. The decoding parameter includes ID information, the header analysis unit outputs ID change information indicating whether or not the ID information has been changed, and the automatic mute processing unit has a function based on the ID change information. 20. The decoding circuit according to claim 18, wherein said mute processing is started by performing the following. 21. A reproducing apparatus comprising: the decoding circuit according to claim 1; and a control circuit that controls the decoding circuit. 22. The playback device according to claim 21, wherein the playback device further includes a media data extraction circuit that extracts the audio coded signal and the header information from the coded bit stream and outputs the extracted audio data and the header information to the decoding circuit. . 23. The playback device according to claim 22, wherein the playback device further includes a D / A converter that performs D / A conversion on the decoded signal output from the decoding circuit. 24. The playback device according to claim 23, wherein the control circuit stops the operation of the media data extraction circuit based on the decoding parameter change information. 25. The reproducing apparatus according to claim 23, wherein the control circuit sets a sampling frequency of the D / A converter based on the decoding parameter change information. 26. The control circuit resets the decoding circuit based on the decoding parameter change information.
A playback device according to claim 23. 27. The playback device according to claim 23, wherein the control circuit restarts the operation of the media data extraction circuit based on the decoding parameter change information.