JP2000252489A - Integrated silicon thin-film photoelectric conversion device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an integrated silicon thin-film photoelectric conversion device that has improved photoelectric conversion characteristics and can generate a high voltage and high output. SOLUTION: In an integrated silicon thin-film photoelectric conversion device, a reverse side electrode layer 2, a silicon photoelectric conversion unit layer 3A, and a second electrode layer 4 that are laminated successively on an insulation substrate 1 are separated by a plurality of separation grooves 2a and 4a that are essentially straight and are in parallel each other so that a plurality of photoelectric conversion cells can be formed, the cells are electrically connected in series via a groove 3a for connection that penetrates the photoelectric conversion unit layer 3A, the photoelectric conversion unit layer 3A contains a one conductivity type layer and essentially intrinsic semiconductor layer and an opposite conductivity type layer that are laminated successively, and a region ranging from 1 to 300 μm from the side wall of the groove for connection is set to a high-resistance region with a smaller volume crystallization fraction as compared with the photoelectric conversion region that is the other remaining region.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a thin-film photoelectric conversion device, and more particularly to integration of a photoelectric conversion cell including at least one crystalline silicon-based photoelectric conversion unit layer, and characteristics of the integrated silicon-based thin-film photoelectric conversion device. It is about improvement. In the specification of the present application, the terms “polycrystalline”, “microcrystal”, and “crystalline” partially include an amorphous state as generally used in the technical field of a thin film photoelectric conversion device. Things also mean things.

[0002]

2. Description of the Related Art In recent years, in addition to a photoelectric conversion device using an amorphous silicon thin film, development of a crystalline photoelectric conversion device using a thin film containing crystalline silicon such as polycrystalline silicon or microcrystalline silicon has been vigorously performed. It is being done. These developments attempt to achieve both low cost and high performance of a photoelectric conversion device by forming a high-quality crystalline silicon thin film on an inexpensive substrate by a low-temperature process. Applications to various photoelectric conversion devices such as sensors are expected.

When manufacturing a large-area solar cell capable of producing high output at a high voltage, an amorphous silicon-based thin-film solar cell is obtained by connecting a plurality of solar cells formed on a plurality of large substrates in series. In order to improve the yield, it is better to divide a solar cell formed on one large substrate into a plurality of cells and connect those cells electrically in series for integration. General. In particular, in order to reduce the loss due to the resistance of the oxide transparent electrode, the transparent electrode is processed into a strip having a predetermined width using a laser beam, and each cell is connected in series in a direction orthogonal to the longitudinal direction of the strip. In general, they are integrated.

FIG. 2 is a schematic sectional partial view showing a typical example of such an integrated amorphous thin film solar cell. Note that, in each drawing of the present application, for clarification and simplification of the drawing, dimensional relationships such as length and thickness do not reflect actual dimensional relationships.

In an integrated amorphous solar cell, first,
A first electrode layer 2 on a substrate 1 having at least an insulating surface;
Is formed by a vapor deposition method. This first electrode layer 2
Are separated into a plurality of strip-shaped first electrodes by a plurality of first electrode separation grooves 2a formed by laser scribe. That is, the plurality of first electrode separation grooves 2a extend parallel to each other in a direction perpendicular to the paper surface of FIG.

An amorphous semiconductor layer 3 is formed on the first electrode layer 2 and the isolation trench 2a by a vapor deposition method so as to cover them. The semiconductor layer 3 includes a sequentially stacked one conductivity type layer, a substantially intrinsic semiconductor layer acting as a photoelectric conversion layer, and a reverse conductivity type layer. The semiconductor layer 3 is
Similarly to the first electrode layer 2, the semiconductor layer is divided into a plurality of band-shaped semiconductor regions by a plurality of semiconductor layer dividing grooves 3a formed by laser scribe. That is, these semiconductor layer dividing grooves 3
a also extend in parallel with each other in a direction perpendicular to the paper surface of FIG.

A second electrode layer 4 is formed on the semiconductor layer 3 and the division groove 3a by a vapor deposition method so as to cover them. The second electrode layer 4 is also separated into a plurality of band-shaped second electrodes by a plurality of second electrode separation grooves 4a formed by laser scribe. That is, these second electrode separation grooves 4a also extend parallel to each other in a direction perpendicular to the paper surface of FIG.

In this way, a plurality of strip-shaped photoelectric conversion cells extending in a direction perpendicular to the plane of FIG. 2 are formed. At this time,
Since the semiconductor layer dividing groove 3a is filled with the same conductive material as the second electrode layer 4, the second electrode 4 of any one cell is electrically connected to the first electrode 2 of the cell adjacent to the right side. ing. That is, the semiconductor layer division groove 3a functions as an electric connection groove, and an integrated amorphous thin film solar cell in which a plurality of cells are electrically connected in series in the left and right directions is obtained.

[0009]

In the integrated thin-film solar cell as described above, the first electrode layer 2 on the insulating substrate 1 is provided.
The first electrode separation groove 2a for separating the semiconductor layer is filled with the semiconductor layer 3 and makes unnecessary contact through the semiconductor layer 3 in a direction parallel to the substrate. The conductor formed in the connection groove 3 a for connecting a plurality of cells in series is in contact with the entire side surface of the semiconductor layer 3. However, since the thickness of the semiconductor layer in the amorphous thin-film solar cell is very thin and the resistance of the amorphous silicon itself is high, so-called side leakage due to current flowing through unnecessary contact portions as described above. Does not occur, and the current flows almost completely in the direction of the thickness of the semiconductor layer 3, so that the unnecessary contact as described above hardly adversely affects the performance of the solar cell.

However, in the conventional crystalline silicon-based thin film solar cell, since the crystal grains in the semiconductor layer grow randomly in various directions, the crystal grains are uniform and good in all directions in the crystalline semiconductor layer. There is a problem that it has conductivity and the side leakage of the current passing through the unnecessary contact portion as described above cannot be ignored, and the performance of the solar cell is thereby reduced.

Due to the above problems, a plurality of crystalline silicon-based thin-film photoelectric conversion cells are not integrated on one substrate in the past, and a plurality of crystalline silicon-based thin film photoelectric conversion cells are formed on individual substrates with comb electrodes. It is inconvenient because it is not possible to automate a manufacturing process of a large-area solar cell which is connected in series by soldering a lead wire to the photoelectric conversion unit described above and which can generate high output at high voltage.

The present invention has been made in view of the above-mentioned problems of the prior art, and aims to reduce crystal grain boundaries and defects in a flow in a crystalline silicon-based thin film semiconductor layer by using only a low-temperature process in which an inexpensive substrate can be used. Another object of the present invention is to provide a large-area integrated silicon-based thin-film photoelectric conversion device capable of producing high voltage and high output with excellent photoelectric conversion efficiency.

[0013]

In the silicon-based thin-film photoelectric conversion device according to the present invention, the first electrode layer, the silicon-based photoelectric conversion unit layer, and the second electrode layer, which are sequentially laminated on an insulating substrate, are composed of a plurality of photoelectric layers. Connection grooves that are separated by a plurality of substantially linear and parallel separation grooves so as to form conversion cells, and the plurality of cells are parallel to the separation grooves and penetrate the photoelectric conversion unit layer. Are electrically connected to each other in series, and the photoelectric conversion unit layer includes a sequentially stacked one conductivity type layer, a substantially intrinsic semiconductor layer, and a reverse conductivity type layer, at least in the intrinsic semiconductor layer. 10 to 300 μm from the side wall of the connection groove
The region up to the range of m is characterized in that it is a high-resistance region having a smaller volume crystallization fraction than the other remaining region, ie, the photoelectric conversion region.

Further, in the method of manufacturing an integrated silicon-based thin film photoelectric conversion device according to the present invention, one of
Plasma C at a base temperature of 350 ° C. or less
After being formed as an amorphous layer by the VD method, a region to be a base for a photoelectric conversion region deposited by a plasma CVD method also at a base temperature of 350 ° C. or lower is subjected to annealing by pulsed laser irradiation. It is characterized by being crystallized.

[0015]

FIG. 1 is a schematic sectional partial view of an integrated silicon-based thin film photoelectric conversion device as an example of an embodiment of the present invention.

In the thin film photoelectric conversion device according to the present invention, first, as the substrate 1, a metal such as stainless steel whose surface is insulated, an organic film having a low coefficient of expansion such as polyimide, or an inexpensive glass having a low melting point. Etc. can be used. As the first electrode layer 2 disposed on the substrate 1, a conductive layer including at least one of the following thin films (A) and (B) can be formed by a vacuum evaporation method, a sputtering method, or the like. (A) Ti, Cr, Al, Ag, Au, Cu and P
A metal thin film including a layer made of at least one metal selected from t or an alloy thereof. (B) A transparent conductive thin film including a layer made of at least one oxide selected from ITO, SnO ₂ and ZnO.

In the first electrode layer 2, the first electrode separation groove 2 a is formed by a laser scribe method or a mechanical scribe method in order to divide the first electrode layer 2 into a plurality of regions corresponding to a plurality of integrated photoelectric conversion cells. It is formed. These first electrode separation grooves 2 extend linearly in a direction perpendicular to the paper surface of FIG. As a laser used for the laser scribe method, a laser oscillated from a generally known laser such as YAG, a dye, and an excimer can be used.
Further, in the mechanical scribe method, a diamond pen, a metal needle, etc., a metal film, a transparent conductive oxide film,
And a sharper material having a higher hardness than a silicon-based thin film can be used.

On the first electrode layer 2, first, a layer of one conductivity type included in the silicon-based thin-film photoelectric conversion unit layer 3A is formed by 35
It is deposited as an amorphous layer by a plasma CVD method under a base temperature of 0 ° C. or less. As this one conductivity type layer,
For example, an n-type silicon-based thin film doped with 0.01% by atom or more of phosphorus which is a conductivity type determining impurity atom can be used. However, these conditions for the one conductivity type semiconductor layer are not limited, and for example, an alloy material such as silicon carbide or silicon germanium can be used instead of silicon. The thickness of the one conductivity type layer is preferably in the range of 5 to 50 nm,
More preferably, it is within the range of 30 nm.

The one conductivity type layer deposited as an amorphous layer comprises:
Crystallization is performed by laser annealing within a range corresponding to the region 3b included in the semiconductor photoelectric conversion unit layer 3A. Such laser annealing can be performed by irradiating the one-conductivity-type layer with a laser beam in a direction perpendicular to the plane of FIG. As a result, in the one conductivity type layer, a region within the width 3b that has been laser-annealed is crystallized, but a region within the width 3c that has not been laser-annealed remains amorphous and has a high electric power. It has a resistance value.

For laser annealing, a pulse laser having a high energy density can be preferably used. In this case, a laser spot having a certain area is scanned in a pulse shape in a direction perpendicular to the plane of FIG. At this time, the width of the laser spot is preferably equal to the annealing width 3b or equal to an integer fraction thereof from the viewpoint of scanning efficiency.

The laser-annealed 1 as described above
A silicon-based thin film of a substantially intrinsic semiconductor for functioning as a photoelectric conversion layer is formed on the conductive type layer by plasma CVD.
Deposited by the method. As the substantially intrinsic semiconductor layer, a non-doped i-type or a silicon-based thin film having a weak p-type or weak n-type containing a small amount of impurities and having a sufficient photoelectric conversion function can be used. In addition, the intrinsic semiconductor layer is not limited to these, and a film of an alloy material such as silicon carbide or silicon germanium may be used. The thickness of the intrinsic semiconductor layer is preferably in the range of 0.3 to 20 μm, and more preferably in the range of 0.5 to 10 μm.

As a condition for depositing the intrinsic semiconductor layer by the plasma CVD method, the base temperature is set to 350 ° C. or less. The plasma reaction gas contains silane-based gas and hydrogen gas as main components. The flow rate ratio of the hydrogen gas to the silane-based gas is preferably in the range of 100 to 500 times when a normal parallel plate type plasma discharge electrode is used, but the electrode area is increased and the electrode shape is optimized. ,
The frequency can be reduced to about 30 times by optimizing the frequency of the high frequency power. Similarly, the plasma discharge power is 50 mW / cm ² when a normal parallel plate type electrode is used.
Although it is preferable that the above is 30 mW / c by optimizing the area and shape of the electrode and optimizing the frequency of high frequency.
m ² . The pressure of the plasma reaction gas is set to 5 Torr or more. Then, the intrinsic semiconductor layer can be deposited at a rate of 0.7 μm / hr or more in the thickness direction under such plasma CVD conditions.

At this time, in the range of width 3b, since the one conductivity type layer serving as the underlayer is crystallized by laser annealing, the intrinsic semiconductor layer deposited thereon is also covered with the crystal grains contained in the underlayer. , And grow as a crystalline layer containing crystals grown in the thickness direction. On the other hand, since the crystal nuclei do not exist in the range of width 3c where the one conductivity type layer is left amorphous, the intrinsic semiconductor layer has much more amorphous portions than the region of width 3b. Is deposited as a high-resistance region.

Most of the crystal grains contained in the crystalline region having a width of 3b in the intrinsic semiconductor layer grow in a columnar manner in the thickness direction from the underlying layer. Many of these grains have a (110) preferred crystal orientation plane parallel to the film plane, and the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in X-ray diffraction is 1/8 or less. , 1/10 or less. In addition, the intrinsic semiconductor layer has a temperature of 350 ° C.
Since it is deposited at a low temperature below, it contains a large amount of hydrogen atoms that terminate or inactivate defects in crystal grain boundaries and grains, and its hydrogen content is in the range of 0.1 to 30 atomic%. More preferably, it is within the range of 20 atomic%.

On the intrinsic semiconductor layer, a conductive semiconductor layer of a type opposite to the one conductive layer is deposited by a plasma CVD method. As the reverse conductivity type layer, for example, a p-type silicon layer or the like doped with boron, which is a conductivity type determining impurity atom, by 0.01 atomic% or more can be used. However, these conditions for the reverse conductivity type impurity layer are not limited, and the impurity atoms may be, for example, aluminum or the like, or a layer of an alloy material such as silicon carbide or silicon germanium. The thickness of the opposite conductivity type layer is preferably in the range of 5 to 30 nm, and more preferably in the range of 5 to 15 nm.

As described above, in the photoelectric conversion unit layer 3A including the one conductivity type layer, the substantially intrinsic semiconductor layer, and the opposite conductivity type layer which are sequentially stacked, the photoelectric conversion cells adjacent to the left and right are electrically connected. A connection opening groove 3a for making a serial connection is formed by a laser scribe method or a mechanical scribe method. These connection grooves 3a are also shown in FIG.
And extends linearly in a direction perpendicular to the plane of the drawing.

Then, the second electrode layer 4 is formed by a vapor deposition method so as to fill the connection groove 3a and cover the photoelectric conversion unit layer 3A. As in the case of the first electrode layer 2,
The second electrode separation groove 4a is formed by a laser scribe method or a mechanical scribe method corresponding to the plurality of photoelectric conversion cells. Thus, an integrated silicon-based thin-film photoelectric conversion device in which a plurality of strip-shaped photoelectric conversion cells extending in a direction perpendicular to the paper surface of FIG. 1 are connected in series in the left-right direction is completed.

In the integrated silicon-based thin film photoelectric conversion device as shown in FIG.
Since the region of width 3c included in A is a high-resistance region containing a large amount of amorphous silicon, side leakage in a conventional integrated silicon-based thin film photoelectric conversion device including a crystalline photoelectric conversion layer is prevented. If such side leakage is prevented, the fill factor is mainly improved in the output characteristics of the photoelectric conversion device, and the photoelectric conversion efficiency is accordingly improved.

The width 3c of the high-resistance region is preferably as large as possible to prevent side leakage, but since a photoelectric conversion function cannot be expected in this portion, if the width is too large, the effective light receiving area in the integrated photoelectric conversion device is reduced. And the overall photoelectric conversion efficiency is reduced.
Therefore, as a preferable criterion for determining the width 3c of the high resistance region, the width 3c of the high resistance region is 10 to 10
It is preferably limited to the range of 300 μm, and 10
More preferably, it is within the range of 100 μm.

The width of the strip-shaped photoelectric conversion cell is determined by the resistance value of the transparent oxide electrode used therein, the current value required for a single cell, and the like. When the width of each cell is increased, the loss of the light receiving area due to the area required for the separation grooves 2a and 4a and the connection groove 3a is reduced, but the loss due to the increase in the resistance due to the increase in the width of the transparent electrode is reduced. growing. Therefore, usually, the width of the strip-shaped photoelectric conversion cell is 5
It is set within the range of ２０20 mm.

The reverse conductivity type layer may be formed entirely as a microcrystalline silicon film, but since it is very thin, the influence on side leakage can be almost ignored. However, if the microcrystalline reverse conductivity type layer is made thicker, it may naturally cause some side leakage. In order to avoid such a problem of side leakage, the reverse conductivity type layer is preferably in the range of 5 to 30 nm, and more preferably in the range of 5 to 15 nm, as described above.

In the above embodiment, an integrated silicon thin film photoelectric conversion device including a single photoelectric conversion unit layer has been described.
Needless to say, a tandem-type integrated thin-film photoelectric conversion device in which a well-known amorphous photoelectric conversion unit layer or the like is further laminated on the above may be used.

[0033]

The present invention will be described more specifically by describing embodiments of the present invention together with some reference examples.

Reference Example 1 As Reference Example 1, an integrated silicon thin film solar cell having the same structure as that shown in FIG. 2 but having a semiconductor layer 3 formed of a crystalline semiconductor layer is used. A battery was made. First, an Ag film having a thickness of 300 nm and a ZnO film having a thickness of 100 nm were deposited as a back electrode layer 2 on a glass substrate 1 in this order by a sputtering method. Then, the back electrode layer 2 was laser scribed in the air to form a plurality of back electrode separation grooves 2a.

On the back electrode layer 2, a phosphorus-doped n-type microcrystalline silicon layer, a non-doped polycrystalline silicon photoelectric conversion layer, and a p-type microcrystalline silicon layer are formed in this order by plasma CV.
The photoelectric conversion unit layer 3 containing a nip junction was deposited by the D method.

The n-type microcrystalline silicon layer is made of RF plasma C
It was deposited to a thickness of 10 nm by the VD method under the following conditions. That is, the flow rate of the reaction gas is 5 sccm for silane, 200 sccm for hydrogen, and 0.05 sccm for phosphine, and the pressure in the reaction chamber is 1 Torr.
Was set to The RF power density is 150 mW / c
m ² , and the film formation temperature was 200 ° C. A thickness of 300 n deposited directly on a glass substrate under the same film forming conditions
The dark conductivity of the n-type microcrystalline silicon film of m is 10 S / cm
Met.

The polycrystalline silicon photoelectric conversion layer formed on the n-type microcrystalline silicon layer has an RF power of 450 mW / cm ² at a base temperature of 350 ° C. and a reaction gas pressure of 10 Torr by a plasma CVD method. Apply 3μm
Deposited to a thickness of. In the thus-formed substantially intrinsic polycrystalline silicon photoelectric conversion layer, the hydrogen content determined by secondary ion mass spectrometry was 5 atomic%, and the hydrogen content was (111) relative to the (220) diffraction peak in X-ray diffraction. ) The intensity ratio of the diffraction peak was 1/4.

On the photoelectric conversion layer, a p-type microcrystalline silicon layer was deposited by RF plasma CVD to a thickness of 10 μm under the following conditions. That is, the flow rate of the reaction gas is 1 sccm for silane and 500 sccc for hydrogen.
m, and diborane were 0.1 sccm, and other conditions were the same as those of the n-type microcrystalline silicon layer.

The photoelectric conversion unit layer 3 thus formed
In, a plurality of connection grooves 3a penetrating the semiconductor layer was formed by laser scribe in the atmosphere.

Further, an ITO film having a thickness of 80 nm was formed as a transparent electrode layer 4 by a sputtering method so as to fill the connection grooves 3a and cover the photoelectric conversion unit layer 3. Also in this transparent electrode layer 4, a plurality of transparent electrode separation grooves 4a are formed by laser scribe in the atmosphere.
Was formed.

The laser beam for forming the separation grooves 2a and 4a and the connection groove 3a was incident not from the substrate side but from the film surface side. In addition, the finally formed crystalline silicon-based solar cell is formed by stacking 10 strip-shaped photoelectric conversion cells in series.

When the integrated crystalline silicon-based thin-film solar cell according to Reference Example 1 was irradiated with AM1.5 light at an amount of 100 mW / cm ² as incident light, the open-circuit voltage was as follows. 4.60V, short circuit current density is 2
The fill factor was 5.9 mA / cm ² , the fill factor was 65.4%, and the conversion efficiency was 7.8%. Similarly, a light degradation test was performed on the solar cell of Reference Example 1 by irradiating AM1.5 light at 48 ° C. with a light amount of 100 mW / cm ² , and the conversion efficiency was 7.7 even after irradiation for 550 hours. 8%
And there was almost no light deterioration. This indicates that the crystalline silicon-based photoelectric conversion unit layer is less likely to cause light degradation.

REFERENCE EXAMPLE 2 Similar to Reference Example 1, as Reference Example 2, an integrated crystalline silicon thin film solar cell was manufactured. That is, also in the solar cell of this reference example, the back electrode layer 2 and the back electrode separation groove 2a were formed on the glass substrate 1 as in the first embodiment.

However, in the solar cell of Reference Example 2, an n-type amorphous silicon layer having a thickness of 30 nm was first deposited as a one conductivity type layer covering the back electrode layer 2 by a plasma CVD method. As the plasma CVD conditions at this time, the substrate temperature was 200 ° C. and the reaction chamber pressure was 1.0 Torr.
r, the RF power is 15 mW / cm ² , and the flow rate of the reaction gas is 5 sccm for silane and ² sccm for hydrogen.
cm and phosphine was 0.01 sccm.

This n-type amorphous silicon layer was converted into an n-type crystalline silicon layer by pulse laser annealing in the air. The pulse laser light source used at this time was a KrF excimer laser having a wavelength of 248 nm, a pulse time width of about 25 nsc and 70 mJ / cm.
Had an energy density of ² . The dark conductivity of an n-type crystalline silicon film having a thickness of 300 nm formed directly on a glass substrate using the same plasma CVD conditions and pulse laser annealing conditions was 4 × 10 ² S / cm. .

The n-type amorphous silicon layer has a CV
When taken out of the reaction chamber into the atmosphere, its surface is slightly naturally oxidized. However, during annealing by pulse laser irradiation, hydrogen contained in the n-type amorphous silicon film is diffused and released to the outside, and the hydrogen reduces the oxide film on the surface once. Thereafter, the surface of the n-type silicon layer crystallized by laser annealing is oxidized again by the air, and an extremely thin silicon oxide film is formed. In Reference Example 2, such an extremely thin natural oxide film can function as a crystal orientation control layer for a photoelectric conversion layer formed thereon.

That is, when a photoelectric conversion layer is deposited on an n-type microcrystalline silicon layer via an extremely thin silicon oxide film on its surface, the crystal orientation of the photoelectric conversion layer is significantly improved. However, at this time the reason is not always clear. Although a silicon-based oxide film is known as a typical insulating film, the present inventors have empirically found that this extremely thin oxide film does not inhibit the current in the photoelectric conversion device according to the present invention. . This is thought to be due to the fact that the oxide film has a knitted structure after the photoelectric conversion layer is deposited because the oxide film is extremely thin, or a tunnel effect due to the extremely thin oxide film. It can be considered that a current can flow, but at this time, the reason is not always clear.

N crystallized by laser annealing
On the mold silicon layer, under the same conditions as in Reference Example 1,
Crystalline silicon photoelectric conversion layer, reverse conductivity type layer, and transparent I
TO electrodes were sequentially formed. Thus, an integrated nip type solar cell as Reference Example 2 was obtained.

In the crystalline silicon photoelectric conversion layer included in the solar cell of Reference Example 2, the hydrogen content determined by secondary ion mass spectrometry was 4 atomic%, and the (220) diffraction peak in X-ray diffraction The intensity ratio of the (111) diffraction peak to 1 was 1/9.

The output characteristics when the integrated silicon-based thin-film solar cell according to Reference Example 2 is irradiated with light under the same conditions as in Reference Example 1 have an open-circuit voltage of 5.37.
V, short-circuit current density was 26.7 mA / cm ² , fill factor was 64.8%, and conversion efficiency was 9.3%.

That is, it can be seen that the solar cell of Reference Example 2 has significantly improved photoelectric conversion characteristics as compared with Reference Example 1. The reason for this is that, in Reference Example 2, since the crystal contained in the crystalline silicon photoelectric conversion layer grows in a columnar shape so that the <110> direction is perpendicular to the substrate, the thickness of the photoelectric conversion layer This is considered to be because the crystal grain boundaries extending in parallel to the vertical direction act to suppress side leakage. That is, in the integrated crystalline silicon solar cell of Reference Example 2, although the photoelectric conversion layer is a crystalline material having good conductivity, the crystal grains contained therein extend in a columnar shape in the thickness direction. It is considered that the layer has low resistance to current in the thickness direction, but acts as a high resistance layer to current in the direction parallel to the film surface.

EXAMPLE As an example, an integrated crystalline silicon thin film solar cell as shown in FIG. 1 was manufactured. The manufacturing conditions of the solar cell of this embodiment are different from those of the reference example 2 only in that the n-type amorphous silicon layer is crystallized by laser annealing only in the region of width 3b. At this time, the width 3c of the non-annealed zone was 400 μm.

The output characteristics when the solar cell thus formed was irradiated with light under the same conditions as in the case of Reference Example 2 had an open-end voltage of 5.34 V and a short-circuit current density of 26.5 mA / cm ² , fill factor 70.
3% and the conversion efficiency was 9.9%. That is,
It can be seen that the fill factor of the integrated crystalline silicon thin film solar cell according to the example is particularly improved as compared with the solar cell of Reference Example 2, and as a result, the conversion efficiency is also clearly improved.

[0054]

As described above, according to the present invention, it is possible to provide an integrated silicon-based thin-film photoelectric conversion device having excellent photoelectric conversion characteristics and producing high output at high voltage.

[Brief description of the drawings]

FIG. 1 is a schematic sectional partial view showing an integrated silicon-based thin film photoelectric conversion device according to an example of an embodiment of the present invention.

FIG. 2 is a schematic sectional partial view showing an example of a typical structure of an integrated thin film photoelectric conversion device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Substrate of glass etc. 2 1st electrode layer 2a 1st electrode separation groove 3, 3A Semiconductor photoelectric conversion unit layer 3a Electrical connection groove 3b 1 conductive layer contained in photoelectric conversion unit layer 3A changes from amorphous by laser annealing. Width of region to be crystallized 3c Width of region where one conductivity type layer included in photoelectric conversion unit layer 3A remains amorphous and has high resistance without being laser-annealed 4 Second electrode layer 4a Second Electrode separation groove

Claims (8)

[Claims] 1. A first electrode layer, a silicon-based photoelectric conversion unit layer, and a second electrode layer, which are sequentially stacked on an insulating substrate, are substantially linear and parallel to each other so as to form a plurality of photoelectric conversion cells. Separated by a plurality of separation grooves,
Further, the plurality of cells are electrically connected to each other in series via a connection groove that is parallel to the separation groove and penetrates the photoelectric conversion unit layer, and the photoelectric conversion unit layers are sequentially stacked in one conductivity type. A photoelectric conversion region including at least a region of 1 to 300 μm from the side wall of the connection groove in the intrinsic semiconductor layer, wherein the region includes a layer and a substantially intrinsic semiconductor layer and a reverse conductivity type layer. An integrated silicon-based thin-film photoelectric conversion device, wherein the integrated silicon-based thin-film photoelectric conversion device is formed in a high-resistance region having a smaller volume crystallization fraction than that of (1). 2. The photoelectric conversion region contained in the intrinsic semiconductor layer has a volume crystallization fraction of 80% or more, and 0.1 to 3%.
2. The integrated silicon-based thin film photoelectric conversion device according to claim 1, wherein the integrated silicon-based thin film photoelectric conversion device has a hydrogen content in a range of 0 atomic% and a thickness in a range of 0.5 to 5 [mu] m. 3. The photoelectric conversion region has a preferential crystal orientation plane of (110) parallel to the film plane, and the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in X-ray diffraction is 1/8. The integrated silicon-based thin-film photoelectric conversion device according to claim 1 or 2, wherein: 4. The integrated silicon-based thin-film photoelectric conversion device is of a tandem type including at least another silicon-based photoelectric conversion unit layer laminated in addition to the silicon-based photoelectric conversion unit layer. Claim 1
4. The integrated silicon-based thin-film photoelectric conversion device according to any one of items 3 to 3. 5. The method for manufacturing an integrated silicon-based thin-film photoelectric conversion device according to claim 1, wherein the first conductivity type layer has a base temperature of 350 ° C. or less. After being formed as an amorphous layer by the plasma CVD method, a region to be a base for the photoelectric conversion region, which is also deposited by the plasma CVD method, is crystallized by annealing by irradiation with a pulse laser. A method for manufacturing a thin-film photoelectric conversion device, comprising: 6. The method according to claim 5, wherein the pulse laser has a short wavelength of 400 nm or less and an energy density of 50 mJ / cm ² or more. 7. The method according to claim 7, wherein the substantially intrinsic semiconductor layer is deposited by a plasma CVD method under the condition that an underlayer temperature is 350 ° C. or less and a silane-based gas is contained as a main component of a gas introduced into the plasma reaction chamber. A flow rate ratio of the hydrogen gas to the silane-based gas is within a range of 30 to 500 times, a pressure in the reaction chamber is 5 Torr or more, and a plasma discharge power density is set to 30 mW / cm ² or more. The method according to claim 5, wherein the deposition rate is 0.7 μm / hr or more in the thickness direction. 8. The thin-film photoelectric conversion device according to claim 5, wherein the separation groove or the connection groove is formed by laser scribe, mechanical scribe, or photolithography. Device manufacturing method.