JP2000250624A - Monitoring system for intra-device state - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize the load that is applied on a control processor contained in a data communication controller when the control processor monitors periodically the state of every unit. SOLUTION: The state signals of the units 80-8K whose states are monitored are fetched into a control unit 5 after a control processor 6 contained in a data communication controller 170 starts a state monitoring operation. Thus, the change of the state signal of every unit is detected together with the inactive state of every unit. The change of the state signal of every unit fetched into the unit 5 is notified to the processor 6 by an interrupt. If a signal whose state change has not to be detected is included in the state signals of the units, the state change of the relevant signal is not detected and the occurrence of interrupts are evaded as much as possible when the state changes of signals are detected. Then the state monitoring operation is stopped according to the state (such as the occurrence of a fault) of the unit 5 where the processor 6 is mounted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an internal state monitoring system for monitoring the state of each unit (including a control unit) from a control unit in a data communication control apparatus including a control unit and a plurality of other units. .

[0002]

2. Description of the Related Art In this kind of conventional technology, in an information processing system including a terminal central control device and a plurality of terminal devices, the terminal central control device efficiently polls the terminal devices. That is, the terminal device issues a polling request when necessary, and the terminal central control device performs polling in response to the request, thereby preventing loss due to invalid polling.

[0003]

However, the above-described conventional state monitoring system in a device has the following problems. The first problem is that the same number of coaxial cables and polling request signal detection circuits as the number of terminal devices that need to be monitored are required, and it is difficult to reduce the size mechanically. The reason is that the polling request signal detection circuit in the terminal centralized control device and the polling request signal sending circuit in the terminal device can correspond only one-to-one.

[0004] A second problem is that a plurality of terminal devices that transmit a polling request signal due to a state change in the terminal device are connected to the terminal central control device, and some of the terminal devices do not need polling. In such a case, even when a terminal device that does not require polling sends out a polling request signal, an interrupt to the control processor of the non-centralized control device occurs, and the control processor performs useless interrupt processing.
That is, in a system in which terminal devices are connected to the terminal centralized control device in various configurations, it is not possible to set any terminal device that does not require polling, and the system has a long applicability. The reason is that a polling request signal from a terminal that does not need polling cannot be masked in the terminal central control device.

A third problem is that, in the prior art, a polling request signal is sent from a terminal device while a control processor in a terminal central control device is not yet started or a terminal central control device is not started yet. In this case, there is a possibility that the terminal centralized control device does not start normally because an interrupt to the control processor occurs. This is because the polling request signal transmission permission / prohibition control cannot be performed at an arbitrary timing from the control processor of the terminal central control device. Also, while the terminal activation is not completed, the hardware does not enter the polling request signal transmission prohibition state.

A fourth problem is that, in the prior art, when it is necessary to always recognize the state of the terminal central control unit itself, there is no means for recognizing the state other than periodically polling the terminal central control unit itself. It does not reduce the load on the control processor. The reason is that the terminal centralized control device does not have a means for generating a polling request signal in response to a change in the status of its own device unlike the terminal device.

A fifth problem is that the polling request signal transmission condition from the terminal device in the prior art is based on a change in the status of the terminal device. May be generated in a large amount, and the control processor may not be able to perform processing other than the interrupt processing. The reason is,
This is because the shortest time interval that can be handled by the control processor of the terminal centralized control device is secured and no interrupt is generated.

[0008] A sixth problem is that in the prior art, the state change when the power supply of the terminal is turned off or the coaxial cable for transmitting the polling request signal is cut off depends on whether the polling request signal is transmitted to the terminal centralized control device. , The control processor cannot recognize the state change. The reason is that there is no circuit in the terminal centralized control device that detects a change in the state of the terminal device and generates or does not generate a polling request signal, such as a polling request signal transmission circuit in the terminal device.

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the present invention reduces the size of a terminal centralized control device and minimizes polling in accordance with the processing capability of a control processor in the terminal centralized control device. It is another object of the present invention to provide a status monitoring method that enables more accurate status monitoring of each terminal device.

[0010]

According to the present invention, the state monitoring system in the apparatus comprises a state input circuit in the terminal centralized control unit, and n state transmitting circuits in each terminal apparatus are connected by a dedicated line for state transmission. Connect, make each terminal device periodically transmit the status of each terminal device to the centralized control device, detect the status change of each terminal device in the centralized control device, and interrupt in the centralized control device. And notifies the control processor of the terminal unconcentrated control device, and in the interrupt processing, causes the control processor to read the state of each terminal device. More specifically, means for transmitting a control signal for causing each terminal device to transmit a state from the terminal non-centralized control device to the terminal device, and the state received from each terminal device in the terminal centralized control device received last time It has a means for detecting a state change by comparing with the dependent state, and a means for notifying the control processor in the terminal central control apparatus of the detected state change of each terminal device by interruption.

The status transmission is started at an arbitrary timing. Specifically, it includes means for performing state transmission start control from a control processor in the terminal centralized control device.

The state transmission control signal is stopped according to the state of the terminal central control unit. Specifically, the state transmission control signal is stopped while the state of the terminal centralized control device is faulty or reset, and the state transmission control signal is transmitted again until the state transmission start control is performed by the control processor in the terminal centralized control device again. Including means for stopping.

Each terminal device is caused to transmit a state at an arbitrary cycle. Specifically, it includes a unit for setting a cycle for outputting a state transmission signal from a control processor in the terminal central control device.

When the terminal device is not reset or when the power is turned off or the dedicated line for transmitting the status signal is cut off and the status cannot be transmitted, the status that the terminal device is being reset or the power is turned off or not connected is detected. I do. Specifically, the status signal of the terminal device includes a signal that becomes inactive when the terminal device cannot transmit the status, and includes means for detecting the status of the terminal device by the terminal centralized control device.

When it is not necessary to monitor a specific state among a plurality of states of each terminal device in the terminal centralized control device, an interruption to the control processor due to a specific state change that does not need to be monitored is not generated. Specifically, it includes means for setting from the control processor so as not to compare a specific state among the states received from the terminal device.

As described above, in the present invention, a dedicated line interface for status transmission between the terminal central control device (1 device) and all terminal devices (n devices) is connected in one-to-n relation. Therefore, on the terminal central control device side, all terminal devices (n devices)
There is no need for a dedicated interface to send minute status.

Since the status is periodically transmitted from each terminal device to the terminal non-centralized control device and the status change is detected in the terminal centralized control device, the terminal device cannot transmit the status. At that time, the terminal device failure state can be detected.

When the state change of the terminal device is detected in the terminal centralized control device, an interrupt is generated in the terminal centralized control device, and the control processor in the terminal centralized control device is notified of the state change of the terminal device. Only when the control processor reads the state of the terminal device, the control processor in the terminal centralized control device can efficiently read the state of the terminal device only when the state of the terminal device changes.

Since the control processor in the terminal control device can control the start of status transmission of the terminal device, an interrupt occurs before the control processor is ready to accept an interrupt when a status change of each terminal device is detected. Can be prevented.

When the terminal central control unit fails or the control processor resets, the state transmission signal is masked in the terminal central control unit, and the state transmission is disabled from the terminal unit until the control processor performs the state transmission start control again. Therefore, it is possible to prevent the occurrence of an interrupt before the terminal centralized control device recovers from a failure or the control processor immediately after the reset release of the control processor and before the control processor is ready to receive an interrupt.

Since the cycle of the status transmission from the terminal device can be arbitrarily set by the control processor in the terminal centralized control device, a large amount of interrupts are generated when the status change of the terminal device is detected even when the status change is severe. Therefore, an interrupt can be generated at a timing considering the processing capability of the control processor.

When the terminal central control device is receiving the state of the terminal device, the terminal device is reset, the power is turned off, or the dedicated line for transmitting the status is not connected. In order to make the state of the terminal device that has been received halfway inactive, the state of the received terminal device is normal halfway and the state of the terminal device that became incorrect halfway is read by the control processor as it is. Can be prevented.

Since it is possible to set from the control processor in the terminal centralized control device so as not to compare a specific state among the states received from the terminal device, an interrupt can be made when a specific state change of the terminal device that does not require state monitoring. Does not occur, and the control processor does not need to read the invalid state.

When there are two terminal centralized control devices in the working / standby configuration and the terminal non-centralized control device monitors the state, the state is controlled by hardware control at the moment when the terminal centralized control device enters the standby state. Monitoring can be stopped. Also, when the terminal centralized device is in the operating state, the state monitoring can be started by software control. Accordingly, the state monitoring start / stop can be controlled depending on the state of the terminal centralized control device, and the operation / standby state of the active / standby configured terminal centralized control device can be easily switched.

In the above description, the status monitoring between the devices is described using the words centralized control device and terminal device, but the same can be said for the status monitoring between the units in the device.

[0026]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a preferred embodiment of an apparatus state monitoring system according to the present invention. Referring to FIG. 1, the embodiment of the present invention includes a control unit 5 and units 80 to 8k.

The control unit 5 has a control processor 6, an interrupt generation circuit 7, a state comparison section 8, a state input section 11, and a state output section 60. The state comparison unit 8 includes a state change flag register 9, a state comparison circuit 10, and TS0 to TSn state comparison mask registers 30 to 3n.

The status input unit 11 includes a status transmission cycle setting register 12, a start control register 13, a status transmission control signal generation circuit 14, a status input circuit 15, and TS0 to TSn status registers 20 to 2n. Each unit 80-8k
Have state output units 61 to 6n, respectively. The status output units 61 to 6n are respectively composed of status transmission circuits 71 to 7n and output TS setting units 51 to 5n.

The state transmission control signal generation circuit 14 is connected to the state input circuit 15 and the state transmission circuits 70 to 7n by the frame signal line 18 and the clock signal line 16, and the state input circuit 15 transmits the state by the state signal line 17. Circuit 70-7
n, and the status transmission circuits 70 to 7n are connected to the output TS setting units 50 to 5n, respectively. The state transmission control signal generation circuit 14 is connected to the state transmission cycle setting register 12 and to the activation control register 13. The status input circuit 15 is a TS0 to TSn status register 2
0-2n, and the TS0-TSn status register 20
2n are connected to the state comparison circuit 10. The state comparison circuit 10 includes TS0 to TSn state comparison mask registers 30 to
3n and to the state change flag register 9. The state change flag register 9 includes the interrupt generation circuit 7
Connected to Interrupt generation circuit 7 is connected to control processor 6.

Next, the operation of the embodiment of the in-device state monitoring system according to the present invention will be described in detail with reference to FIG. The state transmission control signal generation circuit 14 outputs a frame signal and a clock signal. The frame signal and the clock signal are input from the state transmission control signal generation circuit 14 to the state transmission circuits 70 to 7n through the frame signal line 18 and the clock signal line 16, respectively. The cycle for activating the frame signal is determined by the state transmission cycle setting register 12.
Is set by

The output and stop of the frame signal and the clock signal are controlled by the start control register 13.
The initial state of the activation control register 13 is set to the frame signal and clock signal stop control. The time from output control by the activation control register 13 to output of the frame signal and the clock signal is always constant.
The start control register 13 transits to the stop control state by the signal A even in the state of the frame signal and the block signal output control. The signal A is a signal indicating the state of the control unit 5 and indicates two states of operation and standby.

When the signal A is in a standby state, the start control register 13 is in a state of stopping the frame signal and the clock signal. The state transmission cycle setting register 12 and the activation control register 13 are set by the control processor 6. Each of the state transmission circuits 70 to 7n outputs a state signal of its own unit at a timing determined for each unit. The status signal is input as a serial signal from the status transmission circuits 70 to 7n to the status input circuit 15 through the status signal line 17.

The timing at which the state transmitting circuits 70 to 7n transmit the state signals is determined by the frame signal, the clock signal, and the output TS (time slot) setting units 50 to 5n. The serial state signal input to the state input circuit 15 is converted into parallel for each state of each unit,
It is set in the TS0-TSn status registers 20-2n. The status of each unit set in the TS0 to TSn status registers 20 to 2n can be read from the control processor 6. The state of each unit, which is output from the state input circuit 15 in each cycle and converted into parallel, is input to the state comparison circuit 10.

The state comparison circuit 10 compares the input state signals for each cycle and detects a state change for each unit. When a state change is detected by the state comparison circuit 10, a state change flag assigned to the unit that has detected the state change is output from the state comparison circuit 10 and set in the state change flag register 9. The state change flag set in the state change flag register 9 is cleared if there is no change in the state signal input in the next cycle. The state change flag set in the state change flag register 9 can be read from the control processor 6.

The state change flag output from the state comparison circuit 10 is obtained by ORing all the flags, and
Is input to The interrupt generation circuit 7 generates an interrupt signal triggered by the OR of the input state change flag. The interrupt signal is input to the control processor 6, and the control processor 6 transmits the interrupt signal to the control unit 5 or each of the units 80 to 8k. Can be recognized as having a state change. The state comparison circuit 10 includes a TS0-TSn state comparison mask register 30 for performing a run without detecting a state change for each state signal.
To 3n are connected. The setting of the TS0 to TSn state comparison mask registers 30 to 3n can be performed from the control processor 6.

Next, the relationship among the frame signal, clock signal, and state signal described above will be described with reference to FIGS.
This will be described in detail with reference to FIG.

Referring to FIG. 2A, the frame signal on the frame signal line 18 is output periodically. This cycle is set by the status transmission cycle setting register 12 described above. The frame signal on the frame signal line 18 and the clock signal on the clock signal line 16 stop when the signal A enters a standby state.

Referring to FIG. 2B, state signals are output from the state transmission circuits 70 to 7n in synchronization with the clock signal when the frame signal is active. TS0-TSn
State transmission circuits 70 to 7n
Determines whether to transmit a status signal from the output T.
S setting units 50 to 5n.

Next, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 3, data communication control device 140 includes control units 1-2 and units 3-4
It is composed. The control unit 1 includes a state output unit 40, a state input unit 90, a state comparison unit 100, an interrupt generation circuit 11,
0, a control processor 120, and an operation state monitoring circuit 130. The control unit 2 includes a status output unit 41, a status input unit 91, a status comparison unit 101, an interrupt generation circuit 111, a control processor 121, and an operation status monitoring circuit 131.

It is assumed that one of the control units 1 and 2 is in the active / standby configuration, and one of them is in the operating state, and the other is in the standby state. The signal A1 and the signal A2 are respectively transmitted to the control unit 1
2 indicates the operation / standby state. The states of the signals A1 and A2 are always monitored by the operation state monitoring circuits 130 and 131, and the operation state of the other system control unit is monitored. When the other system control unit is in the operation state, the own system control unit enters the standby state. When the other system is in the standby state, the own system attempts to enter the operating state. The signal A1 and the signal A2 cannot be in the operation state when the state of the own system is in the occurrence of a fault or during reset.

The state input sections 90 and 91 respectively receive the signal A
1. When the state of the signal A2 is the operation state, the state transmission control signal 132 is transmitted, and the control units 1 and 2 and the units 3 to
4 is received. Interrupt generation circuit 11
0 detects a state change of the signal A1 other than when the state change of the state signal 133 is detected, generates an interrupt (a vector different from the interrupt when the state change of the state signal is detected), and To recognize the standby state from the operation of the own unit or the operation state from the standby.

The interrupt generation circuit 111 is also used as the interrupt generation circuit 110.
Similarly to the above, the state change of the signal A2 is detected to generate an interrupt, and the control processor 121 is made to recognize the operation / standby state change of the own unit. The unit 3 is a status output unit 4
2 The unit 4 has a status output unit 43. As for the status signal output timings of the status output units 40 to 43, status signal output time slots are assigned to TS0 to TS3, respectively. (See FIG. 2B for the output timing of TS0 to TS3.)

Next, the operation of the embodiment of the present invention will be described in detail with reference to FIG. Referring to FIG. 3, the power supply of the data communication control device 140 is turned on and the control unit 1 is turned on.
Is the operating state first, the signal A1 is the operating state,
Signal A2 indicates a standby state. As a result, the control unit
A state transmission control signal 132 is transmitted from the state input unit 90 to all the units 1 to 4.

The status output units 40 to 43 of the units 1 to 4 that have received the status transmission control signal 132 transmit the status signal 133 to the set time slots TS0 to TSn as shown in FIG. The state signal 133 transmitted from each unit is received by the state input unit 90 in the control unit 1 in the operation state (signal A1 = operation state). The state signal 133 transmitted from each of the units 1 to 4 is as shown in FIG.
Are transmitted every state transmission period T as shown in FIG. The state input unit 90 of the control unit 1 in the operation state has a state transmission cycle T
Each time the status signal 133 of each of the units 1 to 4 is received, the status signal 133 is set in the status comparison unit 100.

The state comparing section 100 compares the input state signals 133 of the units 1 to 4 for each state transmission cycle T, and sets a state change flag when a state change is detected. When the state change flag is set, the interrupt generation circuit 1
10 generates an interrupt. The control processor 120 efficiently reads the status of each unit in the interrupt processing when the status change flag is generated, thereby efficiently monitoring the status monitoring target units 1 to 4
Can be monitored.

Here, if a failure occurs in the control unit 1,
It is assumed that the signal A1 enters a standby state. Since the signal A1 has changed from the delayed state to the standby state, the interrupt generation circuit 110 generates an operation / standby state change interrupt, and the control processor 12
0 is notified that the unit has changed to the standby state.
The control processor 120 starts the processing of the standby system by the operation / standby state change interrupt processing. Since the signal A1 is in the standby state, the state input unit 90 outputs the state transmission control signal 1
32 transmission is stopped. The operation state monitoring circuit 131 detects that the signal A1 has entered the standby state, and changes the signal A2 to the operation state. Since the signal A2 has changed from the standby state to the operation state, the interrupt generation circuit 111 generates an operation / standby state change interrupt, and notifies the control processor 121 that the unit has changed to the operation state. The control processor 121 starts the operation of the active system by the processing of the operation / standby state change interrupt.

The state input unit 9 in which the signal A2 is in the operating state
1 transmits a state transmission control signal 132 to each of the units 1 to 4. The control processor 1 of the control unit 2 in the operating state
Reference numeral 21 denotes a state in which the control processor 120 detects a state change of each unit when the control signal A1 is in the operating state.
Interrupt generation circuit 1 in the same manner as
The state of each of the units 1 to 4 can be recognized by the interruption from 11.

Next, a second embodiment of the in-device state monitoring system according to the present invention will be described in detail with reference to FIG.

Referring to FIG. 4, data communication control device 1
61 is a control unit 150, units 151 to 153
It consists of. The control unit 150 includes the state input unit 15
7, a state comparison circuit 158, an interrupt generation circuit 159, a control processor 160, and a state register 162. The units 151 to 153 include state output units 154 to 15 respectively.
6.

The status output units 154 to 156 have status signal transmission time slots set to TS0 to TS2, respectively. The state input unit 157 transmits a state transmission control signal and receives a state signal from each of the units 151 to 153. The state input unit 157 outputs the received state signal to the state comparison circuit 158 and the state register 16 every state transmission cycle.
Set to 2. The state comparison circuit 158 compares the set state signals for each state transmission cycle and detects a state change, and sets a state change flag in the interrupt generation circuit 159. Interrupt generation circuit 159 with state change flag set
Generates an interrupt to the control processor 160. Upon receiving the interrupt, the control processor 160 reads the status change flag, checks the unit whose status has changed, and reads the status of the unit whose status has changed from the status register 162.

The units 151 to 153 whose status is monitored by the control unit 150 have a detachable structure in the data communication control device 161 alone. For example, control unit 1
When the connection between the unit 152 and the control unit 150 is disconnected while the unit 50 is transmitting the state transmission control signal and the unit 152 is transmitting the state signal, the unit 15
The status signal No. 2 is in an incorrect state like TS1 in FIG. Even in the case of this illegal state change, the state comparison unit 15
8 sets a state change flag. When the state at this time is set in the state register 162 as it is,
Since the control processor 160 reads the invalid state, the unit 152 recognizes that the invalid state has changed. Therefore, the state signal D0 of each of the units 151 to 153 is
D7 transmitted last in the serial transmission among D7 to D7 is data indicating normal state transmission, and D7 = 0 (the state signal D7
When the electrical level on the hardware is “0”, the status transmission is assumed to be normal.

By the above method, the unit 15 shown in FIG.
When the status signal transmission is stopped before the transmission of the status signal is completed until D7 as shown in 2, D7 = 1 (indicating that the electrical signal on the hardware of the status signal D7 is "1"), and the unit 152 is in the status. It is possible to detect that the status has been changed to transmission disabled. Further, when D7 = 1, D
Since the statuses 0 to D6 are invalid data, the status input unit 157 sets D0 to D7 = ffh (all data is inactive) in the status register 162, and the control processor 160 acquires the invalid status. It is characterized in that it is prevented from doing so.

State output unit 1 of each of units 151 to 153
54 to 156 are the state input units 15 of the control unit 150;
The status signal is transmitted by the status transmission control signal output from the control signal 7. The state transmission control signal includes a frame signal and a clock signal. Each of the state output units 154 to 156 counts the rise of the clock signal after the frame signal is asserted, and outputs the state signal to a set time slot. However, if the connection is made to the data communication control device 161 while the frame signal is active, the clock signal is counted from the moment of connection and a status signal is output with an incorrect timing (see FIG. 5B).

In order to prevent the transmission of the status signal at an improper timing as shown in FIG.
153 includes means for ignoring the first frame signal active state after connection to the data communication control device 161 (see FIG. 5C).

The configuration and operation of the preferred embodiment of the in-device state monitoring system according to the present invention have been described in detail. However, the invention should not be limited to only such example embodiments,
Those skilled in the art can easily understand that various modifications can be made according to the specific application.

[0056]

According to the in-device state monitoring system of the present invention described above, the following remarkable effects can be obtained.

The first effect of the present invention is that, as shown in FIG. 1, the control unit 5 for monitoring the status and the units 80 to 8k for monitoring the status can be connected in one-to-n relation, so that the size of the data communication control device can be reduced. It is easy. (However, n = k + 1). The reason is that the units 80 to 8k whose status is to be monitored are connected to the status signal line 17 (serial bus).
The state input circuit 1 receives the state signal in order to output the state signal of each unit in the determined time slot.
This is because there is only one circuit 5 in the control unit 5 for monitoring the state.

A second effect of the present invention is that it is possible to prevent a state change of an arbitrary state signal from being detected, and it is easy to cope with a change in the device configuration. The reason is that the state change non-detection can be set by the state comparison mask registers 30 to 3n from the control processor 6 in the control unit 5 that performs state monitoring as shown in FIG.

The third effect of the present invention is that there are two control units capable of performing state monitoring as shown in FIG. 3 in the working / standby configuration, and only the control unit in the operating state monitors the state. In this case, the control unit for monitoring the state can be easily switched according to the state of the control unit (state of the signal A). The reason is that, as shown in FIG. 1, the control unit 5 for monitoring the state is provided with the start control register 13 for monitoring the state, and the start control from the control processor is enabled only when the signal A is in the operating state. This is also because the state of the activation control register 13 includes means for stopping by hardware control when the signal A is in the standby state.

A fourth effect of the present invention is that, as shown in FIG. 1, the units 80 to 8k whose status is monitored can detect a disconnection or a status change during reset in the data communication control device 170. That is. The reason is,
As shown in FIG. 1, the control unit 5 that performs state monitoring compares the state changes of the state monitored units 80 to 8k, and the state comparison unit 8 detects the disconnection and reset state changes of the state monitored units 80 to 8k. This is because the control processor 6 can be notified by interruption.

The fifth effect of the present invention is that the period of the state monitoring can be set in accordance with the performance of the control processor 6 for performing the state monitoring as shown in FIG.
The reason is that, as shown in FIG. 1, the status transmission cycle can be set from the control processor 6 to the status transmission cycle setting register 12.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an in-device state monitoring method according to the present invention.

FIG. 2 is a timing chart showing that the status transmission control signal stops due to the status of the unit for monitoring the status, and a timing diagram showing the relation between the status transmission control signal and the status signal.

FIG. 3 is a block diagram showing an embodiment of an in-device state monitoring method according to the present invention.

FIG. 4 is a block diagram showing a second embodiment of the in-device state monitoring method according to the present invention.

FIG. 5 is a timing chart for explaining the operation of the in-device state monitoring method according to the present invention, showing a timing chart showing an example in which an incorrect status signal is generated, and a timing chart showing an example in which a status signal is output at an incorrect timing; FIG. 3 is a diagram and a timing chart for preventing output of a status signal at an incorrect timing.

[Explanation of symbols]

1, 2, 5, 150 Control unit 3, 4, 80 to 8k, 151 to 153 Unit 6, 120, 160 Control processor 7, 110, 159 Interrupt generation circuit 8, 100, 158 State comparison unit 9 State change flag register DESCRIPTION OF SYMBOLS 10 State comparison circuit 11, 90, 91, 157 State input part 12 State transmission cycle setting register 13 Start control register 14 State transmission control signal generation circuit 15 State input circuit 16 Clock signal line 17 State signal line 18 Frame signal line 20-2n TS0-TSn
Status register 30-3n TS0-TSn
Status comparison mask registers 40 to 43, 60 to 6n, 154 to 156 status output unit 50 to 5n output TS setting unit 70 to 7n status transmission circuit 133 status signal 132 status transmission control signal 130, 131 operation status monitoring circuit 140, 161 170 data communication controller 162 status register

Claims (14)

[Claims] In a device which is a data communication control device comprising a control unit and a plurality of other units different from the control unit, the control unit monitors the status of each unit (including the control unit). A status monitoring system, wherein a transmission / stop means for transmitting / stopping a status transmission control signal from the control unit to each unit; and Serial communication transmitting means for transmitting a status signal by serial communication, capturing means for taking the received status signal of each unit into the control unit, detecting means for detecting each status change in the control unit, and the control unit Interrupt means for causing an internal control processor to execute an interrupt process when a state change is detected within the interrupt process; In device status monitoring method which is characterized in that it comprises an, a reading means for reading the state of each Yunitsuto. 2. An apparatus state monitoring system according to claim 1, wherein said transmission / stop means includes means for controlling transmission start from a control processor in said control unit. 3. The transmission / stop unit stops the state transmission control signal triggered by a failure or reset occurring in the control unit, and stops transmission until the transmission start control unit starts transmission. 3. The apparatus state monitoring method according to claim 2, further comprising a transmission stop control unit for causing the transmission to stop. 4. The internal state according to claim 1, wherein said transmitting / stopping means includes means for arbitrarily setting a period for transmitting a state transmission control signal from a control processor in said control unit. Monitoring method. 5. The apparatus according to claim 1, wherein said serial communication transmitting means includes means for outputting to a time slot designated by an output time slot setting circuit provided in each unit. method. 6. An apparatus state monitoring system according to claim 1, wherein said detection means includes means for setting a state change that does not need to be detected by a control processor in a control unit. 7. The apparatus according to claim 1, wherein said detecting means includes means for setting a state change flag corresponding to a time slot in which a state change is detected among said time slots in a state change flag register in a control unit. 6. The in-device state monitoring method according to 5. 8. The apparatus according to claim 1, wherein said state change flag register includes means for clearing a state change flag by reading the state change flag register from a control processor in a control unit. Internal status monitoring method. 9. An interrupt process which is generated when the state change is detected includes means for generating when the state change flag is set and stopping when the state change flag is cleared. An apparatus status monitoring method according to claim 8. 10. When the status signal of a given time slot received is D7 = 1 (for example, when a unit is disconnected from the apparatus during status reception), the capturing means changes the status of the time slot to D0. 2. An apparatus state monitoring system according to claim 1, further comprising means for taking in as D7 = FFh. 11. The serial communication transmitting means, when a unit is connected to the device while the frame signal is active, prevents the status signal transmission timing from becoming incorrect when the unit is connected to the device. 2. The method according to claim 1, further comprising means for ignoring the frame signal active state. 12. The apparatus according to claim 11, wherein said interrupt means includes means for notifying the control processor of the initial state acquisition timing by interrupting the first state signal acquisition after transmitting the state transmission control signal. Item 1 in-device state monitoring method. 13. When two control units capable of monitoring the status are provided in a working / standby configuration and only the active system monitors the status in the device, the statuses of the control units are mutually changed from the operating status to the standby status. The control unit is smoothly controlled by means for stopping the state transmission control signal transmitted from the control unit which has changed to the standby state when switching to the standby state, and means for outputting the state transmission control signal under the control of the control processor which has changed to the operation state. 2. An apparatus state monitoring method according to claim 1, wherein the state monitoring is started / stopped when the operation / standby state is switched. 14. An apparatus status monitoring method according to claim 1, wherein said apparatus status monitoring method between units is applied to status monitoring between devices.